diff options
Diffstat (limited to 'arch/blackfin/mach-bf533')
| -rw-r--r-- | arch/blackfin/mach-bf533/include/mach/fio_flag.h | 8 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf533/include/mach/pll.h | 8 |
2 files changed, 8 insertions, 8 deletions
diff --git a/arch/blackfin/mach-bf533/include/mach/fio_flag.h b/arch/blackfin/mach-bf533/include/mach/fio_flag.h index b81905a..d0bfba0 100644 --- a/arch/blackfin/mach-bf533/include/mach/fio_flag.h +++ b/arch/blackfin/mach-bf533/include/mach/fio_flag.h @@ -15,10 +15,10 @@ static inline void bfin_write_FIO_FLAG_##name(unsigned short val) \ { \ unsigned long flags; \ - local_irq_save_hw(flags); \ + flags = hard_local_irq_save(); \ bfin_write16(FIO_FLAG_##name, val); \ bfin_read_CHIPID(); \ - local_irq_restore_hw(flags); \ + hard_local_irq_restore(flags); \ } BFIN_WRITE_FIO_FLAG(D) BFIN_WRITE_FIO_FLAG(C) @@ -30,10 +30,10 @@ static inline u16 bfin_read_FIO_FLAG_##name(void) \ { \ unsigned long flags; \ u16 ret; \ - local_irq_save_hw(flags); \ + flags = hard_local_irq_save(); \ ret = bfin_read16(FIO_FLAG_##name); \ bfin_read_CHIPID(); \ - local_irq_restore_hw(flags); \ + hard_local_irq_restore(flags); \ return ret; \ } BFIN_READ_FIO_FLAG(D) diff --git a/arch/blackfin/mach-bf533/include/mach/pll.h b/arch/blackfin/mach-bf533/include/mach/pll.h index 9a0c9a2..169c106 100644 --- a/arch/blackfin/mach-bf533/include/mach/pll.h +++ b/arch/blackfin/mach-bf533/include/mach/pll.h @@ -18,7 +18,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val) if (val == bfin_read_PLL_CTL()) return; - local_irq_save_hw(flags); + flags = hard_local_irq_save(); /* Enable the PLL Wakeup bit in SIC IWR */ iwr = bfin_read32(SIC_IWR); /* Only allow PPL Wakeup) */ @@ -29,7 +29,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val) asm("IDLE;"); bfin_write32(SIC_IWR, iwr); - local_irq_restore_hw(flags); + hard_local_irq_restore(flags); } /* Writing to VR_CTL initiates a PLL relock sequence. */ @@ -40,7 +40,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) if (val == bfin_read_VR_CTL()) return; - local_irq_save_hw(flags); + flags = hard_local_irq_save(); /* Enable the PLL Wakeup bit in SIC IWR */ iwr = bfin_read32(SIC_IWR); /* Only allow PPL Wakeup) */ @@ -51,7 +51,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) asm("IDLE;"); bfin_write32(SIC_IWR, iwr); - local_irq_restore_hw(flags); + hard_local_irq_restore(flags); } #endif /* _MACH_PLL_H */ |