diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/device/base.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 140 |
1 files changed, 70 insertions, 70 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 96ac880..7da5dc4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -84,7 +84,7 @@ nv4_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -104,7 +104,7 @@ nv5_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -125,7 +125,7 @@ nv10_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -144,7 +144,7 @@ nv11_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -165,7 +165,7 @@ nv15_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -186,7 +186,7 @@ nv17_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -207,7 +207,7 @@ nv18_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -228,7 +228,7 @@ nv1a_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -249,7 +249,7 @@ nv1f_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -270,7 +270,7 @@ nv20_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -291,7 +291,7 @@ nv25_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -312,7 +312,7 @@ nv28_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -333,7 +333,7 @@ nv2a_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -354,7 +354,7 @@ nv30_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -375,7 +375,7 @@ nv31_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -397,7 +397,7 @@ nv34_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -419,7 +419,7 @@ nv35_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -440,7 +440,7 @@ nv36_chipset = { .i2c = nv04_i2c_new, .imem = nv04_instmem_new, .mc = nv04_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, // .dma = nv04_dma_new, @@ -462,7 +462,7 @@ nv40_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv40_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -487,7 +487,7 @@ nv41_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv40_mc_new, -// .mmu = nv41_mmu_new, + .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -512,7 +512,7 @@ nv42_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv40_mc_new, -// .mmu = nv41_mmu_new, + .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -537,7 +537,7 @@ nv43_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv40_mc_new, -// .mmu = nv41_mmu_new, + .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -562,7 +562,7 @@ nv44_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv44_mc_new, -// .mmu = nv44_mmu_new, + .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -587,7 +587,7 @@ nv45_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv40_mc_new, -// .mmu = nv04_mmu_new, + .mmu = nv04_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -612,7 +612,7 @@ nv46_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv44_mc_new, -// .mmu = nv44_mmu_new, + .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -637,7 +637,7 @@ nv47_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv40_mc_new, -// .mmu = nv41_mmu_new, + .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -662,7 +662,7 @@ nv49_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv40_mc_new, -// .mmu = nv41_mmu_new, + .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -687,7 +687,7 @@ nv4a_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv44_mc_new, -// .mmu = nv44_mmu_new, + .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -712,7 +712,7 @@ nv4b_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv40_mc_new, -// .mmu = nv41_mmu_new, + .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -737,7 +737,7 @@ nv4c_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv4c_mc_new, -// .mmu = nv44_mmu_new, + .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -762,7 +762,7 @@ nv4e_chipset = { .i2c = nv4e_i2c_new, .imem = nv40_instmem_new, .mc = nv4c_mc_new, -// .mmu = nv44_mmu_new, + .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -789,7 +789,7 @@ nv50_chipset = { .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .mc = nv50_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = nv50_therm_new, // .timer = nv04_timer_new, @@ -815,7 +815,7 @@ nv63_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv4c_mc_new, -// .mmu = nv44_mmu_new, + .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -840,7 +840,7 @@ nv67_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv4c_mc_new, -// .mmu = nv44_mmu_new, + .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -865,7 +865,7 @@ nv68_chipset = { .i2c = nv04_i2c_new, .imem = nv40_instmem_new, .mc = nv4c_mc_new, -// .mmu = nv44_mmu_new, + .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, @@ -892,7 +892,7 @@ nv84_chipset = { .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .mc = nv50_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, // .timer = nv04_timer_new, @@ -923,7 +923,7 @@ nv86_chipset = { .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .mc = nv50_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, // .timer = nv04_timer_new, @@ -954,7 +954,7 @@ nv92_chipset = { .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .mc = nv50_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, // .timer = nv04_timer_new, @@ -985,7 +985,7 @@ nv94_chipset = { .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g94_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, // .timer = nv04_timer_new, @@ -1018,7 +1018,7 @@ nv96_chipset = { // .timer = nv04_timer_new, .fb = g84_fb_new, .imem = nv50_instmem_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, .bar = g84_bar_new, // .volt = nv40_volt_new, // .dma = nv50_dma_new, @@ -1049,7 +1049,7 @@ nv98_chipset = { // .timer = nv04_timer_new, .fb = g84_fb_new, .imem = nv50_instmem_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, .bar = g84_bar_new, // .volt = nv40_volt_new, // .dma = nv50_dma_new, @@ -1078,7 +1078,7 @@ nva0_chipset = { .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .mc = g98_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, // .timer = nv04_timer_new, @@ -1109,7 +1109,7 @@ nva3_chipset = { .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g98_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gt215_pmu_new, // .therm = gt215_therm_new, @@ -1142,7 +1142,7 @@ nva5_chipset = { .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g98_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gt215_pmu_new, // .therm = gt215_therm_new, @@ -1174,7 +1174,7 @@ nva8_chipset = { .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g98_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gt215_pmu_new, // .therm = gt215_therm_new, @@ -1206,7 +1206,7 @@ nvaa_chipset = { .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g98_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, // .timer = nv04_timer_new, @@ -1237,7 +1237,7 @@ nvac_chipset = { .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g98_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, // .timer = nv04_timer_new, @@ -1268,7 +1268,7 @@ nvaf_chipset = { .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g98_mc_new, -// .mmu = nv50_mmu_new, + .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gt215_pmu_new, // .therm = gt215_therm_new, @@ -1302,7 +1302,7 @@ nvc0_chipset = { .imem = nv50_instmem_new, .ltc = gf100_ltc_new, .mc = gf100_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, // .therm = gt215_therm_new, @@ -1337,7 +1337,7 @@ nvc1_chipset = { .imem = nv50_instmem_new, .ltc = gf100_ltc_new, .mc = gf106_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, // .therm = gt215_therm_new, @@ -1371,7 +1371,7 @@ nvc3_chipset = { .imem = nv50_instmem_new, .ltc = gf100_ltc_new, .mc = gf106_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, // .therm = gt215_therm_new, @@ -1405,7 +1405,7 @@ nvc4_chipset = { .imem = nv50_instmem_new, .ltc = gf100_ltc_new, .mc = gf100_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, // .therm = gt215_therm_new, @@ -1440,7 +1440,7 @@ nvc8_chipset = { .imem = nv50_instmem_new, .ltc = gf100_ltc_new, .mc = gf100_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, // .therm = gt215_therm_new, @@ -1475,7 +1475,7 @@ nvce_chipset = { .imem = nv50_instmem_new, .ltc = gf100_ltc_new, .mc = gf100_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, // .therm = gt215_therm_new, @@ -1510,7 +1510,7 @@ nvcf_chipset = { .imem = nv50_instmem_new, .ltc = gf100_ltc_new, .mc = gf106_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, // .therm = gt215_therm_new, @@ -1544,7 +1544,7 @@ nvd7_chipset = { .imem = nv50_instmem_new, .ltc = gf100_ltc_new, .mc = gf106_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .therm = gf110_therm_new, // .timer = nv04_timer_new, @@ -1576,7 +1576,7 @@ nvd9_chipset = { .imem = nv50_instmem_new, .ltc = gf100_ltc_new, .mc = gf106_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf110_pmu_new, // .therm = gf110_therm_new, @@ -1610,7 +1610,7 @@ nve4_chipset = { .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gf106_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk104_pmu_new, // .therm = gf110_therm_new, @@ -1646,7 +1646,7 @@ nve6_chipset = { .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gf106_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk104_pmu_new, // .therm = gf110_therm_new, @@ -1682,7 +1682,7 @@ nve7_chipset = { .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gf106_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf110_pmu_new, // .therm = gf110_therm_new, @@ -1714,7 +1714,7 @@ nvea_chipset = { .imem = gk20a_instmem_new, .ltc = gk104_ltc_new, .mc = gk20a_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .pmu = gk20a_pmu_new, // .timer = gk20a_timer_new, // .volt = gk20a_volt_new, @@ -1742,7 +1742,7 @@ nvf0_chipset = { .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gf106_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk110_pmu_new, // .therm = gf110_therm_new, @@ -1778,7 +1778,7 @@ nvf1_chipset = { .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gf106_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk110_pmu_new, // .therm = gf110_therm_new, @@ -1814,7 +1814,7 @@ nv106_chipset = { .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gk20a_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk208_pmu_new, // .therm = gf110_therm_new, @@ -1849,7 +1849,7 @@ nv108_chipset = { .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gk20a_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk208_pmu_new, // .therm = gf110_therm_new, @@ -1884,7 +1884,7 @@ nv117_chipset = { .imem = nv50_instmem_new, .ltc = gm107_ltc_new, .mc = gk20a_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk208_pmu_new, // .therm = gm107_therm_new, @@ -1913,7 +1913,7 @@ nv124_chipset = { .imem = nv50_instmem_new, .ltc = gm107_ltc_new, .mc = gk20a_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk208_pmu_new, // .timer = gk20a_timer_new, @@ -1942,7 +1942,7 @@ nv126_chipset = { .imem = nv50_instmem_new, .ltc = gm107_ltc_new, .mc = gk20a_mc_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk208_pmu_new, // .timer = gk20a_timer_new, @@ -1967,8 +1967,8 @@ nv12b_chipset = { .imem = gk20a_instmem_new, .ltc = gm107_ltc_new, .mc = gk20a_mc_new, -// .mmu = gf100_mmu_new, -// .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, + .mmu = gf100_mmu_new, // .timer = gk20a_timer_new, // .ce[2] = gm204_ce2_new, // .dma = gf119_dma_new, |