diff options
Diffstat (limited to 'include')
86 files changed, 2593 insertions, 427 deletions
diff --git a/include/asm-generic/dma-coherent.h b/include/asm-generic/dma-coherent.h index 2be8a2d..0297e58 100644 --- a/include/asm-generic/dma-coherent.h +++ b/include/asm-generic/dma-coherent.h @@ -16,16 +16,13 @@ int dma_mmap_from_coherent(struct device *dev, struct vm_area_struct *vma, * Standard interface */ #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY -extern int -dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, - dma_addr_t device_addr, size_t size, int flags); +int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, + dma_addr_t device_addr, size_t size, int flags); -extern void -dma_release_declared_memory(struct device *dev); +void dma_release_declared_memory(struct device *dev); -extern void * -dma_mark_declared_memory_occupied(struct device *dev, - dma_addr_t device_addr, size_t size); +void *dma_mark_declared_memory_occupied(struct device *dev, + dma_addr_t device_addr, size_t size); #else #define dma_alloc_from_coherent(dev, size, handle, ret) (0) #define dma_release_from_coherent(dev, order, vaddr) (0) diff --git a/include/dt-bindings/clock/berlin2.h b/include/dt-bindings/clock/berlin2.h new file mode 100644 index 0000000..0c30800 --- /dev/null +++ b/include/dt-bindings/clock/berlin2.h @@ -0,0 +1,45 @@ +/* + * Berlin2 BG2/BG2CD clock tree IDs + */ + +#define CLKID_SYS 0 +#define CLKID_CPU 1 +#define CLKID_DRMFIGO 2 +#define CLKID_CFG 3 +#define CLKID_GFX 4 +#define CLKID_ZSP 5 +#define CLKID_PERIF 6 +#define CLKID_PCUBE 7 +#define CLKID_VSCOPE 8 +#define CLKID_NFC_ECC 9 +#define CLKID_VPP 10 +#define CLKID_APP 11 +#define CLKID_AUDIO0 12 +#define CLKID_AUDIO2 13 +#define CLKID_AUDIO3 14 +#define CLKID_AUDIO1 15 +#define CLKID_GFX3D_CORE 16 +#define CLKID_GFX3D_SYS 17 +#define CLKID_ARC 18 +#define CLKID_VIP 19 +#define CLKID_SDIO0XIN 20 +#define CLKID_SDIO1XIN 21 +#define CLKID_GFX3D_EXTRA 22 +#define CLKID_GC360 23 +#define CLKID_SDIO_DLLMST 24 +#define CLKID_GETH0 25 +#define CLKID_GETH1 26 +#define CLKID_SATA 27 +#define CLKID_AHBAPB 28 +#define CLKID_USB0 29 +#define CLKID_USB1 30 +#define CLKID_PBRIDGE 31 +#define CLKID_SDIO0 32 +#define CLKID_SDIO1 33 +#define CLKID_NFC 34 +#define CLKID_SMEMC 35 +#define CLKID_AUDIOHD 36 +#define CLKID_VIDEO0 37 +#define CLKID_VIDEO1 38 +#define CLKID_VIDEO2 39 +#define CLKID_TWD 40 diff --git a/include/dt-bindings/clock/berlin2q.h b/include/dt-bindings/clock/berlin2q.h new file mode 100644 index 0000000..287fc3b --- /dev/null +++ b/include/dt-bindings/clock/berlin2q.h @@ -0,0 +1,31 @@ +/* + * Berlin2 BG2Q clock tree IDs + */ + +#define CLKID_SYS 0 +#define CLKID_DRMFIGO 1 +#define CLKID_CFG 2 +#define CLKID_GFX2D 3 +#define CLKID_ZSP 4 +#define CLKID_PERIF 5 +#define CLKID_PCUBE 6 +#define CLKID_VSCOPE 7 +#define CLKID_NFC_ECC 8 +#define CLKID_VPP 9 +#define CLKID_APP 10 +#define CLKID_SDIO0XIN 11 +#define CLKID_SDIO1XIN 12 +#define CLKID_GFX2DAXI 13 +#define CLKID_GETH0 14 +#define CLKID_SATA 15 +#define CLKID_AHBAPB 16 +#define CLKID_USB0 17 +#define CLKID_USB1 18 +#define CLKID_USB2 19 +#define CLKID_USB3 20 +#define CLKID_PBRIDGE 21 +#define CLKID_SDIO 22 +#define CLKID_NFC 23 +#define CLKID_SMEMC 24 +#define CLKID_PCIE 25 +#define CLKID_TWD 26 diff --git a/include/dt-bindings/clock/exynos3250.h b/include/dt-bindings/clock/exynos3250.h new file mode 100644 index 0000000..b535e9d --- /dev/null +++ b/include/dt-bindings/clock/exynos3250.h @@ -0,0 +1,258 @@ +/* + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * Author: Tomasz Figa <t.figa@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants for Samsung Exynos3250 clock controllers. + */ + +#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H +#define _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H + +/* + * Let each exported clock get a unique index, which is used on DT-enabled + * platforms to lookup the clock from a clock specifier. These indices are + * therefore considered an ABI and so must not be changed. This implies + * that new clocks should be added either in free spaces between clock groups + * or at the end. + */ + + +/* + * Main CMU + */ + +#define CLK_OSCSEL 1 +#define CLK_FIN_PLL 2 +#define CLK_FOUT_APLL 3 +#define CLK_FOUT_VPLL 4 +#define CLK_FOUT_UPLL 5 +#define CLK_FOUT_MPLL 6 + +/* Muxes */ +#define CLK_MOUT_MPLL_USER_L 16 +#define CLK_MOUT_GDL 17 +#define CLK_MOUT_MPLL_USER_R 18 +#define CLK_MOUT_GDR 19 +#define CLK_MOUT_EBI 20 +#define CLK_MOUT_ACLK_200 21 +#define CLK_MOUT_ACLK_160 22 +#define CLK_MOUT_ACLK_100 23 +#define CLK_MOUT_ACLK_266_1 24 +#define CLK_MOUT_ACLK_266_0 25 +#define CLK_MOUT_ACLK_266 26 +#define CLK_MOUT_VPLL 27 +#define CLK_MOUT_EPLL_USER 28 +#define CLK_MOUT_EBI_1 29 +#define CLK_MOUT_UPLL 30 +#define CLK_MOUT_ACLK_400_MCUISP_SUB 31 +#define CLK_MOUT_MPLL 32 +#define CLK_MOUT_ACLK_400_MCUISP 33 +#define CLK_MOUT_VPLLSRC 34 +#define CLK_MOUT_CAM1 35 +#define CLK_MOUT_CAM_BLK 36 +#define CLK_MOUT_MFC 37 +#define CLK_MOUT_MFC_1 38 +#define CLK_MOUT_MFC_0 39 +#define CLK_MOUT_G3D 40 +#define CLK_MOUT_G3D_1 41 +#define CLK_MOUT_G3D_0 42 +#define CLK_MOUT_MIPI0 43 +#define CLK_MOUT_FIMD0 44 +#define CLK_MOUT_UART_ISP 45 +#define CLK_MOUT_SPI1_ISP 46 +#define CLK_MOUT_SPI0_ISP 47 +#define CLK_MOUT_TSADC 48 +#define CLK_MOUT_MMC1 49 +#define CLK_MOUT_MMC0 50 +#define CLK_MOUT_UART1 51 +#define CLK_MOUT_UART0 52 +#define CLK_MOUT_SPI1 53 +#define CLK_MOUT_SPI0 54 +#define CLK_MOUT_AUDIO 55 +#define CLK_MOUT_MPLL_USER_C 56 +#define CLK_MOUT_HPM 57 +#define CLK_MOUT_CORE 58 +#define CLK_MOUT_APLL 59 +#define CLK_MOUT_ACLK_266_SUB 60 + +/* Dividers */ +#define CLK_DIV_GPL 64 +#define CLK_DIV_GDL 65 +#define CLK_DIV_GPR 66 +#define CLK_DIV_GDR 67 +#define CLK_DIV_MPLL_PRE 68 +#define CLK_DIV_ACLK_400_MCUISP 69 +#define CLK_DIV_EBI 70 +#define CLK_DIV_ACLK_200 71 +#define CLK_DIV_ACLK_160 72 +#define CLK_DIV_ACLK_100 73 +#define CLK_DIV_ACLK_266 74 +#define CLK_DIV_CAM1 75 +#define CLK_DIV_CAM_BLK 76 +#define CLK_DIV_MFC 77 +#define CLK_DIV_G3D 78 +#define CLK_DIV_MIPI0_PRE 79 +#define CLK_DIV_MIPI0 80 +#define CLK_DIV_FIMD0 81 +#define CLK_DIV_UART_ISP 82 +#define CLK_DIV_SPI1_ISP_PRE 83 +#define CLK_DIV_SPI1_ISP 84 +#define CLK_DIV_SPI0_ISP_PRE 85 +#define CLK_DIV_SPI0_ISP 86 +#define CLK_DIV_TSADC_PRE 87 +#define CLK_DIV_TSADC 88 +#define CLK_DIV_MMC1_PRE 89 +#define CLK_DIV_MMC1 90 +#define CLK_DIV_MMC0_PRE 91 +#define CLK_DIV_MMC0 92 +#define CLK_DIV_UART1 93 +#define CLK_DIV_UART0 94 +#define CLK_DIV_SPI1_PRE 95 +#define CLK_DIV_SPI1 96 +#define CLK_DIV_SPI0_PRE 97 +#define CLK_DIV_SPI0 98 +#define CLK_DIV_PCM 99 +#define CLK_DIV_AUDIO 100 +#define CLK_DIV_I2S 101 +#define CLK_DIV_CORE2 102 +#define CLK_DIV_APLL 103 +#define CLK_DIV_PCLK_DBG 104 +#define CLK_DIV_ATB 105 +#define CLK_DIV_COREM 106 +#define CLK_DIV_CORE 107 +#define CLK_DIV_HPM 108 +#define CLK_DIV_COPY 109 + +/* Gates */ +#define CLK_ASYNC_G3D 128 +#define CLK_ASYNC_MFCL 129 +#define CLK_PPMULEFT 130 +#define CLK_GPIO_LEFT 131 +#define CLK_ASYNC_ISPMX 132 +#define CLK_ASYNC_FSYSD 133 +#define CLK_ASYNC_LCD0X 134 +#define CLK_ASYNC_CAMX 135 +#define CLK_PPMURIGHT 136 +#define CLK_GPIO_RIGHT 137 +#define CLK_MONOCNT 138 +#define CLK_TZPC6 139 +#define CLK_PROVISIONKEY1 140 +#define CLK_PROVISIONKEY0 141 +#define CLK_CMU_ISPPART 142 +#define CLK_TMU_APBIF 143 +#define CLK_KEYIF 144 +#define CLK_RTC 145 +#define CLK_WDT 146 +#define CLK_MCT 147 +#define CLK_SECKEY 148 +#define CLK_TZPC5 149 +#define CLK_TZPC4 150 +#define CLK_TZPC3 151 +#define CLK_TZPC2 152 +#define CLK_TZPC1 153 +#define CLK_TZPC0 154 +#define CLK_CMU_COREPART 155 +#define CLK_CMU_TOPPART 156 +#define CLK_PMU_APBIF 157 +#define CLK_SYSREG 158 +#define CLK_CHIP_ID 159 +#define CLK_QEJPEG 160 +#define CLK_PIXELASYNCM1 161 +#define CLK_PIXELASYNCM0 162 +#define CLK_PPMUCAMIF 163 +#define CLK_QEM2MSCALER 164 +#define CLK_QEGSCALER1 165 +#define CLK_QEGSCALER0 166 +#define CLK_SMMUJPEG 167 +#define CLK_SMMUM2M2SCALER 168 +#define CLK_SMMUGSCALER1 169 +#define CLK_SMMUGSCALER0 170 +#define CLK_JPEG 171 +#define CLK_M2MSCALER 172 +#define CLK_GSCALER1 173 +#define CLK_GSCALER0 174 +#define CLK_QEMFC 175 +#define CLK_PPMUMFC_L 176 +#define CLK_SMMUMFC_L 177 +#define CLK_MFC 178 +#define CLK_SMMUG3D 179 +#define CLK_QEG3D 180 +#define CLK_PPMUG3D 181 +#define CLK_G3D 182 +#define CLK_QE_CH1_LCD 183 +#define CLK_QE_CH0_LCD 184 +#define CLK_PPMULCD0 185 +#define CLK_SMMUFIMD0 186 +#define CLK_DSIM0 187 +#define CLK_FIMD0 188 +#define CLK_CAM1 189 +#define CLK_UART_ISP_TOP 190 +#define CLK_SPI1_ISP_TOP 191 +#define CLK_SPI0_ISP_TOP 192 +#define CLK_TSADC 193 +#define CLK_PPMUFILE 194 +#define CLK_USBOTG 195 +#define CLK_USBHOST 196 +#define CLK_SROMC 197 +#define CLK_SDMMC1 198 +#define CLK_SDMMC0 199 +#define CLK_PDMA1 200 +#define CLK_PDMA0 201 +#define CLK_PWM 202 +#define CLK_PCM 203 +#define CLK_I2S 204 +#define CLK_SPI1 205 +#define CLK_SPI0 206 +#define CLK_I2C7 207 +#define CLK_I2C6 208 +#define CLK_I2C5 209 +#define CLK_I2C4 210 +#define CLK_I2C3 211 +#define CLK_I2C2 212 +#define CLK_I2C1 213 +#define CLK_I2C0 214 +#define CLK_UART1 215 +#define CLK_UART0 216 +#define CLK_BLOCK_LCD 217 +#define CLK_BLOCK_G3D 218 +#define CLK_BLOCK_MFC 219 +#define CLK_BLOCK_CAM 220 +#define CLK_SMIES 221 + +/* Special clocks */ +#define CLK_SCLK_JPEG 224 +#define CLK_SCLK_M2MSCALER 225 +#define CLK_SCLK_GSCALER1 226 +#define CLK_SCLK_GSCALER0 227 +#define CLK_SCLK_MFC 228 +#define CLK_SCLK_G3D 229 +#define CLK_SCLK_MIPIDPHY2L 230 +#define CLK_SCLK_MIPI0 231 +#define CLK_SCLK_FIMD0 232 +#define CLK_SCLK_CAM1 233 +#define CLK_SCLK_UART_ISP 234 +#define CLK_SCLK_SPI1_ISP 235 +#define CLK_SCLK_SPI0_ISP 236 +#define CLK_SCLK_UPLL 237 +#define CLK_SCLK_TSADC 238 +#define CLK_SCLK_EBI 239 +#define CLK_SCLK_MMC1 240 +#define CLK_SCLK_MMC0 241 +#define CLK_SCLK_I2S 242 +#define CLK_SCLK_PCM 243 +#define CLK_SCLK_SPI1 244 +#define CLK_SCLK_SPI0 245 +#define CLK_SCLK_UART1 246 +#define CLK_SCLK_UART0 247 + +/* + * Total number of clocks of main CMU. + * NOTE: Must be equal to last clock ID increased by one. + */ +#define CLK_NR_CLKS 248 + +#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H */ diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h index 75aff33..1106ca5 100644 --- a/include/dt-bindings/clock/exynos4.h +++ b/include/dt-bindings/clock/exynos4.h @@ -33,6 +33,7 @@ #define CLK_MOUT_MPLL_USER_C 18 /* Exynos4x12 only */ #define CLK_MOUT_CORE 19 #define CLK_MOUT_APLL 20 +#define CLK_SCLK_HDMIPHY 22 /* gate for special clocks (sclk) */ #define CLK_SCLK_FIMC0 128 @@ -181,7 +182,6 @@ #define CLK_KEYIF 347 #define CLK_AUDSS 348 #define CLK_MIPI_HSI 349 /* Exynos4210 only */ -#define CLK_MDMA2 350 /* Exynos4210 only */ #define CLK_PIXELASYNCM0 351 #define CLK_PIXELASYNCM1 352 #define CLK_FIMC_LITE0 353 /* Exynos4x12 only */ diff --git a/include/dt-bindings/clock/exynos5250.h b/include/dt-bindings/clock/exynos5250.h index 922f2dc..be6e97c 100644 --- a/include/dt-bindings/clock/exynos5250.h +++ b/include/dt-bindings/clock/exynos5250.h @@ -150,11 +150,30 @@ #define CLK_G2D 345 #define CLK_MDMA0 346 #define CLK_SMMU_MDMA0 347 +#define CLK_SSS 348 +#define CLK_G3D 349 +#define CLK_SMMU_TV 350 +#define CLK_SMMU_FIMD1 351 +#define CLK_SMMU_2D 352 +#define CLK_SMMU_FIMC_ISP 353 +#define CLK_SMMU_FIMC_DRC 354 +#define CLK_SMMU_FIMC_SCC 355 +#define CLK_SMMU_FIMC_SCP 356 +#define CLK_SMMU_FIMC_FD 357 +#define CLK_SMMU_FIMC_MCU 358 +#define CLK_SMMU_FIMC_ODC 359 +#define CLK_SMMU_FIMC_DIS0 360 +#define CLK_SMMU_FIMC_DIS1 361 +#define CLK_SMMU_FIMC_3DNR 362 +#define CLK_SMMU_FIMC_LITE0 363 +#define CLK_SMMU_FIMC_LITE1 364 +#define CLK_CAMIF_TOP 365 /* mux clocks */ #define CLK_MOUT_HDMI 1024 +#define CLK_MOUT_GPLL 1025 /* must be greater than maximal clock id */ -#define CLK_NR_CLKS 1025 +#define CLK_NR_CLKS 1026 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5250_H */ diff --git a/include/dt-bindings/clock/exynos5260-clk.h b/include/dt-bindings/clock/exynos5260-clk.h new file mode 100644 index 0000000..a4bac9a --- /dev/null +++ b/include/dt-bindings/clock/exynos5260-clk.h @@ -0,0 +1,469 @@ +/* + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * Author: Rahul Sharma <rahul.sharma@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Provides Constants for Exynos5260 clocks. +*/ + +#ifndef _DT_BINDINGS_CLK_EXYNOS5260_H +#define _DT_BINDINGS_CLK_EXYNOS5260_H + +/* Clock names: <cmu><type><IP> */ + +/* List Of Clocks For CMU_TOP */ + +#define TOP_FOUT_DISP_PLL 1 +#define TOP_FOUT_AUD_PLL 2 +#define TOP_MOUT_AUDTOP_PLL_USER 3 +#define TOP_MOUT_AUD_PLL 4 +#define TOP_MOUT_DISP_PLL 5 +#define TOP_MOUT_BUSTOP_PLL_USER 6 +#define TOP_MOUT_MEMTOP_PLL_USER 7 +#define TOP_MOUT_MEDIATOP_PLL_USER 8 +#define TOP_MOUT_DISP_DISP_333 9 +#define TOP_MOUT_ACLK_DISP_333 10 +#define TOP_MOUT_DISP_DISP_222 11 +#define TOP_MOUT_ACLK_DISP_222 12 +#define TOP_MOUT_DISP_MEDIA_PIXEL 13 +#define TOP_MOUT_FIMD1 14 +#define TOP_MOUT_SCLK_PERI_SPI0_CLK 15 +#define TOP_MOUT_SCLK_PERI_SPI1_CLK 16 +#define TOP_MOUT_SCLK_PERI_SPI2_CLK 17 +#define TOP_MOUT_SCLK_PERI_UART0_UCLK 18 +#define TOP_MOUT_SCLK_PERI_UART2_UCLK 19 +#define TOP_MOUT_SCLK_PERI_UART1_UCLK 20 +#define TOP_MOUT_BUS4_BUSTOP_100 21 +#define TOP_MOUT_BUS4_BUSTOP_400 22 +#define TOP_MOUT_BUS3_BUSTOP_100 23 +#define TOP_MOUT_BUS3_BUSTOP_400 24 +#define TOP_MOUT_BUS2_BUSTOP_400 25 +#define TOP_MOUT_BUS2_BUSTOP_100 26 +#define TOP_MOUT_BUS1_BUSTOP_100 27 +#define TOP_MOUT_BUS1_BUSTOP_400 28 +#define TOP_MOUT_SCLK_FSYS_USB 29 +#define TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A 30 +#define TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A 31 +#define TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A 32 +#define TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_B 33 +#define TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_B 34 +#define TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_B 35 +#define TOP_MOUT_ACLK_ISP1_266 36 +#define TOP_MOUT_ISP1_MEDIA_266 37 +#define TOP_MOUT_ACLK_ISP1_400 38 +#define TOP_MOUT_ISP1_MEDIA_400 39 +#define TOP_MOUT_SCLK_ISP1_SPI0 40 +#define TOP_MOUT_SCLK_ISP1_SPI1 41 +#define TOP_MOUT_SCLK_ISP1_UART 42 +#define TOP_MOUT_SCLK_ISP1_SENSOR2 43 +#define TOP_MOUT_SCLK_ISP1_SENSOR1 44 +#define TOP_MOUT_SCLK_ISP1_SENSOR0 45 +#define TOP_MOUT_ACLK_MFC_333 46 +#define TOP_MOUT_MFC_BUSTOP_333 47 +#define TOP_MOUT_ACLK_G2D_333 48 +#define TOP_MOUT_G2D_BUSTOP_333 49 +#define TOP_MOUT_ACLK_GSCL_FIMC 50 +#define TOP_MOUT_GSCL_BUSTOP_FIMC 51 +#define TOP_MOUT_ACLK_GSCL_333 52 +#define TOP_MOUT_GSCL_BUSTOP_333 53 +#define TOP_MOUT_ACLK_GSCL_400 54 +#define TOP_MOUT_M2M_MEDIATOP_400 55 +#define TOP_DOUT_ACLK_MFC_333 56 +#define TOP_DOUT_ACLK_G2D_333 57 +#define TOP_DOUT_SCLK_ISP1_SENSOR2_A 58 +#define TOP_DOUT_SCLK_ISP1_SENSOR1_A 59 +#define TOP_DOUT_SCLK_ISP1_SENSOR0_A 60 +#define TOP_DOUT_ACLK_GSCL_FIMC 61 +#define TOP_DOUT_ACLK_GSCL_400 62 +#define TOP_DOUT_ACLK_GSCL_333 63 +#define TOP_DOUT_SCLK_ISP1_SPI0_B 64 +#define TOP_DOUT_SCLK_ISP1_SPI0_A 65 +#define TOP_DOUT_ACLK_ISP1_400 66 +#define TOP_DOUT_ACLK_ISP1_266 67 +#define TOP_DOUT_SCLK_ISP1_UART 68 +#define TOP_DOUT_SCLK_ISP1_SPI1_B 69 +#define TOP_DOUT_SCLK_ISP1_SPI1_A 70 +#define TOP_DOUT_SCLK_ISP1_SENSOR2_B 71 +#define TOP_DOUT_SCLK_ISP1_SENSOR1_B 72 +#define TOP_DOUT_SCLK_ISP1_SENSOR0_B 73 +#define TOP_DOUTTOP__SCLK_HPM_TARGETCLK 74 +#define TOP_DOUT_SCLK_DISP_PIXEL 75 +#define TOP_DOUT_ACLK_DISP_222 76 +#define TOP_DOUT_ACLK_DISP_333 77 +#define TOP_DOUT_ACLK_BUS4_100 78 +#define TOP_DOUT_ACLK_BUS4_400 79 +#define TOP_DOUT_ACLK_BUS3_100 80 +#define TOP_DOUT_ACLK_BUS3_400 81 +#define TOP_DOUT_ACLK_BUS2_100 82 +#define TOP_DOUT_ACLK_BUS2_400 83 +#define TOP_DOUT_ACLK_BUS1_100 84 +#define TOP_DOUT_ACLK_BUS1_400 85 +#define TOP_DOUT_SCLK_PERI_SPI1_B 86 +#define TOP_DOUT_SCLK_PERI_SPI1_A 87 +#define TOP_DOUT_SCLK_PERI_SPI0_B 88 +#define TOP_DOUT_SCLK_PERI_SPI0_A 89 +#define TOP_DOUT_SCLK_PERI_UART0 90 +#define TOP_DOUT_SCLK_PERI_UART2 91 +#define TOP_DOUT_SCLK_PERI_UART1 92 +#define TOP_DOUT_SCLK_PERI_SPI2_B 93 +#define TOP_DOUT_SCLK_PERI_SPI2_A 94 +#define TOP_DOUT_ACLK_PERI_AUD 95 +#define TOP_DOUT_ACLK_PERI_66 96 +#define TOP_DOUT_SCLK_FSYS_MMC0_SDCLKIN_B 97 +#define TOP_DOUT_SCLK_FSYS_MMC0_SDCLKIN_A 98 +#define TOP_DOUT_SCLK_FSYS_USBDRD30_SUSPEND_CLK 99 +#define TOP_DOUT_ACLK_FSYS_200 100 +#define TOP_DOUT_SCLK_FSYS_MMC2_SDCLKIN_B 101 +#define TOP_DOUT_SCLK_FSYS_MMC2_SDCLKIN_A 102 +#define TOP_DOUT_SCLK_FSYS_MMC1_SDCLKIN_B 103 +#define TOP_DOUT_SCLK_FSYS_MMC1_SDCLKIN_A 104 +#define TOP_SCLK_FIMD1 105 +#define TOP_SCLK_MMC2 106 +#define TOP_SCLK_MMC1 107 +#define TOP_SCLK_MMC0 108 +#define PHYCLK_DPTX_PHY_CH3_TXD_CLK 109 +#define PHYCLK_DPTX_PHY_CH2_TXD_CLK 110 +#define PHYCLK_DPTX_PHY_CH1_TXD_CLK 111 +#define PHYCLK_DPTX_PHY_CH0_TXD_CLK 112 +#define phyclk_hdmi_phy_tmds_clko 113 +#define PHYCLK_HDMI_PHY_PIXEL_CLKO 114 +#define PHYCLK_HDMI_LINK_O_TMDS_CLKHI 115 +#define PHYCLK_MIPI_DPHY_4L_M_TXBYTECLKHS 116 +#define PHYCLK_DPTX_PHY_O_REF_CLK_24M 117 +#define PHYCLK_DPTX_PHY_CLK_DIV2 118 +#define PHYCLK_MIPI_DPHY_4L_M_RXCLKESC0 119 +#define PHYCLK_USBHOST20_PHY_PHYCLOCK 120 +#define PHYCLK_USBHOST20_PHY_FREECLK 121 +#define PHYCLK_USBHOST20_PHY_CLK48MOHCI 122 +#define PHYCLK_USBDRD30_UDRD30_PIPE_PCLK 123 +#define PHYCLK_USBDRD30_UDRD30_PHYCLOCK 124 +#define TOP_NR_CLK 125 + + +/* List Of Clocks For CMU_EGL */ + +#define EGL_FOUT_EGL_PLL 1 +#define EGL_FOUT_EGL_DPLL 2 +#define EGL_MOUT_EGL_B 3 +#define EGL_MOUT_EGL_PLL 4 +#define EGL_DOUT_EGL_PLL 5 +#define EGL_DOUT_EGL_PCLK_DBG 6 +#define EGL_DOUT_EGL_ATCLK 7 +#define EGL_DOUT_PCLK_EGL 8 +#define EGL_DOUT_ACLK_EGL 9 +#define EGL_DOUT_EGL2 10 +#define EGL_DOUT_EGL1 11 +#define EGL_NR_CLK 12 + + +/* List Of Clocks For CMU_KFC */ + +#define KFC_FOUT_KFC_PLL 1 +#define KFC_MOUT_KFC_PLL 2 +#define KFC_MOUT_KFC 3 +#define KFC_DOUT_KFC_PLL 4 +#define KFC_DOUT_PCLK_KFC 5 +#define KFC_DOUT_ACLK_KFC 6 +#define KFC_DOUT_KFC_PCLK_DBG 7 +#define KFC_DOUT_KFC_ATCLK 8 +#define KFC_DOUT_KFC2 9 +#define KFC_DOUT_KFC1 10 +#define KFC_NR_CLK 11 + + +/* List Of Clocks For CMU_MIF */ + +#define MIF_FOUT_MEM_PLL 1 +#define MIF_FOUT_MEDIA_PLL 2 +#define MIF_FOUT_BUS_PLL 3 +#define MIF_MOUT_CLK2X_PHY 4 +#define MIF_MOUT_MIF_DREX2X 5 +#define MIF_MOUT_CLKM_PHY 6 +#define MIF_MOUT_MIF_DREX 7 +#define MIF_MOUT_MEDIA_PLL 8 +#define MIF_MOUT_BUS_PLL 9 +#define MIF_MOUT_MEM_PLL 10 +#define MIF_DOUT_ACLK_BUS_100 11 +#define MIF_DOUT_ACLK_BUS_200 12 +#define MIF_DOUT_ACLK_MIF_466 13 +#define MIF_DOUT_CLK2X_PHY 14 +#define MIF_DOUT_CLKM_PHY 15 +#define MIF_DOUT_BUS_PLL 16 +#define MIF_DOUT_MEM_PLL 17 +#define MIF_DOUT_MEDIA_PLL 18 +#define MIF_CLK_LPDDR3PHY_WRAP1 19 +#define MIF_CLK_LPDDR3PHY_WRAP0 20 +#define MIF_CLK_MONOCNT 21 +#define MIF_CLK_MIF_RTC 22 +#define MIF_CLK_DREX1 23 +#define MIF_CLK_DREX0 24 +#define MIF_CLK_INTMEM 25 +#define MIF_SCLK_LPDDR3PHY_WRAP_U1 26 +#define MIF_SCLK_LPDDR3PHY_WRAP_U0 27 +#define MIF_NR_CLK 28 + + +/* List Of Clocks For CMU_G3D */ + +#define G3D_FOUT_G3D_PLL 1 +#define G3D_MOUT_G3D_PLL 2 +#define G3D_DOUT_PCLK_G3D 3 +#define G3D_DOUT_ACLK_G3D 4 +#define G3D_CLK_G3D_HPM 5 +#define G3D_CLK_G3D 6 +#define G3D_NR_CLK 7 + + +/* List Of Clocks For CMU_AUD */ + +#define AUD_MOUT_SCLK_AUD_PCM 1 +#define AUD_MOUT_SCLK_AUD_I2S 2 +#define AUD_MOUT_AUD_PLL_USER 3 +#define AUD_DOUT_ACLK_AUD_131 4 +#define AUD_DOUT_SCLK_AUD_UART 5 +#define AUD_DOUT_SCLK_AUD_PCM 6 +#define AUD_DOUT_SCLK_AUD_I2S 7 +#define AUD_CLK_AUD_UART 8 +#define AUD_CLK_PCM 9 +#define AUD_CLK_I2S 10 +#define AUD_CLK_DMAC 11 +#define AUD_CLK_SRAMC 12 +#define AUD_SCLK_AUD_UART 13 +#define AUD_SCLK_PCM 14 +#define AUD_SCLK_I2S 15 +#define AUD_NR_CLK 16 + + +/* List Of Clocks For CMU_MFC */ + +#define MFC_MOUT_ACLK_MFC_333_USER 1 +#define MFC_DOUT_PCLK_MFC_83 2 +#define MFC_CLK_MFC 3 +#define MFC_CLK_SMMU2_MFCM1 4 +#define MFC_CLK_SMMU2_MFCM0 5 +#define MFC_NR_CLK 6 + + +/* List Of Clocks For CMU_GSCL */ + +#define GSCL_MOUT_ACLK_CSIS 1 +#define GSCL_MOUT_ACLK_GSCL_FIMC_USER 2 +#define GSCL_MOUT_ACLK_M2M_400_USER 3 +#define GSCL_MOUT_ACLK_GSCL_333_USER 4 +#define GSCL_DOUT_ACLK_CSIS_200 5 +#define GSCL_DOUT_PCLK_M2M_100 6 +#define GSCL_CLK_PIXEL_GSCL1 7 +#define GSCL_CLK_PIXEL_GSCL0 8 +#define GSCL_CLK_MSCL1 9 +#define GSCL_CLK_MSCL0 10 +#define GSCL_CLK_GSCL1 11 +#define GSCL_CLK_GSCL0 12 +#define GSCL_CLK_FIMC_LITE_D 13 +#define GSCL_CLK_FIMC_LITE_B 14 +#define GSCL_CLK_FIMC_LITE_A 15 +#define GSCL_CLK_CSIS1 16 +#define GSCL_CLK_CSIS0 17 +#define GSCL_CLK_SMMU3_LITE_D 18 +#define GSCL_CLK_SMMU3_LITE_B 19 +#define GSCL_CLK_SMMU3_LITE_A 20 +#define GSCL_CLK_SMMU3_GSCL0 21 +#define GSCL_CLK_SMMU3_GSCL1 22 +#define GSCL_CLK_SMMU3_MSCL0 23 +#define GSCL_CLK_SMMU3_MSCL1 24 +#define GSCL_SCLK_CSIS1_WRAP 25 +#define GSCL_SCLK_CSIS0_WRAP 26 +#define GSCL_NR_CLK 27 + + +/* List Of Clocks For CMU_FSYS */ + +#define FSYS_MOUT_PHYCLK_USBHOST20_PHYCLK_USER 1 +#define FSYS_MOUT_PHYCLK_USBHOST20_FREECLK_USER 2 +#define FSYS_MOUT_PHYCLK_USBHOST20_CLK48MOHCI_USER 3 +#define FSYS_MOUT_PHYCLK_USBDRD30_PIPE_PCLK_USER 4 +#define FSYS_MOUT_PHYCLK_USBDRD30_PHYCLOCK_USER 5 +#define FSYS_CLK_TSI 6 +#define FSYS_CLK_USBLINK 7 +#define FSYS_CLK_USBHOST20 8 +#define FSYS_CLK_USBDRD30 9 +#define FSYS_CLK_SROMC 10 +#define FSYS_CLK_PDMA 11 +#define FSYS_CLK_MMC2 12 +#define FSYS_CLK_MMC1 13 +#define FSYS_CLK_MMC0 14 +#define FSYS_CLK_RTIC 15 +#define FSYS_CLK_SMMU_RTIC 16 +#define FSYS_PHYCLK_USBDRD30 17 +#define FSYS_PHYCLK_USBHOST20 18 +#define FSYS_NR_CLK 19 + + +/* List Of Clocks For CMU_PERI */ + +#define PERI_MOUT_SCLK_SPDIF 1 +#define PERI_MOUT_SCLK_I2SCOD 2 +#define PERI_MOUT_SCLK_PCM 3 +#define PERI_DOUT_I2S 4 +#define PERI_DOUT_PCM 5 +#define PERI_CLK_WDT_KFC 6 +#define PERI_CLK_WDT_EGL 7 +#define PERI_CLK_HSIC3 8 +#define PERI_CLK_HSIC2 9 +#define PERI_CLK_HSIC1 10 +#define PERI_CLK_HSIC0 11 +#define PERI_CLK_PCM 12 +#define PERI_CLK_MCT 13 +#define PERI_CLK_I2S 14 +#define PERI_CLK_I2CHDMI 15 +#define PERI_CLK_I2C7 16 +#define PERI_CLK_I2C6 17 +#define PERI_CLK_I2C5 18 +#define PERI_CLK_I2C4 19 +#define PERI_CLK_I2C9 20 +#define PERI_CLK_I2C8 21 +#define PERI_CLK_I2C11 22 +#define PERI_CLK_I2C10 23 +#define PERI_CLK_HDMICEC 24 +#define PERI_CLK_EFUSE_WRITER 25 +#define PERI_CLK_ABB 26 +#define PERI_CLK_UART2 27 +#define PERI_CLK_UART1 28 +#define PERI_CLK_UART0 29 +#define PERI_CLK_ADC 30 +#define PERI_CLK_TMU4 31 +#define PERI_CLK_TMU3 32 +#define PERI_CLK_TMU2 33 +#define PERI_CLK_TMU1 34 +#define PERI_CLK_TMU0 35 +#define PERI_CLK_SPI2 36 +#define PERI_CLK_SPI1 37 +#define PERI_CLK_SPI0 38 +#define PERI_CLK_SPDIF 39 +#define PERI_CLK_PWM 40 +#define PERI_CLK_UART4 41 +#define PERI_CLK_CHIPID 42 +#define PERI_CLK_PROVKEY0 43 +#define PERI_CLK_PROVKEY1 44 +#define PERI_CLK_SECKEY 45 +#define PERI_CLK_TOP_RTC 46 +#define PERI_CLK_TZPC10 47 +#define PERI_CLK_TZPC9 48 +#define PERI_CLK_TZPC8 49 +#define PERI_CLK_TZPC7 50 +#define PERI_CLK_TZPC6 51 +#define PERI_CLK_TZPC5 52 +#define PERI_CLK_TZPC4 53 +#define PERI_CLK_TZPC3 54 +#define PERI_CLK_TZPC2 55 +#define PERI_CLK_TZPC1 56 +#define PERI_CLK_TZPC0 57 +#define PERI_SCLK_UART2 58 +#define PERI_SCLK_UART1 59 +#define PERI_SCLK_UART0 60 +#define PERI_SCLK_SPI2 61 +#define PERI_SCLK_SPI1 62 +#define PERI_SCLK_SPI0 63 +#define PERI_SCLK_SPDIF 64 +#define PERI_SCLK_I2S 65 +#define PERI_SCLK_PCM1 66 +#define PERI_NR_CLK 67 + + +/* List Of Clocks For CMU_DISP */ + +#define DISP_MOUT_SCLK_HDMI_SPDIF 1 +#define DISP_MOUT_SCLK_HDMI_PIXEL 2 +#define DISP_MOUT_PHYCLK_MIPI_DPHY_4LMRXCLK_ESC0_USER 3 +#define DISP_MOUT_PHYCLK_HDMI_PHY_TMDS_CLKO_USER 4 +#define DISP_MOUT_PHYCLK_HDMI_PHY_REF_CLKO_USER 5 +#define DISP_MOUT_HDMI_PHY_PIXEL 6 +#define DISP_MOUT_PHYCLK_HDMI_LINK_O_TMDS_CLKHI_USER 7 +#define DISP_MOUT_PHYCLK_MIPI_DPHY_4L_M_TXBYTE_CLKHS 8 +#define DISP_MOUT_PHYCLK_DPTX_PHY_O_REF_CLK_24M_USER 9 +#define DISP_MOUT_PHYCLK_DPTX_PHY_CLK_DIV2_USER 10 +#define DISP_MOUT_PHYCLK_DPTX_PHY_CH3_TXD_CLK_USER 11 +#define DISP_MOUT_PHYCLK_DPTX_PHY_CH2_TXD_CLK_USER 12 +#define DISP_MOUT_PHYCLK_DPTX_PHY_CH1_TXD_CLK_USER 13 +#define DISP_MOUT_PHYCLK_DPTX_PHY_CH0_TXD_CLK_USER 14 +#define DISP_MOUT_ACLK_DISP_222_USER 15 +#define DISP_MOUT_SCLK_DISP_PIXEL_USER 16 +#define DISP_MOUT_ACLK_DISP_333_USER 17 +#define DISP_DOUT_SCLK_HDMI_PHY_PIXEL_CLKI 18 +#define DISP_DOUT_SCLK_FIMD1_EXTCLKPLL 19 +#define DISP_DOUT_PCLK_DISP_111 20 +#define DISP_CLK_SMMU_TV 21 +#define DISP_CLK_SMMU_FIMD1M1 22 +#define DISP_CLK_SMMU_FIMD1M0 23 +#define DISP_CLK_PIXEL_MIXER 24 +#define DISP_CLK_PIXEL_DISP 25 +#define DISP_CLK_MIXER 26 +#define DISP_CLK_MIPIPHY 27 +#define DISP_CLK_HDMIPHY 28 +#define DISP_CLK_HDMI 29 +#define DISP_CLK_FIMD1 30 +#define DISP_CLK_DSIM1 31 +#define DISP_CLK_DPPHY 32 +#define DISP_CLK_DP 33 +#define DISP_SCLK_PIXEL 34 +#define DISP_MOUT_HDMI_PHY_PIXEL_USER 35 +#define DISP_NR_CLK 36 + + +/* List Of Clocks For CMU_G2D */ + +#define G2D_MOUT_ACLK_G2D_333_USER 1 +#define G2D_DOUT_PCLK_G2D_83 2 +#define G2D_CLK_SMMU3_JPEG 3 +#define G2D_CLK_MDMA 4 +#define G2D_CLK_JPEG 5 +#define G2D_CLK_G2D 6 +#define G2D_CLK_SSS 7 +#define G2D_CLK_SLIM_SSS 8 +#define G2D_CLK_SMMU_SLIM_SSS 9 +#define G2D_CLK_SMMU_SSS 10 +#define G2D_CLK_SMMU_MDMA 11 +#define G2D_CLK_SMMU3_G2D 12 +#define G2D_NR_CLK 13 + + +/* List Of Clocks For CMU_ISP */ + +#define ISP_MOUT_ISP_400_USER 1 +#define ISP_MOUT_ISP_266_USER 2 +#define ISP_DOUT_SCLK_MPWM 3 +#define ISP_DOUT_CA5_PCLKDBG 4 +#define ISP_DOUT_CA5_ATCLKIN 5 +#define ISP_DOUT_PCLK_ISP_133 6 +#define ISP_DOUT_PCLK_ISP_66 7 +#define ISP_CLK_GIC 8 +#define ISP_CLK_WDT 9 +#define ISP_CLK_UART 10 +#define ISP_CLK_SPI1 11 +#define ISP_CLK_SPI0 12 +#define ISP_CLK_SMMU_SCALERP 13 +#define ISP_CLK_SMMU_SCALERC 14 +#define ISP_CLK_SMMU_ISPCX 15 +#define ISP_CLK_SMMU_ISP 16 +#define ISP_CLK_SMMU_FD 17 +#define ISP_CLK_SMMU_DRC 18 +#define ISP_CLK_PWM 19 +#define ISP_CLK_MTCADC 20 +#define ISP_CLK_MPWM 21 +#define ISP_CLK_MCUCTL 22 +#define ISP_CLK_I2C1 23 +#define ISP_CLK_I2C0 24 +#define ISP_CLK_FIMC_SCALERP 25 +#define ISP_CLK_FIMC_SCALERC 26 +#define ISP_CLK_FIMC 27 +#define ISP_CLK_FIMC_FD 28 +#define ISP_CLK_FIMC_DRC 29 +#define ISP_CLK_CA5 30 +#define ISP_SCLK_SPI0_EXT 31 +#define ISP_SCLK_SPI1_EXT 32 +#define ISP_SCLK_UART_EXT 33 +#define ISP_NR_CLK 34 + +#endif diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h new file mode 100644 index 0000000..9b180f0 --- /dev/null +++ b/include/dt-bindings/clock/exynos5410.h @@ -0,0 +1,33 @@ +#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5410_H +#define _DT_BINDINGS_CLOCK_EXYNOS_5410_H + +/* core clocks */ +#define CLK_FIN_PLL 1 +#define CLK_FOUT_APLL 2 +#define CLK_FOUT_CPLL 3 +#define CLK_FOUT_MPLL 4 +#define CLK_FOUT_BPLL 5 +#define CLK_FOUT_KPLL 6 + +/* gate for special clocks (sclk) */ +#define CLK_SCLK_UART0 128 +#define CLK_SCLK_UART1 129 +#define CLK_SCLK_UART2 130 +#define CLK_SCLK_UART3 131 +#define CLK_SCLK_MMC0 132 +#define CLK_SCLK_MMC1 133 +#define CLK_SCLK_MMC2 134 + +/* gate clocks */ +#define CLK_UART0 257 +#define CLK_UART1 258 +#define CLK_UART2 259 +#define CLK_UART3 260 +#define CLK_MCT 315 +#define CLK_MMC0 351 +#define CLK_MMC1 352 +#define CLK_MMC2 353 + +#define CLK_NR_CLKS 512 + +#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5410_H */ diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h index 5eefd88..97dcb89 100644 --- a/include/dt-bindings/clock/exynos5420.h +++ b/include/dt-bindings/clock/exynos5420.h @@ -58,6 +58,9 @@ #define CLK_SCLK_GSCL_WA 156 #define CLK_SCLK_GSCL_WB 157 #define CLK_SCLK_HDMIPHY 158 +#define CLK_MAU_EPLL 159 +#define CLK_SCLK_HSIC_12M 160 +#define CLK_SCLK_MPHY_IXTAL24 161 /* gate clocks */ #define CLK_ACLK66_PERIC 256 @@ -69,10 +72,10 @@ #define CLK_I2C1 262 #define CLK_I2C2 263 #define CLK_I2C3 264 -#define CLK_I2C4 265 -#define CLK_I2C5 266 -#define CLK_I2C6 267 -#define CLK_I2C7 268 +#define CLK_USI0 265 +#define CLK_USI1 266 +#define CLK_USI2 267 +#define CLK_USI3 268 #define CLK_I2C_HDMI 269 #define CLK_TSADC 270 #define CLK_SPI0 271 @@ -85,9 +88,9 @@ #define CLK_PCM2 278 #define CLK_PWM 279 #define CLK_SPDIF 280 -#define CLK_I2C8 281 -#define CLK_I2C9 282 -#define CLK_I2C10 283 +#define CLK_USI4 281 +#define CLK_USI5 282 +#define CLK_USI6 283 #define CLK_ACLK66_PSGEN 300 #define CLK_CHIPID 301 #define CLK_SYSREG 302 @@ -140,7 +143,8 @@ #define CLK_HDMI 413 #define CLK_ACLK300_DISP1 420 #define CLK_FIMD1 421 -#define CLK_SMMU_FIMD1 422 +#define CLK_SMMU_FIMD1M0 422 +#define CLK_SMMU_FIMD1M1 423 #define CLK_ACLK166 430 #define CLK_MIXER 431 #define CLK_ACLK266 440 @@ -152,6 +156,7 @@ #define CLK_JPEG 451 #define CLK_JPEG2 452 #define CLK_SMMU_JPEG 453 +#define CLK_SMMU_JPEG2 454 #define CLK_ACLK300_GSCL 460 #define CLK_SMMU_GSCL0 461 #define CLK_SMMU_GSCL1 462 @@ -159,7 +164,7 @@ #define CLK_GSCL_WB 464 #define CLK_GSCL0 465 #define CLK_GSCL1 466 -#define CLK_CLK_3AA 467 +#define CLK_FIMC_3AA 467 #define CLK_ACLK266_G2D 470 #define CLK_SSS 471 #define CLK_SLIM_SSS 472 @@ -172,12 +177,32 @@ #define CLK_SMMU_FIMCL1 493 #define CLK_SMMU_FIMCL3 494 #define CLK_FIMC_LITE3 495 +#define CLK_FIMC_LITE0 496 +#define CLK_FIMC_LITE1 497 #define CLK_ACLK_G3D 500 #define CLK_G3D 501 #define CLK_SMMU_MIXER 502 +#define CLK_SMMU_G2D 503 +#define CLK_SMMU_MDMA0 504 +#define CLK_MC 505 +#define CLK_TOP_RTC 506 +#define CLK_SCLK_UART_ISP 510 +#define CLK_SCLK_SPI0_ISP 511 +#define CLK_SCLK_SPI1_ISP 512 +#define CLK_SCLK_PWM_ISP 513 +#define CLK_SCLK_ISP_SENSOR0 514 +#define CLK_SCLK_ISP_SENSOR1 515 +#define CLK_SCLK_ISP_SENSOR2 516 +#define CLK_ACLK432_SCALER 517 +#define CLK_ACLK432_CAM 518 +#define CLK_ACLK_FL1550_CAM 519 +#define CLK_ACLK550_CAM 520 /* mux clocks */ #define CLK_MOUT_HDMI 640 +#define CLK_MOUT_G3D 641 +#define CLK_MOUT_VPLL 642 +#define CLK_MOUT_MAUDIO0 643 /* divider clocks */ #define CLK_DOUT_PIXEL 768 diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h new file mode 100644 index 0000000..421d8bb --- /dev/null +++ b/include/dt-bindings/clock/imx6sx-clock.h @@ -0,0 +1,256 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __DT_BINDINGS_CLOCK_IMX6SX_H +#define __DT_BINDINGS_CLOCK_IMX6SX_H + +#define IMX6SX_CLK_DUMMY 0 +#define IMX6SX_CLK_CKIL 1 +#define IMX6SX_CLK_CKIH 2 +#define IMX6SX_CLK_OSC 3 +#define IMX6SX_CLK_PLL1_SYS 4 +#define IMX6SX_CLK_PLL2_BUS 5 +#define IMX6SX_CLK_PLL3_USB_OTG 6 +#define IMX6SX_CLK_PLL4_AUDIO 7 +#define IMX6SX_CLK_PLL5_VIDEO 8 +#define IMX6SX_CLK_PLL6_ENET 9 +#define IMX6SX_CLK_PLL7_USB_HOST 10 +#define IMX6SX_CLK_USBPHY1 11 +#define IMX6SX_CLK_USBPHY2 12 +#define IMX6SX_CLK_USBPHY1_GATE 13 +#define IMX6SX_CLK_USBPHY2_GATE 14 +#define IMX6SX_CLK_PCIE_REF 15 +#define IMX6SX_CLK_PCIE_REF_125M 16 +#define IMX6SX_CLK_ENET_REF 17 +#define IMX6SX_CLK_PLL2_PFD0 18 +#define IMX6SX_CLK_PLL2_PFD1 19 +#define IMX6SX_CLK_PLL2_PFD2 20 +#define IMX6SX_CLK_PLL2_PFD3 21 +#define IMX6SX_CLK_PLL3_PFD0 22 +#define IMX6SX_CLK_PLL3_PFD1 23 +#define IMX6SX_CLK_PLL3_PFD2 24 +#define IMX6SX_CLK_PLL3_PFD3 25 +#define IMX6SX_CLK_PLL2_198M 26 +#define IMX6SX_CLK_PLL3_120M 27 +#define IMX6SX_CLK_PLL3_80M 28 +#define IMX6SX_CLK_PLL3_60M 29 +#define IMX6SX_CLK_TWD 30 +#define IMX6SX_CLK_PLL4_POST_DIV 31 +#define IMX6SX_CLK_PLL4_AUDIO_DIV 32 +#define IMX6SX_CLK_PLL5_POST_DIV 33 +#define IMX6SX_CLK_PLL5_VIDEO_DIV 34 +#define IMX6SX_CLK_STEP 35 +#define IMX6SX_CLK_PLL1_SW 36 +#define IMX6SX_CLK_OCRAM_SEL 37 +#define IMX6SX_CLK_PERIPH_PRE 38 +#define IMX6SX_CLK_PERIPH2_PRE 39 +#define IMX6SX_CLK_PERIPH_CLK2_SEL 40 +#define IMX6SX_CLK_PERIPH2_CLK2_SEL 41 +#define IMX6SX_CLK_PCIE_AXI_SEL 42 +#define IMX6SX_CLK_GPU_AXI_SEL 43 +#define IMX6SX_CLK_GPU_CORE_SEL 44 +#define IMX6SX_CLK_EIM_SLOW_SEL 45 +#define IMX6SX_CLK_USDHC1_SEL 46 +#define IMX6SX_CLK_USDHC2_SEL 47 +#define IMX6SX_CLK_USDHC3_SEL 48 +#define IMX6SX_CLK_USDHC4_SEL 49 +#define IMX6SX_CLK_SSI1_SEL 50 +#define IMX6SX_CLK_SSI2_SEL 51 +#define IMX6SX_CLK_SSI3_SEL 52 +#define IMX6SX_CLK_QSPI1_SEL 53 +#define IMX6SX_CLK_PERCLK_SEL 54 +#define IMX6SX_CLK_VID_SEL 55 +#define IMX6SX_CLK_ESAI_SEL 56 +#define IMX6SX_CLK_LDB_DI0_DIV_SEL 57 +#define IMX6SX_CLK_LDB_DI1_DIV_SEL 58 +#define IMX6SX_CLK_CAN_SEL 59 +#define IMX6SX_CLK_UART_SEL 60 +#define IMX6SX_CLK_QSPI2_SEL 61 +#define IMX6SX_CLK_LDB_DI1_SEL 62 +#define IMX6SX_CLK_LDB_DI0_SEL 63 +#define IMX6SX_CLK_SPDIF_SEL 64 +#define IMX6SX_CLK_AUDIO_SEL 65 +#define IMX6SX_CLK_ENET_PRE_SEL 66 +#define IMX6SX_CLK_ENET_SEL 67 +#define IMX6SX_CLK_M4_PRE_SEL 68 +#define IMX6SX_CLK_M4_SEL 69 +#define IMX6SX_CLK_ECSPI_SEL 70 +#define IMX6SX_CLK_LCDIF1_PRE_SEL 71 +#define IMX6SX_CLK_LCDIF2_PRE_SEL 72 +#define IMX6SX_CLK_LCDIF1_SEL 73 +#define IMX6SX_CLK_LCDIF2_SEL 74 +#define IMX6SX_CLK_DISPLAY_SEL 75 +#define IMX6SX_CLK_CSI_SEL 76 +#define IMX6SX_CLK_CKO1_SEL 77 +#define IMX6SX_CLK_CKO2_SEL 78 +#define IMX6SX_CLK_CKO 79 +#define IMX6SX_CLK_PERIPH_CLK2 80 +#define IMX6SX_CLK_PERIPH2_CLK2 81 +#define IMX6SX_CLK_IPG 82 +#define IMX6SX_CLK_GPU_CORE_PODF 83 +#define IMX6SX_CLK_GPU_AXI_PODF 84 +#define IMX6SX_CLK_LCDIF1_PODF 85 +#define IMX6SX_CLK_QSPI1_PODF 86 +#define IMX6SX_CLK_EIM_SLOW_PODF 87 +#define IMX6SX_CLK_LCDIF2_PODF 88 +#define IMX6SX_CLK_PERCLK 89 +#define IMX6SX_CLK_VID_PODF 90 +#define IMX6SX_CLK_CAN_PODF 91 +#define IMX6SX_CLK_USDHC1_PODF 92 +#define IMX6SX_CLK_USDHC2_PODF 93 +#define IMX6SX_CLK_USDHC3_PODF 94 +#define IMX6SX_CLK_USDHC4_PODF 95 +#define IMX6SX_CLK_UART_PODF 96 +#define IMX6SX_CLK_ESAI_PRED 97 +#define IMX6SX_CLK_ESAI_PODF 98 +#define IMX6SX_CLK_SSI3_PRED 99 +#define IMX6SX_CLK_SSI3_PODF 100 +#define IMX6SX_CLK_SSI1_PRED 101 +#define IMX6SX_CLK_SSI1_PODF 102 +#define IMX6SX_CLK_QSPI2_PRED 103 +#define IMX6SX_CLK_QSPI2_PODF 104 +#define IMX6SX_CLK_SSI2_PRED 105 +#define IMX6SX_CLK_SSI2_PODF 106 +#define IMX6SX_CLK_SPDIF_PRED 107 +#define IMX6SX_CLK_SPDIF_PODF 108 +#define IMX6SX_CLK_AUDIO_PRED 109 +#define IMX6SX_CLK_AUDIO_PODF 110 +#define IMX6SX_CLK_ENET_PODF 111 +#define IMX6SX_CLK_M4_PODF 112 +#define IMX6SX_CLK_ECSPI_PODF 113 +#define IMX6SX_CLK_LCDIF1_PRED 114 +#define IMX6SX_CLK_LCDIF2_PRED 115 +#define IMX6SX_CLK_DISPLAY_PODF 116 +#define IMX6SX_CLK_CSI_PODF 117 +#define IMX6SX_CLK_LDB_DI0_DIV_3_5 118 +#define IMX6SX_CLK_LDB_DI0_DIV_7 119 +#define IMX6SX_CLK_LDB_DI1_DIV_3_5 120 +#define IMX6SX_CLK_LDB_DI1_DIV_7 121 +#define IMX6SX_CLK_CKO1_PODF 122 +#define IMX6SX_CLK_CKO2_PODF 123 +#define IMX6SX_CLK_PERIPH 124 +#define IMX6SX_CLK_PERIPH2 125 +#define IMX6SX_CLK_OCRAM 126 +#define IMX6SX_CLK_AHB 127 +#define IMX6SX_CLK_MMDC_PODF 128 +#define IMX6SX_CLK_ARM 129 +#define IMX6SX_CLK_AIPS_TZ1 130 +#define IMX6SX_CLK_AIPS_TZ2 131 +#define IMX6SX_CLK_APBH_DMA 132 +#define IMX6SX_CLK_ASRC_GATE 133 +#define IMX6SX_CLK_CAAM_MEM 134 +#define IMX6SX_CLK_CAAM_ACLK 135 +#define IMX6SX_CLK_CAAM_IPG 136 +#define IMX6SX_CLK_CAN1_IPG 137 +#define IMX6SX_CLK_CAN1_SERIAL 138 +#define IMX6SX_CLK_CAN2_IPG 139 +#define IMX6SX_CLK_CAN2_SERIAL 140 +#define IMX6SX_CLK_CPU_DEBUG 141 +#define IMX6SX_CLK_DCIC1 142 +#define IMX6SX_CLK_DCIC2 143 +#define IMX6SX_CLK_AIPS_TZ3 144 +#define IMX6SX_CLK_ECSPI1 145 +#define IMX6SX_CLK_ECSPI2 146 +#define IMX6SX_CLK_ECSPI3 147 +#define IMX6SX_CLK_ECSPI4 148 +#define IMX6SX_CLK_ECSPI5 149 +#define IMX6SX_CLK_EPIT1 150 +#define IMX6SX_CLK_EPIT2 151 +#define IMX6SX_CLK_ESAI_EXTAL 152 +#define IMX6SX_CLK_WAKEUP 153 +#define IMX6SX_CLK_GPT_BUS 154 +#define IMX6SX_CLK_GPT_SERIAL 155 +#define IMX6SX_CLK_GPU 156 +#define IMX6SX_CLK_OCRAM_S 157 +#define IMX6SX_CLK_CANFD 158 +#define IMX6SX_CLK_CSI 159 +#define IMX6SX_CLK_I2C1 160 +#define IMX6SX_CLK_I2C2 161 +#define IMX6SX_CLK_I2C3 162 +#define IMX6SX_CLK_OCOTP 163 +#define IMX6SX_CLK_IOMUXC 164 +#define IMX6SX_CLK_IPMUX1 165 +#define IMX6SX_CLK_IPMUX2 166 +#define IMX6SX_CLK_IPMUX3 167 +#define IMX6SX_CLK_TZASC1 168 +#define IMX6SX_CLK_LCDIF_APB 169 +#define IMX6SX_CLK_PXP_AXI 170 +#define IMX6SX_CLK_M4 171 +#define IMX6SX_CLK_ENET 172 +#define IMX6SX_CLK_DISPLAY_AXI 173 +#define IMX6SX_CLK_LCDIF2_PIX 174 +#define IMX6SX_CLK_LCDIF1_PIX 175 +#define IMX6SX_CLK_LDB_DI0 176 +#define IMX6SX_CLK_QSPI1 177 +#define IMX6SX_CLK_MLB 178 +#define IMX6SX_CLK_MMDC_P0_FAST 179 +#define IMX6SX_CLK_MMDC_P0_IPG 180 +#define IMX6SX_CLK_AXI 181 +#define IMX6SX_CLK_PCIE_AXI 182 +#define IMX6SX_CLK_QSPI2 183 +#define IMX6SX_CLK_PER1_BCH 184 +#define IMX6SX_CLK_PER2_MAIN 185 +#define IMX6SX_CLK_PWM1 186 +#define IMX6SX_CLK_PWM2 187 +#define IMX6SX_CLK_PWM3 188 +#define IMX6SX_CLK_PWM4 189 +#define IMX6SX_CLK_GPMI_BCH_APB 190 +#define IMX6SX_CLK_GPMI_BCH 191 +#define IMX6SX_CLK_GPMI_IO 192 +#define IMX6SX_CLK_GPMI_APB 193 +#define IMX6SX_CLK_ROM 194 +#define IMX6SX_CLK_SDMA 195 +#define IMX6SX_CLK_SPBA 196 +#define IMX6SX_CLK_SPDIF 197 +#define IMX6SX_CLK_SSI1_IPG 198 +#define IMX6SX_CLK_SSI2_IPG 199 +#define IMX6SX_CLK_SSI3_IPG 200 +#define IMX6SX_CLK_SSI1 201 +#define IMX6SX_CLK_SSI2 202 +#define IMX6SX_CLK_SSI3 203 +#define IMX6SX_CLK_UART_IPG 204 +#define IMX6SX_CLK_UART_SERIAL 205 +#define IMX6SX_CLK_SAI1 206 +#define IMX6SX_CLK_SAI2 207 +#define IMX6SX_CLK_USBOH3 208 +#define IMX6SX_CLK_USDHC1 209 +#define IMX6SX_CLK_USDHC2 210 +#define IMX6SX_CLK_USDHC3 211 +#define IMX6SX_CLK_USDHC4 212 +#define IMX6SX_CLK_EIM_SLOW 213 +#define IMX6SX_CLK_PWM8 214 +#define IMX6SX_CLK_VADC 215 +#define IMX6SX_CLK_GIS 216 +#define IMX6SX_CLK_I2C4 217 +#define IMX6SX_CLK_PWM5 218 +#define IMX6SX_CLK_PWM6 219 +#define IMX6SX_CLK_PWM7 220 +#define IMX6SX_CLK_CKO1 221 +#define IMX6SX_CLK_CKO2 222 +#define IMX6SX_CLK_IPP_DI0 223 +#define IMX6SX_CLK_IPP_DI1 224 +#define IMX6SX_CLK_ENET_AHB 225 +#define IMX6SX_CLK_OCRAM_PODF 226 +#define IMX6SX_CLK_GPT_3M 227 +#define IMX6SX_CLK_ENET_PTP 228 +#define IMX6SX_CLK_ENET_PTP_REF 229 +#define IMX6SX_CLK_ENET2_REF 230 +#define IMX6SX_CLK_ENET2_REF_125M 231 +#define IMX6SX_CLK_AUDIO 232 +#define IMX6SX_CLK_LVDS1_SEL 233 +#define IMX6SX_CLK_LVDS1_OUT 234 +#define IMX6SX_CLK_ASRC_IPG 235 +#define IMX6SX_CLK_ASRC_MEM 236 +#define IMX6SX_CLK_SAI1_IPG 237 +#define IMX6SX_CLK_SAI2_IPG 238 +#define IMX6SX_CLK_ESAI_IPG 239 +#define IMX6SX_CLK_ESAI_MEM 240 +#define IMX6SX_CLK_CLK_END 241 + +#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */ diff --git a/include/dt-bindings/clock/lsi,axm5516-clks.h b/include/dt-bindings/clock/lsi,axm5516-clks.h new file mode 100644 index 0000000..beb41ac --- /dev/null +++ b/include/dt-bindings/clock/lsi,axm5516-clks.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2014 LSI Corporation + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + */ + +#ifndef _DT_BINDINGS_CLK_AXM5516_H +#define _DT_BINDINGS_CLK_AXM5516_H + +#define AXXIA_CLK_FAB_PLL 0 +#define AXXIA_CLK_CPU_PLL 1 +#define AXXIA_CLK_SYS_PLL 2 +#define AXXIA_CLK_SM0_PLL 3 +#define AXXIA_CLK_SM1_PLL 4 +#define AXXIA_CLK_FAB_DIV 5 +#define AXXIA_CLK_SYS_DIV 6 +#define AXXIA_CLK_NRCP_DIV 7 +#define AXXIA_CLK_CPU0_DIV 8 +#define AXXIA_CLK_CPU1_DIV 9 +#define AXXIA_CLK_CPU2_DIV 10 +#define AXXIA_CLK_CPU3_DIV 11 +#define AXXIA_CLK_PER_DIV 12 +#define AXXIA_CLK_MMC_DIV 13 +#define AXXIA_CLK_FAB 14 +#define AXXIA_CLK_SYS 15 +#define AXXIA_CLK_NRCP 16 +#define AXXIA_CLK_CPU0 17 +#define AXXIA_CLK_CPU1 18 +#define AXXIA_CLK_CPU2 19 +#define AXXIA_CLK_CPU3 20 +#define AXXIA_CLK_PER 21 +#define AXXIA_CLK_MMC 22 + +#endif diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h new file mode 100644 index 0000000..5128f4d --- /dev/null +++ b/include/dt-bindings/clock/r7s72100-clock.h @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2014 Renesas Solutions Corp. + * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ + +#ifndef __DT_BINDINGS_CLOCK_R7S72100_H__ +#define __DT_BINDINGS_CLOCK_R7S72100_H__ + +#define R7S72100_CLK_PLL 0 + +/* MSTP3 */ +#define R7S72100_CLK_MTU2 3 + +/* MSTP4 */ +#define R7S72100_CLK_SCIF0 7 +#define R7S72100_CLK_SCIF1 6 +#define R7S72100_CLK_SCIF2 5 +#define R7S72100_CLK_SCIF3 4 +#define R7S72100_CLK_SCIF4 3 +#define R7S72100_CLK_SCIF5 2 +#define R7S72100_CLK_SCIF6 1 +#define R7S72100_CLK_SCIF7 0 + +/* MSTP9 */ +#define R7S72100_CLK_I2C0 7 +#define R7S72100_CLK_I2C1 6 +#define R7S72100_CLK_I2C2 5 +#define R7S72100_CLK_I2C3 4 + +/* MSTP10 */ +#define R7S72100_CLK_SPI0 7 +#define R7S72100_CLK_SPI1 6 +#define R7S72100_CLK_SPI2 5 +#define R7S72100_CLK_SPI3 4 +#define R7S72100_CLK_SPI4 3 + +#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */ diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index 6548a5f..1118f7a 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -33,8 +33,8 @@ #define R8A7790_CLK_TMU0 25 #define R8A7790_CLK_VSP1_DU1 27 #define R8A7790_CLK_VSP1_DU0 28 -#define R8A7790_CLK_VSP1_RT 30 -#define R8A7790_CLK_VSP1_SY 31 +#define R8A7790_CLK_VSP1_R 30 +#define R8A7790_CLK_VSP1_S 31 /* MSTP2 */ #define R8A7790_CLK_SCIFA2 2 @@ -50,6 +50,7 @@ #define R8A7790_CLK_SYS_DMAC0 19 /* MSTP3 */ +#define R8A7790_CLK_IIC2 0 #define R8A7790_CLK_TPU0 4 #define R8A7790_CLK_MMCIF1 5 #define R8A7790_CLK_SDHI3 11 @@ -57,6 +58,8 @@ #define R8A7790_CLK_SDHI1 13 #define R8A7790_CLK_SDHI0 14 #define R8A7790_CLK_MMCIF0 15 +#define R8A7790_CLK_IIC0 18 +#define R8A7790_CLK_IIC1 23 #define R8A7790_CLK_SSUSB 28 #define R8A7790_CLK_CMT1 29 #define R8A7790_CLK_USBDMAC0 30 diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 30f82f2..b050d18 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -32,7 +32,7 @@ #define R8A7791_CLK_TMU0 25 #define R8A7791_CLK_VSP1_DU1 27 #define R8A7791_CLK_VSP1_DU0 28 -#define R8A7791_CLK_VSP1_SY 31 +#define R8A7791_CLK_VSP1_S 31 /* MSTP2 */ #define R8A7791_CLK_SCIFA2 2 @@ -43,7 +43,8 @@ #define R8A7791_CLK_SCIFB1 7 #define R8A7791_CLK_MSIOF1 8 #define R8A7791_CLK_SCIFB2 16 -#define R8A7791_CLK_DMAC 18 +#define R8A7791_CLK_SYS_DMAC1 18 +#define R8A7791_CLK_SYS_DMAC0 19 /* MSTP3 */ #define R8A7791_CLK_TPU0 4 @@ -51,6 +52,8 @@ #define R8A7791_CLK_SDHI1 12 #define R8A7791_CLK_SDHI0 14 #define R8A7791_CLK_MMCIF0 15 +#define R8A7791_CLK_IIC0 18 +#define R8A7791_CLK_IIC1 23 #define R8A7791_CLK_SSUSB 28 #define R8A7791_CLK_CMT1 29 #define R8A7791_CLK_USBDMAC0 30 @@ -61,6 +64,7 @@ #define R8A7791_CLK_PWM 23 /* MSTP7 */ +#define R8A7791_CLK_EHCI 3 #define R8A7791_CLK_HSUSB 4 #define R8A7791_CLK_HSCIF2 13 #define R8A7791_CLK_SCIF5 14 diff --git a/include/dt-bindings/clock/s3c2410.h b/include/dt-bindings/clock/s3c2410.h new file mode 100644 index 0000000..352a767 --- /dev/null +++ b/include/dt-bindings/clock/s3c2410.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants clock controllers of Samsung S3C2410 and later. + */ + +#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2410_CLOCK_H +#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2410_CLOCK_H + +/* + * Let each exported clock get a unique index, which is used on DT-enabled + * platforms to lookup the clock from a clock specifier. These indices are + * therefore considered an ABI and so must not be changed. This implies + * that new clocks should be added either in free spaces between clock groups + * or at the end. + */ + +/* Core clocks. */ + +/* id 1 is reserved */ +#define MPLL 2 +#define UPLL 3 +#define FCLK 4 +#define HCLK 5 +#define PCLK 6 +#define UCLK 7 +#define ARMCLK 8 + +/* pclk-gates */ +#define PCLK_UART0 16 +#define PCLK_UART1 17 +#define PCLK_UART2 18 +#define PCLK_I2C 19 +#define PCLK_SDI 20 +#define PCLK_SPI 21 +#define PCLK_ADC 22 +#define PCLK_AC97 23 +#define PCLK_I2S 24 +#define PCLK_PWM 25 +#define PCLK_RTC 26 +#define PCLK_GPIO 27 + + +/* hclk-gates */ +#define HCLK_LCD 32 +#define HCLK_USBH 33 +#define HCLK_USBD 34 +#define HCLK_NAND 35 +#define HCLK_CAM 36 + + +#define CAMIF 40 + + +/* Total number of clocks. */ +#define NR_CLKS (CAMIF + 1) + +#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H */ diff --git a/include/dt-bindings/clock/s3c2412.h b/include/dt-bindings/clock/s3c2412.h new file mode 100644 index 0000000..aac1dcf --- /dev/null +++ b/include/dt-bindings/clock/s3c2412.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants clock controllers of Samsung S3C2412. + */ + +#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H +#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H + +/* + * Let each exported clock get a unique index, which is used on DT-enabled + * platforms to lookup the clock from a clock specifier. These indices are + * therefore considered an ABI and so must not be changed. This implies + * that new clocks should be added either in free spaces between clock groups + * or at the end. + */ + +/* Core clocks. */ + +/* id 1 is reserved */ +#define MPLL 2 +#define UPLL 3 +#define MDIVCLK 4 +#define MSYSCLK 5 +#define USYSCLK 6 +#define HCLK 7 +#define PCLK 8 +#define ARMDIV 9 +#define ARMCLK 10 + + +/* Special clocks */ +#define SCLK_CAM 16 +#define SCLK_UART 17 +#define SCLK_I2S 18 +#define SCLK_USBD 19 +#define SCLK_USBH 20 + +/* pclk-gates */ +#define PCLK_WDT 32 +#define PCLK_SPI 33 +#define PCLK_I2S 34 +#define PCLK_I2C 35 +#define PCLK_ADC 36 +#define PCLK_RTC 37 +#define PCLK_GPIO 38 +#define PCLK_UART2 39 +#define PCLK_UART1 40 +#define PCLK_UART0 41 +#define PCLK_SDI 42 +#define PCLK_PWM 43 +#define PCLK_USBD 44 + +/* hclk-gates */ +#define HCLK_HALF 48 +#define HCLK_X2 49 +#define HCLK_SDRAM 50 +#define HCLK_USBH 51 +#define HCLK_LCD 52 +#define HCLK_NAND 53 +#define HCLK_DMA3 54 +#define HCLK_DMA2 55 +#define HCLK_DMA1 56 +#define HCLK_DMA0 57 + +/* Total number of clocks. */ +#define NR_CLKS (HCLK_DMA0 + 1) + +#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H */ diff --git a/include/dt-bindings/clock/s3c2443.h b/include/dt-bindings/clock/s3c2443.h new file mode 100644 index 0000000..37e66b0 --- /dev/null +++ b/include/dt-bindings/clock/s3c2443.h @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants clock controllers of Samsung S3C2443 and later. + */ + +#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H +#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H + +/* + * Let each exported clock get a unique index, which is used on DT-enabled + * platforms to lookup the clock from a clock specifier. These indices are + * therefore considered an ABI and so must not be changed. This implies + * that new clocks should be added either in free spaces between clock groups + * or at the end. + */ + +/* Core clocks. */ +#define MSYSCLK 1 +#define ESYSCLK 2 +#define ARMDIV 3 +#define ARMCLK 4 +#define HCLK 5 +#define PCLK 6 + +/* Special clocks */ +#define SCLK_HSSPI0 16 +#define SCLK_FIMD 17 +#define SCLK_I2S0 18 +#define SCLK_I2S1 19 +#define SCLK_HSMMC1 20 +#define SCLK_HSMMC_EXT 21 +#define SCLK_CAM 22 +#define SCLK_UART 23 +#define SCLK_USBH 24 + +/* Muxes */ +#define MUX_HSSPI0 32 +#define MUX_HSSPI1 33 +#define MUX_HSMMC0 34 +#define MUX_HSMMC1 35 + +/* hclk-gates */ +#define HCLK_DMA0 48 +#define HCLK_DMA1 49 +#define HCLK_DMA2 50 +#define HCLK_DMA3 51 +#define HCLK_DMA4 52 +#define HCLK_DMA5 53 +#define HCLK_DMA6 54 +#define HCLK_DMA7 55 +#define HCLK_CAM 56 +#define HCLK_LCD 57 +#define HCLK_USBH 58 +#define HCLK_USBD 59 +#define HCLK_IROM 60 +#define HCLK_HSMMC0 61 +#define HCLK_HSMMC1 62 +#define HCLK_CFC 63 +#define HCLK_SSMC 64 +#define HCLK_DRAM 65 +#define HCLK_2D 66 + +/* pclk-gates */ +#define PCLK_UART0 72 +#define PCLK_UART1 73 +#define PCLK_UART2 74 +#define PCLK_UART3 75 +#define PCLK_I2C0 76 +#define PCLK_SDI 77 +#define PCLK_SPI0 78 +#define PCLK_ADC 79 +#define PCLK_AC97 80 +#define PCLK_I2S0 81 +#define PCLK_PWM 82 +#define PCLK_WDT 83 +#define PCLK_RTC 84 +#define PCLK_GPIO 85 +#define PCLK_SPI1 86 +#define PCLK_CHIPID 87 +#define PCLK_I2C1 88 +#define PCLK_I2S1 89 +#define PCLK_PCM 90 + +/* Total number of clocks. */ +#define NR_CLKS (PCLK_PCM + 1) + +#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H */ diff --git a/include/dt-bindings/clock/stih415-clks.h b/include/dt-bindings/clock/stih415-clks.h new file mode 100644 index 0000000..0d2c739 --- /dev/null +++ b/include/dt-bindings/clock/stih415-clks.h @@ -0,0 +1,15 @@ +/* + * This header provides constants clk index STMicroelectronics + * STiH415 SoC. + */ +#ifndef _CLK_STIH415 +#define _CLK_STIH415 + +/* CLOCKGEN A0 */ +#define CLK_ICN_REG 0 +#define CLK_ETH1_PHY 4 + +/* CLOCKGEN A1 */ +#define CLK_GMAC0_PHY 3 + +#endif diff --git a/include/dt-bindings/clock/stih416-clks.h b/include/dt-bindings/clock/stih416-clks.h new file mode 100644 index 0000000..552c779 --- /dev/null +++ b/include/dt-bindings/clock/stih416-clks.h @@ -0,0 +1,15 @@ +/* + * This header provides constants clk index STMicroelectronics + * STiH416 SoC. + */ +#ifndef _CLK_STIH416 +#define _CLK_STIH416 + +/* CLOCKGEN A0 */ +#define CLK_ICN_REG 0 +#define CLK_ETH1_PHY 4 + +/* CLOCKGEN A1 */ +#define CLK_GMAC0_PHY 3 + +#endif diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h index b04528c..1c75b8c 100644 --- a/include/dt-bindings/pinctrl/omap.h +++ b/include/dt-bindings/pinctrl/omap.h @@ -62,12 +62,29 @@ #define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val) #define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val) #define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) -#define OMAP4_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0040) (val) -#define OMAP4_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0xe040) (val) #define AM4372_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) -#define OMAP5_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2840) (val) -#define OMAP5_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0xc840) (val) #define DRA7XX_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x3400) (val) +/* + * Macros to allow using the offset from the padconf physical address + * instead of the offset from padconf base. + */ +#define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset)) + +#define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) +#define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) + +/* + * Define some commonly used pins configured by the boards. + * Note that some boards use alternative pins, so check + * the schematics before using these. + */ +#define OMAP3_UART1_RX 0x152 +#define OMAP3_UART2_RX 0x14a +#define OMAP3_UART3_RX 0x16e +#define OMAP4_UART2_RX 0xdc +#define OMAP4_UART3_RX 0x104 +#define OMAP4_UART4_RX 0x11c + #endif diff --git a/include/dt-bindings/reset-controller/stih415-resets.h b/include/dt-bindings/reset-controller/stih415-resets.h index c2f8a66..c2329fe 100644 --- a/include/dt-bindings/reset-controller/stih415-resets.h +++ b/include/dt-bindings/reset-controller/stih415-resets.h @@ -22,5 +22,6 @@ #define STIH415_USB0_SOFTRESET 3 #define STIH415_USB1_SOFTRESET 4 #define STIH415_USB2_SOFTRESET 5 +#define STIH415_KEYSCAN_SOFTRESET 6 #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH415 */ diff --git a/include/dt-bindings/reset-controller/stih416-resets.h b/include/dt-bindings/reset-controller/stih416-resets.h index 2127743..fcf9af1 100644 --- a/include/dt-bindings/reset-controller/stih416-resets.h +++ b/include/dt-bindings/reset-controller/stih416-resets.h @@ -46,5 +46,6 @@ #define STIH416_COMPO_A_SOFTRESET 25 #define STIH416_VP8_DEC_SOFTRESET 26 #define STIH416_VTG_MAIN_SOFTRESET 27 +#define STIH416_KEYSCAN_SOFTRESET 28 #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH416 */ diff --git a/include/dt-bindings/reset/altr,rst-mgr.h b/include/dt-bindings/reset/altr,rst-mgr.h new file mode 100644 index 0000000..3f04908 --- /dev/null +++ b/include/dt-bindings/reset/altr,rst-mgr.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H +#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H + +/* MPUMODRST */ +#define CPU0_RESET 0 +#define CPU1_RESET 1 +#define WDS_RESET 2 +#define SCUPER_RESET 3 +#define L2_RESET 4 + +/* PERMODRST */ +#define EMAC0_RESET 32 +#define EMAC1_RESET 33 +#define USB0_RESET 34 +#define USB1_RESET 35 +#define NAND_RESET 36 +#define QSPI_RESET 37 +#define L4WD0_RESET 38 +#define L4WD1_RESET 39 +#define OSC1TIMER0_RESET 40 +#define OSC1TIMER1_RESET 41 +#define SPTIMER0_RESET 42 +#define SPTIMER1_RESET 43 +#define I2C0_RESET 44 +#define I2C1_RESET 45 +#define I2C2_RESET 46 +#define I2C3_RESET 47 +#define UART0_RESET 48 +#define UART1_RESET 49 +#define SPIM0_RESET 50 +#define SPIM1_RESET 51 +#define SPIS0_RESET 52 +#define SPIS1_RESET 53 +#define SDMMC_RESET 54 +#define CAN0_RESET 55 +#define CAN1_RESET 56 +#define GPIO0_RESET 57 +#define GPIO1_RESET 58 +#define GPIO2_RESET 59 +#define DMA_RESET 60 +#define SDR_RESET 61 + +/* PER2MODRST */ +#define DMAIF0_RESET 64 +#define DMAIF1_RESET 65 +#define DMAIF2_RESET 66 +#define DMAIF3_RESET 67 +#define DMAIF4_RESET 68 +#define DMAIF5_RESET 69 +#define DMAIF6_RESET 70 +#define DMAIF7_RESET 71 + +/* BRGMODRST */ +#define HPS2FPGA_RESET 96 +#define LWHPS2FPGA_RESET 97 +#define FPGA2HPS_RESET 98 + +/* MISCMODRST*/ +#define ROM_RESET 128 +#define OCRAM_RESET 129 +#define SYSMGR_RESET 130 +#define SYSMGRCOLD_RESET 131 +#define FPGAMGR_RESET 132 +#define ACPIDMAP_RESET 133 +#define S2F_RESET 134 +#define S2FCOLD_RESET 135 +#define NRSTPIN_RESET 136 +#define TIMESTAMPCOLD_RESET 137 +#define CLKMGRCOLD_RESET 138 +#define SCANMGR_RESET 139 +#define FRZCTRLCOLD_RESET 140 +#define SYSDBG_RESET 141 +#define DBG_RESET 142 +#define TAPCOLD_RESET 143 +#define SDRCOLD_RESET 144 + +#endif diff --git a/include/dt-bindings/soc/qcom,gsbi.h b/include/dt-bindings/soc/qcom,gsbi.h new file mode 100644 index 0000000..7ac4292 --- /dev/null +++ b/include/dt-bindings/soc/qcom,gsbi.h @@ -0,0 +1,26 @@ +/* Copyright (c) 2013, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __DT_BINDINGS_QCOM_GSBI_H +#define __DT_BINDINGS_QCOM_GSBI_H + +#define GSBI_PROT_IDLE 0 +#define GSBI_PROT_I2C_UIM 1 +#define GSBI_PROT_I2C 2 +#define GSBI_PROT_SPI 3 +#define GSBI_PROT_UART_W_FC 4 +#define GSBI_PROT_UIM 5 +#define GSBI_PROT_I2C_UART 6 + +#define GSBI_CRCI_QUP 0 +#define GSBI_CRCI_UART 1 + +#endif diff --git a/include/linux/amba/mmci.h b/include/linux/amba/mmci.h index 32a89cf..8c98113 100644 --- a/include/linux/amba/mmci.h +++ b/include/linux/amba/mmci.h @@ -6,28 +6,9 @@ #include <linux/mmc/host.h> - -/* - * These defines is places here due to access is needed from machine - * configuration files. The ST Micro version does not have ROD and - * reuse the voltage registers for direction settings. - */ -#define MCI_ST_DATA2DIREN (1 << 2) -#define MCI_ST_CMDDIREN (1 << 3) -#define MCI_ST_DATA0DIREN (1 << 4) -#define MCI_ST_DATA31DIREN (1 << 5) -#define MCI_ST_FBCLKEN (1 << 7) -#define MCI_ST_DATA74DIREN (1 << 8) - -/* Just some dummy forwarding */ -struct dma_chan; - /** * struct mmci_platform_data - platform configuration for the MMCI * (also known as PL180) block. - * @f_max: the maximum operational frequency for this host in this - * platform configuration. When this is specified it takes precedence - * over the module parameter for the same frequency. * @ocr_mask: available voltages on the 4 pins from the block, this * is ignored if a regulator is used, see the MMC_VDD_* masks in * mmc/host.h @@ -42,37 +23,14 @@ struct dma_chan; * @gpio_wp: read this GPIO pin to see if the card is write protected * @gpio_cd: read this GPIO pin to detect card insertion * @cd_invert: true if the gpio_cd pin value is active low - * @capabilities: the capabilities of the block as implemented in - * this platform, signify anything MMC_CAP_* from mmc/host.h - * @capabilities2: more capabilities, MMC_CAP2_* from mmc/host.h - * @sigdir: a bit field indicating for what bits in the MMC bus the host - * should enable signal direction indication. - * @dma_filter: function used to select an appropriate RX and TX - * DMA channel to be used for DMA, if and only if you're deploying the - * generic DMA engine - * @dma_rx_param: parameter passed to the DMA allocation - * filter in order to select an appropriate RX channel. If - * there is a bidirectional RX+TX channel, then just specify - * this and leave dma_tx_param set to NULL - * @dma_tx_param: parameter passed to the DMA allocation - * filter in order to select an appropriate TX channel. If this - * is NULL the driver will attempt to use the RX channel as a - * bidirectional channel */ struct mmci_platform_data { - unsigned int f_max; unsigned int ocr_mask; int (*ios_handler)(struct device *, struct mmc_ios *); unsigned int (*status)(struct device *); int gpio_wp; int gpio_cd; bool cd_invert; - unsigned long capabilities; - unsigned long capabilities2; - u32 sigdir; - bool (*dma_filter)(struct dma_chan *chan, void *filter_param); - void *dma_rx_param; - void *dma_tx_param; }; #endif diff --git a/include/linux/bio.h b/include/linux/bio.h index bba5508..5a64576 100644 --- a/include/linux/bio.h +++ b/include/linux/bio.h @@ -333,7 +333,7 @@ static inline struct bio *bio_next_split(struct bio *bio, int sectors, extern struct bio_set *bioset_create(unsigned int, unsigned int); extern void bioset_free(struct bio_set *); -extern mempool_t *biovec_create_pool(struct bio_set *bs, int pool_entries); +extern mempool_t *biovec_create_pool(int pool_entries); extern struct bio *bio_alloc_bioset(gfp_t, int, struct bio_set *); extern void bio_put(struct bio *); diff --git a/include/linux/blk-mq.h b/include/linux/blk-mq.h index 0120451..c151288 100644 --- a/include/linux/blk-mq.h +++ b/include/linux/blk-mq.h @@ -8,7 +8,13 @@ struct blk_mq_tags; struct blk_mq_cpu_notifier { struct list_head list; void *data; - void (*notify)(void *data, unsigned long action, unsigned int cpu); + int (*notify)(void *data, unsigned long action, unsigned int cpu); +}; + +struct blk_mq_ctxmap { + unsigned int map_size; + unsigned int bits_per_word; + struct blk_align_bitmap *map; }; struct blk_mq_hw_ctx { @@ -18,7 +24,11 @@ struct blk_mq_hw_ctx { } ____cacheline_aligned_in_smp; unsigned long state; /* BLK_MQ_S_* flags */ - struct delayed_work delayed_work; + struct delayed_work run_work; + struct delayed_work delay_work; + cpumask_var_t cpumask; + int next_cpu; + int next_cpu_batch; unsigned long flags; /* BLK_MQ_F_* flags */ @@ -27,13 +37,13 @@ struct blk_mq_hw_ctx { void *driver_data; + struct blk_mq_ctxmap ctx_map; + unsigned int nr_ctx; struct blk_mq_ctx **ctxs; - unsigned int nr_ctx_map; - unsigned long *ctx_map; - struct request **rqs; - struct list_head page_list; + unsigned int wait_index; + struct blk_mq_tags *tags; unsigned long queued; @@ -41,31 +51,40 @@ struct blk_mq_hw_ctx { #define BLK_MQ_MAX_DISPATCH_ORDER 10 unsigned long dispatched[BLK_MQ_MAX_DISPATCH_ORDER]; - unsigned int queue_depth; unsigned int numa_node; unsigned int cmd_size; /* per-request extra data */ + atomic_t nr_active; + struct blk_mq_cpu_notifier cpu_notifier; struct kobject kobj; }; -struct blk_mq_reg { +struct blk_mq_tag_set { struct blk_mq_ops *ops; unsigned int nr_hw_queues; - unsigned int queue_depth; + unsigned int queue_depth; /* max hw supported */ unsigned int reserved_tags; unsigned int cmd_size; /* per-request extra data */ int numa_node; unsigned int timeout; unsigned int flags; /* BLK_MQ_F_* */ + void *driver_data; + + struct blk_mq_tags **tags; + + struct mutex tag_list_lock; + struct list_head tag_list; }; typedef int (queue_rq_fn)(struct blk_mq_hw_ctx *, struct request *); typedef struct blk_mq_hw_ctx *(map_queue_fn)(struct request_queue *, const int); -typedef struct blk_mq_hw_ctx *(alloc_hctx_fn)(struct blk_mq_reg *,unsigned int); -typedef void (free_hctx_fn)(struct blk_mq_hw_ctx *, unsigned int); typedef int (init_hctx_fn)(struct blk_mq_hw_ctx *, void *, unsigned int); typedef void (exit_hctx_fn)(struct blk_mq_hw_ctx *, unsigned int); +typedef int (init_request_fn)(void *, struct request *, unsigned int, + unsigned int, unsigned int); +typedef void (exit_request_fn)(void *, struct request *, unsigned int, + unsigned int); struct blk_mq_ops { /* @@ -86,18 +105,20 @@ struct blk_mq_ops { softirq_done_fn *complete; /* - * Override for hctx allocations (should probably go) - */ - alloc_hctx_fn *alloc_hctx; - free_hctx_fn *free_hctx; - - /* * Called when the block layer side of a hardware queue has been * set up, allowing the driver to allocate/init matching structures. * Ditto for exit/teardown. */ init_hctx_fn *init_hctx; exit_hctx_fn *exit_hctx; + + /* + * Called for every command allocated by the block layer to allow + * the driver to set up driver specific data. + * Ditto for exit/teardown. + */ + init_request_fn *init_request; + exit_request_fn *exit_request; }; enum { @@ -107,18 +128,24 @@ enum { BLK_MQ_F_SHOULD_MERGE = 1 << 0, BLK_MQ_F_SHOULD_SORT = 1 << 1, - BLK_MQ_F_SHOULD_IPI = 1 << 2, + BLK_MQ_F_TAG_SHARED = 1 << 2, + BLK_MQ_F_SG_MERGE = 1 << 3, + BLK_MQ_F_SYSFS_UP = 1 << 4, BLK_MQ_S_STOPPED = 0, + BLK_MQ_S_TAG_ACTIVE = 1, BLK_MQ_MAX_DEPTH = 2048, + + BLK_MQ_CPU_WORK_BATCH = 8, }; -struct request_queue *blk_mq_init_queue(struct blk_mq_reg *, void *); +struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *); int blk_mq_register_disk(struct gendisk *); void blk_mq_unregister_disk(struct gendisk *); -int blk_mq_init_commands(struct request_queue *, int (*init)(void *data, struct blk_mq_hw_ctx *, struct request *, unsigned int), void *data); -void blk_mq_free_commands(struct request_queue *, void (*free)(void *data, struct blk_mq_hw_ctx *, struct request *, unsigned int), void *data); + +int blk_mq_alloc_tag_set(struct blk_mq_tag_set *set); +void blk_mq_free_tag_set(struct blk_mq_tag_set *set); void blk_mq_flush_plug_list(struct blk_plug *plug, bool from_schedule); @@ -126,28 +153,28 @@ void blk_mq_insert_request(struct request *, bool, bool, bool); void blk_mq_run_queues(struct request_queue *q, bool async); void blk_mq_free_request(struct request *rq); bool blk_mq_can_queue(struct blk_mq_hw_ctx *); -struct request *blk_mq_alloc_request(struct request_queue *q, int rw, gfp_t gfp); -struct request *blk_mq_alloc_reserved_request(struct request_queue *q, int rw, gfp_t gfp); -struct request *blk_mq_rq_from_tag(struct request_queue *q, unsigned int tag); +struct request *blk_mq_alloc_request(struct request_queue *q, int rw, + gfp_t gfp, bool reserved); +struct request *blk_mq_tag_to_rq(struct blk_mq_hw_ctx *hctx, unsigned int tag); struct blk_mq_hw_ctx *blk_mq_map_queue(struct request_queue *, const int ctx_index); -struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_reg *, unsigned int); -void blk_mq_free_single_hw_queue(struct blk_mq_hw_ctx *, unsigned int); +struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_tag_set *, unsigned int, int); -bool blk_mq_end_io_partial(struct request *rq, int error, - unsigned int nr_bytes); -static inline void blk_mq_end_io(struct request *rq, int error) -{ - bool done = !blk_mq_end_io_partial(rq, error, blk_rq_bytes(rq)); - BUG_ON(!done); -} +void blk_mq_end_io(struct request *rq, int error); +void __blk_mq_end_io(struct request *rq, int error); +void blk_mq_requeue_request(struct request *rq); +void blk_mq_add_to_requeue_list(struct request *rq, bool at_head); +void blk_mq_kick_requeue_list(struct request_queue *q); void blk_mq_complete_request(struct request *rq); void blk_mq_stop_hw_queue(struct blk_mq_hw_ctx *hctx); void blk_mq_start_hw_queue(struct blk_mq_hw_ctx *hctx); void blk_mq_stop_hw_queues(struct request_queue *q); -void blk_mq_start_stopped_hw_queues(struct request_queue *q); +void blk_mq_start_hw_queues(struct request_queue *q); +void blk_mq_start_stopped_hw_queues(struct request_queue *q, bool async); +void blk_mq_delay_queue(struct blk_mq_hw_ctx *hctx, unsigned long msecs); +void blk_mq_tag_busy_iter(struct blk_mq_tags *tags, void (*fn)(void *data, unsigned long *), void *data); /* * Driver command data is immediately after the request. So subtract request @@ -162,12 +189,6 @@ static inline void *blk_mq_rq_to_pdu(struct request *rq) return (void *) rq + sizeof(*rq); } -static inline struct request *blk_mq_tag_to_rq(struct blk_mq_hw_ctx *hctx, - unsigned int tag) -{ - return hctx->rqs[tag]; -} - #define queue_for_each_hw_ctx(q, hctx, i) \ for ((i) = 0; (i) < (q)->nr_hw_queues && \ ({ hctx = (q)->queue_hw_ctx[i]; 1; }); (i)++) diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h index aa0eaa2..d8e4cea 100644 --- a/include/linux/blk_types.h +++ b/include/linux/blk_types.h @@ -190,6 +190,7 @@ enum rq_flag_bits { __REQ_PM, /* runtime pm request */ __REQ_END, /* last of chain of requests */ __REQ_HASHED, /* on IO scheduler merge hash */ + __REQ_MQ_INFLIGHT, /* track inflight for MQ */ __REQ_NR_BITS, /* stops here */ }; @@ -243,5 +244,6 @@ enum rq_flag_bits { #define REQ_PM (1ULL << __REQ_PM) #define REQ_END (1ULL << __REQ_END) #define REQ_HASHED (1ULL << __REQ_HASHED) +#define REQ_MQ_INFLIGHT (1ULL << __REQ_MQ_INFLIGHT) #endif /* __LINUX_BLK_TYPES_H */ diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 0d84981..8aba35f 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -90,15 +90,15 @@ enum rq_cmd_type_bits { #define BLK_MAX_CDB 16 /* - * try to put the fields that are referenced together in the same cacheline. - * if you modify this structure, be sure to check block/blk-core.c:blk_rq_init() - * as well! + * Try to put the fields that are referenced together in the same cacheline. + * + * If you modify this structure, make sure to update blk_rq_init() and + * especially blk_mq_rq_ctx_init() to take care of the added fields. */ struct request { struct list_head queuelist; union { struct call_single_data csd; - struct work_struct mq_flush_work; unsigned long fifo_time; }; @@ -178,7 +178,6 @@ struct request { unsigned short ioprio; void *special; /* opaque pointer available for LLD use */ - char *buffer; /* kaddr of the current segment if available */ int tag; int errors; @@ -463,6 +462,10 @@ struct request_queue { struct request *flush_rq; spinlock_t mq_flush_lock; + struct list_head requeue_list; + spinlock_t requeue_lock; + struct work_struct requeue_work; + struct mutex sysfs_lock; int bypass_depth; @@ -481,6 +484,9 @@ struct request_queue { wait_queue_head_t mq_freeze_wq; struct percpu_counter mq_usage_counter; struct list_head all_q_node; + + struct blk_mq_tag_set *tag_set; + struct list_head tag_set_list; }; #define QUEUE_FLAG_QUEUED 1 /* uses generic tag queueing */ @@ -504,6 +510,7 @@ struct request_queue { #define QUEUE_FLAG_SAME_FORCE 18 /* force complete on same CPU */ #define QUEUE_FLAG_DEAD 19 /* queue tear-down finished */ #define QUEUE_FLAG_INIT_DONE 20 /* queue is initialized */ +#define QUEUE_FLAG_NO_SG_MERGE 21 /* don't attempt to merge SG segments*/ #define QUEUE_FLAG_DEFAULT ((1 << QUEUE_FLAG_IO_STAT) | \ (1 << QUEUE_FLAG_STACKABLE) | \ @@ -613,6 +620,15 @@ static inline void queue_flag_clear(unsigned int flag, struct request_queue *q) #define rq_data_dir(rq) (((rq)->cmd_flags & 1) != 0) +/* + * Driver can handle struct request, if it either has an old style + * request_fn defined, or is blk-mq based. + */ +static inline bool queue_is_rq_based(struct request_queue *q) +{ + return q->request_fn || q->mq_ops; +} + static inline unsigned int blk_queue_cluster(struct request_queue *q) { return q->limits.cluster; @@ -937,6 +953,7 @@ extern struct request *blk_fetch_request(struct request_queue *q); */ extern bool blk_update_request(struct request *rq, int error, unsigned int nr_bytes); +extern void blk_finish_request(struct request *rq, int error); extern bool blk_end_request(struct request *rq, int error, unsigned int nr_bytes); extern void blk_end_request_all(struct request *rq, int error); @@ -1053,7 +1070,6 @@ static inline void blk_post_runtime_resume(struct request_queue *q, int err) {} * schedule() where blk_schedule_flush_plug() is called. */ struct blk_plug { - unsigned long magic; /* detect uninitialized use-cases */ struct list_head list; /* requests */ struct list_head mq_list; /* blk-mq requests */ struct list_head cb_list; /* md requires an unplug callback */ @@ -1102,7 +1118,8 @@ static inline bool blk_needs_flush_plug(struct task_struct *tsk) /* * tag stuff */ -#define blk_rq_tagged(rq) ((rq)->cmd_flags & REQ_QUEUED) +#define blk_rq_tagged(rq) \ + ((rq)->mq_ctx || ((rq)->cmd_flags & REQ_QUEUED)) extern int blk_queue_start_tag(struct request_queue *, struct request *); extern struct request *blk_queue_find_tag(struct request_queue *, int); extern void blk_queue_end_tag(struct request_queue *, struct request *); @@ -1370,8 +1387,9 @@ static inline void put_dev_sector(Sector p) } struct work_struct; -int kblockd_schedule_work(struct request_queue *q, struct work_struct *work); -int kblockd_schedule_delayed_work(struct request_queue *q, struct delayed_work *dwork, unsigned long delay); +int kblockd_schedule_work(struct work_struct *work); +int kblockd_schedule_delayed_work(struct delayed_work *dwork, unsigned long delay); +int kblockd_schedule_delayed_work_on(int cpu, struct delayed_work *dwork, unsigned long delay); #ifdef CONFIG_BLK_CGROUP /* diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h index a6911eb..de4268d 100644 --- a/include/linux/clk/at91_pmc.h +++ b/include/linux/clk/at91_pmc.h @@ -155,6 +155,7 @@ extern void __iomem *at91_pmc_base; #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ #define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */ +#define AT91_PMC_OSCSEL (1 << 7) /* Slow Oscillator Selection [some SAM9] */ #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ diff --git a/include/linux/connector.h b/include/linux/connector.h index be9c4747..f8fe863 100644 --- a/include/linux/connector.h +++ b/include/linux/connector.h @@ -71,6 +71,7 @@ struct cn_dev { int cn_add_callback(struct cb_id *id, const char *name, void (*callback)(struct cn_msg *, struct netlink_skb_parms *)); void cn_del_callback(struct cb_id *); +int cn_netlink_send_mult(struct cn_msg *msg, u16 len, u32 portid, u32 group, gfp_t gfp_mask); int cn_netlink_send(struct cn_msg *msg, u32 portid, u32 group, gfp_t gfp_mask); int cn_queue_add_callback(struct cn_queue_dev *dev, const char *name, diff --git a/include/linux/console_struct.h b/include/linux/console_struct.h index 7f0c329..e859c98 100644 --- a/include/linux/console_struct.h +++ b/include/linux/console_struct.h @@ -17,6 +17,7 @@ #include <linux/workqueue.h> struct vt_struct; +struct uni_pagedir; #define NPAR 16 @@ -104,8 +105,8 @@ struct vc_data { unsigned int vc_bell_pitch; /* Console bell pitch */ unsigned int vc_bell_duration; /* Console bell duration */ struct vc_data **vc_display_fg; /* [!] Ptr to var holding fg console for this display */ - unsigned long vc_uni_pagedir; - unsigned long *vc_uni_pagedir_loc; /* [!] Location of uni_pagedir variable for this console */ + struct uni_pagedir *vc_uni_pagedir; + struct uni_pagedir **vc_uni_pagedir_loc; /* [!] Location of uni_pagedir variable for this console */ bool vc_panic_force_write; /* when oops/panic this VC can accept forced output/blanking */ /* additional information is in vt_kern.h */ }; diff --git a/include/linux/device.h b/include/linux/device.h index d1d1c05..580e3ee 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -623,6 +623,12 @@ static inline void *devm_kcalloc(struct device *dev, } extern void devm_kfree(struct device *dev, void *p); extern char *devm_kstrdup(struct device *dev, const char *s, gfp_t gfp); +extern void *devm_kmemdup(struct device *dev, const void *src, size_t len, + gfp_t gfp); + +extern unsigned long devm_get_free_pages(struct device *dev, + gfp_t gfp_mask, unsigned int order); +extern void devm_free_pages(struct device *dev, unsigned long addr); void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res); void __iomem *devm_request_and_ioremap(struct device *dev, @@ -673,6 +679,7 @@ struct acpi_dev_node { * variants, which GPIO pins act in what additional roles, and so * on. This shrinks the "Board Support Packages" (BSPs) and * minimizes board-specific #ifdefs in drivers. + * @driver_data: Private pointer for driver specific info. * @power: For device power management. * See Documentation/power/devices.txt for details. * @pm_domain: Provide callbacks that are executed during system suspend, @@ -734,6 +741,8 @@ struct device { device */ void *platform_data; /* Platform specific data, device core doesn't touch it */ + void *driver_data; /* Driver data, set and get with + dev_set/get_drvdata */ struct dev_pm_info power; struct dev_pm_domain *pm_domain; @@ -823,6 +832,16 @@ static inline void set_dev_node(struct device *dev, int node) } #endif +static inline void *dev_get_drvdata(const struct device *dev) +{ + return dev->driver_data; +} + +static inline void dev_set_drvdata(struct device *dev, void *data) +{ + dev->driver_data = data; +} + static inline struct pm_subsys_data *dev_to_psd(struct device *dev) { return dev ? dev->power.subsys_data : NULL; @@ -907,8 +926,6 @@ extern int device_move(struct device *dev, struct device *new_parent, extern const char *device_get_devnode(struct device *dev, umode_t *mode, kuid_t *uid, kgid_t *gid, const char **tmp); -extern void *dev_get_drvdata(const struct device *dev); -extern int dev_set_drvdata(struct device *dev, void *data); static inline bool device_supports_offline(struct device *dev) { diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index fd4aee2..0c3eab1 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -8,6 +8,12 @@ #include <linux/dma-direction.h> #include <linux/scatterlist.h> +/* + * A dma_addr_t can hold any valid DMA or bus address for the platform. + * It can be given to a device to use as a DMA source or target. A CPU cannot + * reference a dma_addr_t directly because there may be translation between + * its physical address space and the bus address space. + */ struct dma_map_ops { void* (*alloc)(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp, @@ -186,7 +192,7 @@ static inline int dma_get_cache_alignment(void) #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY static inline int -dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, +dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, dma_addr_t device_addr, size_t size, int flags) { return 0; @@ -217,13 +223,14 @@ extern void *dmam_alloc_noncoherent(struct device *dev, size_t size, extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY -extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, +extern int dmam_declare_coherent_memory(struct device *dev, + phys_addr_t phys_addr, dma_addr_t device_addr, size_t size, int flags); extern void dmam_release_declared_memory(struct device *dev); #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ static inline int dmam_declare_coherent_memory(struct device *dev, - dma_addr_t bus_addr, dma_addr_t device_addr, + phys_addr_t phys_addr, dma_addr_t device_addr, size_t size, gfp_t gfp) { return 0; diff --git a/include/linux/extcon.h b/include/linux/extcon.h index f488145..36f49c4 100644 --- a/include/linux/extcon.h +++ b/include/linux/extcon.h @@ -185,9 +185,22 @@ struct extcon_specific_cable_nb { */ extern int extcon_dev_register(struct extcon_dev *edev); extern void extcon_dev_unregister(struct extcon_dev *edev); +extern int devm_extcon_dev_register(struct device *dev, + struct extcon_dev *edev); +extern void devm_extcon_dev_unregister(struct device *dev, + struct extcon_dev *edev); extern struct extcon_dev *extcon_get_extcon_dev(const char *extcon_name); /* + * Following APIs control the memory of extcon device. + */ +extern struct extcon_dev *extcon_dev_allocate(const char **cables); +extern void extcon_dev_free(struct extcon_dev *edev); +extern struct extcon_dev *devm_extcon_dev_allocate(struct device *dev, + const char **cables); +extern void devm_extcon_dev_free(struct device *dev, struct extcon_dev *edev); + +/* * get/set/update_state access the 32b encoded state value, which represents * states of all possible cables of the multistate port. For example, if one * calls extcon_set_state(edev, 0x7), it may mean that all the three cables @@ -254,6 +267,30 @@ static inline int extcon_dev_register(struct extcon_dev *edev) static inline void extcon_dev_unregister(struct extcon_dev *edev) { } +static inline int devm_extcon_dev_register(struct device *dev, + struct extcon_dev *edev) +{ + return -EINVAL; +} + +static inline void devm_extcon_dev_unregister(struct device *dev, + struct extcon_dev *edev) { } + +static inline struct extcon_dev *extcon_dev_allocate(const char **cables) +{ + return ERR_PTR(-ENOSYS); +} + +static inline void extcon_dev_free(struct extcon_dev *edev) { } + +static inline struct extcon_dev *devm_extcon_dev_allocate(struct device *dev, + const char **cables) +{ + return ERR_PTR(-ENOSYS); +} + +static inline void devm_extcon_dev_free(struct extcon_dev *edev) { } + static inline u32 extcon_get_state(struct extcon_dev *edev) { return 0; diff --git a/include/linux/goldfish.h b/include/linux/goldfish.h new file mode 100644 index 0000000..569236e --- /dev/null +++ b/include/linux/goldfish.h @@ -0,0 +1,15 @@ +#ifndef __LINUX_GOLDFISH_H +#define __LINUX_GOLDFISH_H + +/* Helpers for Goldfish virtual platform */ + +static inline void gf_write64(unsigned long data, + void __iomem *portl, void __iomem *porth) +{ + writel((u32)data, portl); +#ifdef CONFIG_64BIT + writel(data>>32, porth); +#endif +} + +#endif /* __LINUX_GOLDFISH_H */ diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h index bed128e..05e53cc 100644 --- a/include/linux/gpio/consumer.h +++ b/include/linux/gpio/consumer.h @@ -1,6 +1,7 @@ #ifndef __LINUX_GPIO_CONSUMER_H #define __LINUX_GPIO_CONSUMER_H +#include <linux/bug.h> #include <linux/err.h> #include <linux/kernel.h> @@ -23,6 +24,12 @@ struct gpio_desc *__must_check gpiod_get(struct device *dev, struct gpio_desc *__must_check gpiod_get_index(struct device *dev, const char *con_id, unsigned int idx); +struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, + const char *con_id); +struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, + const char *con_id, + unsigned int index); + void gpiod_put(struct gpio_desc *desc); struct gpio_desc *__must_check devm_gpiod_get(struct device *dev, @@ -30,6 +37,12 @@ struct gpio_desc *__must_check devm_gpiod_get(struct device *dev, struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev, const char *con_id, unsigned int idx); +struct gpio_desc *__must_check devm_gpiod_get_optional(struct device *dev, + const char *con_id); +struct gpio_desc *__must_check +devm_gpiod_get_index_optional(struct device *dev, const char *con_id, + unsigned int index); + void devm_gpiod_put(struct device *dev, struct gpio_desc *desc); int gpiod_get_direction(const struct gpio_desc *desc); @@ -73,6 +86,20 @@ static inline struct gpio_desc *__must_check gpiod_get_index(struct device *dev, { return ERR_PTR(-ENOSYS); } + +static inline struct gpio_desc *__must_check +gpiod_get_optional(struct device *dev, const char *con_id) +{ + return ERR_PTR(-ENOSYS); +} + +static inline struct gpio_desc *__must_check +gpiod_get_index_optional(struct device *dev, const char *con_id, + unsigned int index) +{ + return ERR_PTR(-ENOSYS); +} + static inline void gpiod_put(struct gpio_desc *desc) { might_sleep(); @@ -93,6 +120,20 @@ struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev, { return ERR_PTR(-ENOSYS); } + +static inline struct gpio_desc *__must_check +devm_gpiod_get_optional(struct device *dev, const char *con_id) +{ + return ERR_PTR(-ENOSYS); +} + +static inline struct gpio_desc *__must_check +devm_gpiod_get_index_optional(struct device *dev, const char *con_id, + unsigned int index) +{ + return ERR_PTR(-ENOSYS); +} + static inline void devm_gpiod_put(struct device *dev, struct gpio_desc *desc) { might_sleep(); diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 1827b43..573e4f3 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -51,7 +51,10 @@ struct seq_file; * format specifier for an unsigned int. It is substituted by the actual * number of the gpio. * @can_sleep: flag must be set iff get()/set() methods sleep, as they - * must while accessing GPIO expander chips over I2C or SPI + * must while accessing GPIO expander chips over I2C or SPI. This + * implies that if the chip supports IRQs, these IRQs need to be threaded + * as the chip access may sleep when e.g. reading out the IRQ status + * registers. * @exported: flags if the gpiochip is exported for use from sysfs. Private. * * A gpio_chip can help platforms abstract various sources of GPIOs so diff --git a/include/linux/hid-sensor-hub.h b/include/linux/hid-sensor-hub.h index b70cfd7..51f7cca 100644 --- a/include/linux/hid-sensor-hub.h +++ b/include/linux/hid-sensor-hub.h @@ -189,7 +189,7 @@ struct hid_sensor_common { struct hid_sensor_hub_device *hsdev; struct platform_device *pdev; unsigned usage_id; - bool data_ready; + atomic_t data_ready; struct iio_trigger *trigger; struct hid_sensor_hub_attribute_info poll; struct hid_sensor_hub_attribute_info report_state; @@ -223,4 +223,10 @@ int hid_sensor_read_samp_freq_value(struct hid_sensor_common *st, int hid_sensor_get_usage_index(struct hid_sensor_hub_device *hsdev, u32 report_id, int field_index, u32 usage_id); +int hid_sensor_format_scale(u32 usage_id, + struct hid_sensor_hub_attribute_info *attr_info, + int *val0, int *val1); + +s32 hid_sensor_read_poll_value(struct hid_sensor_common *st); + #endif diff --git a/include/linux/hid-sensor-ids.h b/include/linux/hid-sensor-ids.h index 14ead9e..109f0e6 100644 --- a/include/linux/hid-sensor-ids.h +++ b/include/linux/hid-sensor-ids.h @@ -76,6 +76,7 @@ #define HID_USAGE_SENSOR_ORIENT_TILT_Y 0x200480 #define HID_USAGE_SENSOR_ORIENT_TILT_Z 0x200481 +#define HID_USAGE_SENSOR_DEVICE_ORIENTATION 0x20008A #define HID_USAGE_SENSOR_ORIENT_ROTATION_MATRIX 0x200482 #define HID_USAGE_SENSOR_ORIENT_QUATERNION 0x200483 #define HID_USAGE_SENSOR_ORIENT_MAGN_FLUX 0x200484 diff --git a/include/linux/hsi/hsi.h b/include/linux/hsi/hsi.h index 39bfd5b..3ec0630 100644 --- a/include/linux/hsi/hsi.h +++ b/include/linux/hsi/hsi.h @@ -68,17 +68,31 @@ enum { }; /** + * struct hsi_channel - channel resource used by the hsi clients + * @id: Channel number + * @name: Channel name + */ +struct hsi_channel { + unsigned int id; + const char *name; +}; + +/** * struct hsi_config - Configuration for RX/TX HSI modules * @mode: Bit transmission mode (STREAM or FRAME) - * @channels: Number of channels to use [1..16] + * @channels: Channel resources used by the client + * @num_channels: Number of channel resources + * @num_hw_channels: Number of channels the transceiver is configured for [1..16] * @speed: Max bit transmission speed (Kbit/s) * @flow: RX flow type (SYNCHRONIZED or PIPELINE) * @arb_mode: Arbitration mode for TX frame (Round robin, priority) */ struct hsi_config { - unsigned int mode; - unsigned int channels; - unsigned int speed; + unsigned int mode; + struct hsi_channel *channels; + unsigned int num_channels; + unsigned int num_hw_channels; + unsigned int speed; union { unsigned int flow; /* RX only */ unsigned int arb_mode; /* TX only */ @@ -282,6 +296,21 @@ struct hsi_controller *hsi_alloc_controller(unsigned int n_ports, gfp_t flags); void hsi_put_controller(struct hsi_controller *hsi); int hsi_register_controller(struct hsi_controller *hsi); void hsi_unregister_controller(struct hsi_controller *hsi); +struct hsi_client *hsi_new_client(struct hsi_port *port, + struct hsi_board_info *info); +int hsi_remove_client(struct device *dev, void *data); +void hsi_port_unregister_clients(struct hsi_port *port); + +#ifdef CONFIG_OF +void hsi_add_clients_from_dt(struct hsi_port *port, + struct device_node *clients); +#else +static inline void hsi_add_clients_from_dt(struct hsi_port *port, + struct device_node *clients) +{ + return; +} +#endif static inline void hsi_controller_set_drvdata(struct hsi_controller *hsi, void *data) @@ -305,6 +334,8 @@ static inline struct hsi_port *hsi_find_port_num(struct hsi_controller *hsi, */ int hsi_async(struct hsi_client *cl, struct hsi_msg *msg); +int hsi_get_channel_id_by_name(struct hsi_client *cl, char *name); + /** * hsi_id - Get HSI controller ID associated to a client * @cl: Pointer to a HSI client diff --git a/include/linux/hsi/ssi_protocol.h b/include/linux/hsi/ssi_protocol.h new file mode 100644 index 0000000..1433651 --- /dev/null +++ b/include/linux/hsi/ssi_protocol.h @@ -0,0 +1,42 @@ +/* + * ssip_slave.h + * + * SSIP slave support header file + * + * Copyright (C) 2010 Nokia Corporation. All rights reserved. + * + * Contact: Carlos Chinea <carlos.chinea@nokia.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + */ + +#ifndef __LINUX_SSIP_SLAVE_H__ +#define __LINUX_SSIP_SLAVE_H__ + +#include <linux/hsi/hsi.h> + +static inline void ssip_slave_put_master(struct hsi_client *master) +{ +} + +struct hsi_client *ssip_slave_get_master(struct hsi_client *slave); +int ssip_slave_start_tx(struct hsi_client *master); +int ssip_slave_stop_tx(struct hsi_client *master); +void ssip_reset_event(struct hsi_client *master); + +int ssip_slave_running(struct hsi_client *master); + +#endif /* __LINUX_SSIP_SLAVE_H__ */ + diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h index 2d7b4f1..08cfaff 100644 --- a/include/linux/hyperv.h +++ b/include/linux/hyperv.h @@ -696,6 +696,8 @@ struct vmbus_channel { * preserve the earlier behavior. */ u32 target_vp; + /* The corresponding CPUID in the guest */ + u32 target_cpu; /* * Support for sub-channels. For high performance devices, * it will be useful to have multiple sub-channels to support @@ -732,6 +734,11 @@ struct vmbus_channel { * Support per-channel state for use by vmbus drivers. */ void *per_channel_state; + /* + * To support per-cpu lookup mapping of relid to channel, + * link up channels based on their CPU affinity. + */ + struct list_head percpu_list; }; static inline void set_channel_read_state(struct vmbus_channel *c, bool state) diff --git a/include/linux/iio/common/st_sensors.h b/include/linux/iio/common/st_sensors.h index 3c005eb..96f51f0 100644 --- a/include/linux/iio/common/st_sensors.h +++ b/include/linux/iio/common/st_sensors.h @@ -269,6 +269,10 @@ int st_sensors_set_enable(struct iio_dev *indio_dev, bool enable); int st_sensors_set_axis_enable(struct iio_dev *indio_dev, u8 axis_enable); +void st_sensors_power_enable(struct iio_dev *indio_dev); + +void st_sensors_power_disable(struct iio_dev *indio_dev); + int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr); int st_sensors_set_dataready_irq(struct iio_dev *indio_dev, bool enable); diff --git a/include/linux/iio/consumer.h b/include/linux/iio/consumer.h index 2752b1f..651f9a0 100644 --- a/include/linux/iio/consumer.h +++ b/include/linux/iio/consumer.h @@ -123,6 +123,19 @@ int iio_read_channel_raw(struct iio_channel *chan, int *val); /** + * iio_read_channel_average_raw() - read from a given channel + * @chan: The channel being queried. + * @val: Value read back. + * + * Note raw reads from iio channels are in adc counts and hence + * scale will need to be applied if standard units required. + * + * In opposit to the normal iio_read_channel_raw this function + * returns the average of multiple reads. + */ +int iio_read_channel_average_raw(struct iio_channel *chan, int *val); + +/** * iio_read_channel_processed() - read processed value from a given channel * @chan: The channel being queried. * @val: Value read back. diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h index 5f2d00e..ccde917 100644 --- a/include/linux/iio/iio.h +++ b/include/linux/iio/iio.h @@ -177,6 +177,12 @@ struct iio_event_spec { * shift: Shift right by this before masking out * realbits. * endianness: little or big endian + * repeat: Number of times real/storage bits + * repeats. When the repeat element is + * more than 1, then the type element in + * sysfs will show a repeat value. + * Otherwise, the number of repetitions is + * omitted. * @info_mask_separate: What information is to be exported that is specific to * this channel. * @info_mask_shared_by_type: What information is to be exported that is shared @@ -219,6 +225,7 @@ struct iio_chan_spec { u8 realbits; u8 storagebits; u8 shift; + u8 repeat; enum iio_endian endianness; } scan_type; long info_mask_separate; @@ -288,6 +295,8 @@ static inline s64 iio_get_time_ns(void) #define INDIO_ALL_BUFFER_MODES \ (INDIO_BUFFER_TRIGGERED | INDIO_BUFFER_HARDWARE) +#define INDIO_MAX_RAW_ELEMENTS 4 + struct iio_trigger; /* forward declaration */ struct iio_dev; @@ -302,6 +311,14 @@ struct iio_dev; * the channel in question. Return value will specify the * type of value returned by the device. val and val2 will * contain the elements making up the returned value. + * @read_raw_multi: function to return values from the device. + * mask specifies which value. Note 0 means a reading of + * the channel in question. Return value will specify the + * type of value returned by the device. vals pointer + * contain the elements making up the returned value. + * max_len specifies maximum number of elements + * vals pointer can contain. val_len is used to return + * length of valid elements in vals. * @write_raw: function to write a value to the device. * Parameters are the same as for read_raw. * @write_raw_get_fmt: callback function to query the expected @@ -328,6 +345,13 @@ struct iio_info { int *val2, long mask); + int (*read_raw_multi)(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int max_len, + int *vals, + int *val_len, + long mask); + int (*write_raw)(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h index 084d882..d480631 100644 --- a/include/linux/iio/types.h +++ b/include/linux/iio/types.h @@ -53,6 +53,9 @@ enum iio_modifier { IIO_MOD_LIGHT_RED, IIO_MOD_LIGHT_GREEN, IIO_MOD_LIGHT_BLUE, + IIO_MOD_QUATERNION, + IIO_MOD_TEMP_AMBIENT, + IIO_MOD_TEMP_OBJECT, }; enum iio_event_type { @@ -79,6 +82,7 @@ enum iio_event_direction { #define IIO_VAL_INT_PLUS_MICRO 2 #define IIO_VAL_INT_PLUS_NANO 3 #define IIO_VAL_INT_PLUS_MICRO_DB 4 +#define IIO_VAL_INT_MULTIPLE 5 #define IIO_VAL_FRACTIONAL 10 #define IIO_VAL_FRACTIONAL_LOG2 11 diff --git a/include/linux/init.h b/include/linux/init.h index a3ba270..2df8e8d 100644 --- a/include/linux/init.h +++ b/include/linux/init.h @@ -297,16 +297,28 @@ void __init parse_early_options(char *cmdline); #else /* MODULE */ -/* Don't use these in loadable modules, but some people do... */ +/* + * In most cases loadable modules do not need custom + * initcall levels. There are still some valid cases where + * a driver may be needed early if built in, and does not + * matter when built as a loadable module. Like bus + * snooping debug drivers. + */ #define early_initcall(fn) module_init(fn) #define core_initcall(fn) module_init(fn) +#define core_initcall_sync(fn) module_init(fn) #define postcore_initcall(fn) module_init(fn) +#define postcore_initcall_sync(fn) module_init(fn) #define arch_initcall(fn) module_init(fn) #define subsys_initcall(fn) module_init(fn) +#define subsys_initcall_sync(fn) module_init(fn) #define fs_initcall(fn) module_init(fn) +#define fs_initcall_sync(fn) module_init(fn) #define rootfs_initcall(fn) module_init(fn) #define device_initcall(fn) module_init(fn) +#define device_initcall_sync(fn) module_init(fn) #define late_initcall(fn) module_init(fn) +#define late_initcall_sync(fn) module_init(fn) #define console_initcall(fn) module_init(fn) #define security_initcall(fn) module_init(fn) diff --git a/include/linux/kernfs.h b/include/linux/kernfs.h index ca1be5c..17aa1cc 100644 --- a/include/linux/kernfs.h +++ b/include/linux/kernfs.h @@ -161,6 +161,10 @@ struct kernfs_root { /* private fields, do not use outside kernfs proper */ struct ida ino_ida; struct kernfs_syscall_ops *syscall_ops; + + /* list of kernfs_super_info of this root, protected by kernfs_mutex */ + struct list_head supers; + wait_queue_head_t deactivate_waitq; }; @@ -297,8 +301,8 @@ void kernfs_notify(struct kernfs_node *kn); const void *kernfs_super_ns(struct super_block *sb); struct dentry *kernfs_mount_ns(struct file_system_type *fs_type, int flags, - struct kernfs_root *root, bool *new_sb_created, - const void *ns); + struct kernfs_root *root, unsigned long magic, + bool *new_sb_created, const void *ns); void kernfs_kill_sb(struct super_block *sb); void kernfs_init(void); @@ -391,7 +395,8 @@ static inline const void *kernfs_super_ns(struct super_block *sb) static inline struct dentry * kernfs_mount_ns(struct file_system_type *fs_type, int flags, - struct kernfs_root *root, bool *new_sb_created, const void *ns) + struct kernfs_root *root, unsigned long magic, + bool *new_sb_created, const void *ns) { return ERR_PTR(-ENOSYS); } static inline void kernfs_kill_sb(struct super_block *sb) { } @@ -449,9 +454,11 @@ static inline int kernfs_rename(struct kernfs_node *kn, static inline struct dentry * kernfs_mount(struct file_system_type *fs_type, int flags, - struct kernfs_root *root, bool *new_sb_created) + struct kernfs_root *root, unsigned long magic, + bool *new_sb_created) { - return kernfs_mount_ns(fs_type, flags, root, new_sb_created, NULL); + return kernfs_mount_ns(fs_type, flags, root, + magic, new_sb_created, NULL); } #endif /* __LINUX_KERNFS_H */ diff --git a/include/linux/kobject.h b/include/linux/kobject.h index f896a33..2d61b90 100644 --- a/include/linux/kobject.h +++ b/include/linux/kobject.h @@ -32,8 +32,10 @@ #define UEVENT_NUM_ENVP 32 /* number of env pointers */ #define UEVENT_BUFFER_SIZE 2048 /* buffer for the variables */ +#ifdef CONFIG_UEVENT_HELPER /* path to the userspace helper executed on an event */ extern char uevent_helper[]; +#endif /* counter to tag the uevent, read only except for the kobject core */ extern u64 uevent_seqnum; diff --git a/include/linux/mbus.h b/include/linux/mbus.h index 345b8c5..550c88f 100644 --- a/include/linux/mbus.h +++ b/include/linux/mbus.h @@ -73,6 +73,6 @@ int mvebu_mbus_del_window(phys_addr_t base, size_t size); int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base, size_t mbus_size, phys_addr_t sdram_phys_base, size_t sdram_size); -int mvebu_mbus_dt_init(void); +int mvebu_mbus_dt_init(bool is_coherent); #endif /* __LINUX_MBUS_H */ diff --git a/include/linux/mcb.h b/include/linux/mcb.h index 2db284d..ed06e15 100644 --- a/include/linux/mcb.h +++ b/include/linux/mcb.h @@ -16,6 +16,7 @@ #include <linux/irqreturn.h> struct mcb_driver; +struct mcb_device; /** * struct mcb_bus - MEN Chameleon Bus @@ -23,11 +24,14 @@ struct mcb_driver; * @dev: pointer to carrier device * @children: the child busses * @bus_nr: mcb bus number + * @get_irq: callback to get IRQ number */ struct mcb_bus { struct list_head children; struct device dev; + struct device *carrier; int bus_nr; + int (*get_irq)(struct mcb_device *dev); }; #define to_mcb_bus(b) container_of((b), struct mcb_bus, dev) @@ -105,7 +109,7 @@ extern void mcb_unregister_driver(struct mcb_driver *driver); module_driver(__mcb_driver, mcb_register_driver, mcb_unregister_driver); extern void mcb_bus_add_devices(const struct mcb_bus *bus); extern int mcb_device_register(struct mcb_bus *bus, struct mcb_device *dev); -extern struct mcb_bus *mcb_alloc_bus(void); +extern struct mcb_bus *mcb_alloc_bus(struct device *carrier); extern struct mcb_bus *mcb_bus_get(struct mcb_bus *bus); extern void mcb_bus_put(struct mcb_bus *bus); extern struct mcb_device *mcb_alloc_dev(struct mcb_bus *bus); diff --git a/include/linux/memblock.h b/include/linux/memblock.h index 8a20a51..73dc382 100644 --- a/include/linux/memblock.h +++ b/include/linux/memblock.h @@ -18,6 +18,7 @@ #include <linux/mm.h> #define INIT_MEMBLOCK_REGIONS 128 +#define INIT_PHYSMEM_REGIONS 4 /* Definition of memblock flags. */ #define MEMBLOCK_HOTPLUG 0x1 /* hotpluggable region */ @@ -43,6 +44,9 @@ struct memblock { phys_addr_t current_limit; struct memblock_type memory; struct memblock_type reserved; +#ifdef CONFIG_HAVE_MEMBLOCK_PHYS_MAP + struct memblock_type physmem; +#endif }; extern struct memblock memblock; @@ -71,6 +75,63 @@ int memblock_reserve(phys_addr_t base, phys_addr_t size); void memblock_trim_memory(phys_addr_t align); int memblock_mark_hotplug(phys_addr_t base, phys_addr_t size); int memblock_clear_hotplug(phys_addr_t base, phys_addr_t size); + +/* Low level functions */ +int memblock_add_range(struct memblock_type *type, + phys_addr_t base, phys_addr_t size, + int nid, unsigned long flags); + +int memblock_remove_range(struct memblock_type *type, + phys_addr_t base, + phys_addr_t size); + +void __next_mem_range(u64 *idx, int nid, struct memblock_type *type_a, + struct memblock_type *type_b, phys_addr_t *out_start, + phys_addr_t *out_end, int *out_nid); + +void __next_mem_range_rev(u64 *idx, int nid, struct memblock_type *type_a, + struct memblock_type *type_b, phys_addr_t *out_start, + phys_addr_t *out_end, int *out_nid); + +/** + * for_each_mem_range - iterate through memblock areas from type_a and not + * included in type_b. Or just type_a if type_b is NULL. + * @i: u64 used as loop variable + * @type_a: ptr to memblock_type to iterate + * @type_b: ptr to memblock_type which excludes from the iteration + * @nid: node selector, %NUMA_NO_NODE for all nodes + * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL + * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL + * @p_nid: ptr to int for nid of the range, can be %NULL + */ +#define for_each_mem_range(i, type_a, type_b, nid, \ + p_start, p_end, p_nid) \ + for (i = 0, __next_mem_range(&i, nid, type_a, type_b, \ + p_start, p_end, p_nid); \ + i != (u64)ULLONG_MAX; \ + __next_mem_range(&i, nid, type_a, type_b, \ + p_start, p_end, p_nid)) + +/** + * for_each_mem_range_rev - reverse iterate through memblock areas from + * type_a and not included in type_b. Or just type_a if type_b is NULL. + * @i: u64 used as loop variable + * @type_a: ptr to memblock_type to iterate + * @type_b: ptr to memblock_type which excludes from the iteration + * @nid: node selector, %NUMA_NO_NODE for all nodes + * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL + * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL + * @p_nid: ptr to int for nid of the range, can be %NULL + */ +#define for_each_mem_range_rev(i, type_a, type_b, nid, \ + p_start, p_end, p_nid) \ + for (i = (u64)ULLONG_MAX, \ + __next_mem_range_rev(&i, nid, type_a, type_b, \ + p_start, p_end, p_nid); \ + i != (u64)ULLONG_MAX; \ + __next_mem_range_rev(&i, nid, type_a, type_b, \ + p_start, p_end, p_nid)) + #ifdef CONFIG_MOVABLE_NODE static inline bool memblock_is_hotpluggable(struct memblock_region *m) { @@ -113,9 +174,6 @@ void __next_mem_pfn_range(int *idx, int nid, unsigned long *out_start_pfn, i >= 0; __next_mem_pfn_range(&i, nid, p_start, p_end, p_nid)) #endif /* CONFIG_HAVE_MEMBLOCK_NODE_MAP */ -void __next_free_mem_range(u64 *idx, int nid, phys_addr_t *out_start, - phys_addr_t *out_end, int *out_nid); - /** * for_each_free_mem_range - iterate through free memblock areas * @i: u64 used as loop variable @@ -128,13 +186,8 @@ void __next_free_mem_range(u64 *idx, int nid, phys_addr_t *out_start, * soon as memblock is initialized. */ #define for_each_free_mem_range(i, nid, p_start, p_end, p_nid) \ - for (i = 0, \ - __next_free_mem_range(&i, nid, p_start, p_end, p_nid); \ - i != (u64)ULLONG_MAX; \ - __next_free_mem_range(&i, nid, p_start, p_end, p_nid)) - -void __next_free_mem_range_rev(u64 *idx, int nid, phys_addr_t *out_start, - phys_addr_t *out_end, int *out_nid); + for_each_mem_range(i, &memblock.memory, &memblock.reserved, \ + nid, p_start, p_end, p_nid) /** * for_each_free_mem_range_reverse - rev-iterate through free memblock areas @@ -148,10 +201,8 @@ void __next_free_mem_range_rev(u64 *idx, int nid, phys_addr_t *out_start, * order. Available as soon as memblock is initialized. */ #define for_each_free_mem_range_reverse(i, nid, p_start, p_end, p_nid) \ - for (i = (u64)ULLONG_MAX, \ - __next_free_mem_range_rev(&i, nid, p_start, p_end, p_nid); \ - i != (u64)ULLONG_MAX; \ - __next_free_mem_range_rev(&i, nid, p_start, p_end, p_nid)) + for_each_mem_range_rev(i, &memblock.memory, &memblock.reserved, \ + nid, p_start, p_end, p_nid) static inline void memblock_set_region_flags(struct memblock_region *r, unsigned long flags) diff --git a/include/linux/mfd/max14577-private.h b/include/linux/mfd/max14577-private.h index c9b332f..4992536 100644 --- a/include/linux/mfd/max14577-private.h +++ b/include/linux/mfd/max14577-private.h @@ -1,7 +1,7 @@ /* - * max14577-private.h - Common API for the Maxim 14577 internal sub chip + * max14577-private.h - Common API for the Maxim 14577/77836 internal sub chip * - * Copyright (C) 2013 Samsung Electrnoics + * Copyright (C) 2014 Samsung Electrnoics * Chanwoo Choi <cw00.choi@samsung.com> * Krzysztof Kozlowski <k.kozlowski@samsung.com> * @@ -22,9 +22,19 @@ #include <linux/i2c.h> #include <linux/regmap.h> -#define MAX14577_REG_INVALID (0xff) +#define I2C_ADDR_PMIC (0x46 >> 1) +#define I2C_ADDR_MUIC (0x4A >> 1) +#define I2C_ADDR_FG (0x6C >> 1) -/* Slave addr = 0x4A: Interrupt */ +enum maxim_device_type { + MAXIM_DEVICE_TYPE_UNKNOWN = 0, + MAXIM_DEVICE_TYPE_MAX14577, + MAXIM_DEVICE_TYPE_MAX77836, + + MAXIM_DEVICE_TYPE_NUM, +}; + +/* Slave addr = 0x4A: MUIC and Charger */ enum max14577_reg { MAX14577_REG_DEVICEID = 0x00, MAX14577_REG_INT1 = 0x01, @@ -74,20 +84,22 @@ enum max14577_muic_charger_type { }; /* MAX14577 interrupts */ -#define INT1_ADC_MASK (0x1 << 0) -#define INT1_ADCLOW_MASK (0x1 << 1) -#define INT1_ADCERR_MASK (0x1 << 2) - -#define INT2_CHGTYP_MASK (0x1 << 0) -#define INT2_CHGDETRUN_MASK (0x1 << 1) -#define INT2_DCDTMR_MASK (0x1 << 2) -#define INT2_DBCHG_MASK (0x1 << 3) -#define INT2_VBVOLT_MASK (0x1 << 4) - -#define INT3_EOC_MASK (0x1 << 0) -#define INT3_CGMBC_MASK (0x1 << 1) -#define INT3_OVP_MASK (0x1 << 2) -#define INT3_MBCCHGERR_MASK (0x1 << 3) +#define MAX14577_INT1_ADC_MASK BIT(0) +#define MAX14577_INT1_ADCLOW_MASK BIT(1) +#define MAX14577_INT1_ADCERR_MASK BIT(2) +#define MAX77836_INT1_ADC1K_MASK BIT(3) + +#define MAX14577_INT2_CHGTYP_MASK BIT(0) +#define MAX14577_INT2_CHGDETRUN_MASK BIT(1) +#define MAX14577_INT2_DCDTMR_MASK BIT(2) +#define MAX14577_INT2_DBCHG_MASK BIT(3) +#define MAX14577_INT2_VBVOLT_MASK BIT(4) +#define MAX77836_INT2_VIDRM_MASK BIT(5) + +#define MAX14577_INT3_EOC_MASK BIT(0) +#define MAX14577_INT3_CGMBC_MASK BIT(1) +#define MAX14577_INT3_OVP_MASK BIT(2) +#define MAX14577_INT3_MBCCHGERR_MASK BIT(3) /* MAX14577 DEVICE ID register */ #define DEVID_VENDORID_SHIFT 0 @@ -99,9 +111,11 @@ enum max14577_muic_charger_type { #define STATUS1_ADC_SHIFT 0 #define STATUS1_ADCLOW_SHIFT 5 #define STATUS1_ADCERR_SHIFT 6 +#define MAX77836_STATUS1_ADC1K_SHIFT 7 #define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT) -#define STATUS1_ADCLOW_MASK (0x1 << STATUS1_ADCLOW_SHIFT) -#define STATUS1_ADCERR_MASK (0x1 << STATUS1_ADCERR_SHIFT) +#define STATUS1_ADCLOW_MASK BIT(STATUS1_ADCLOW_SHIFT) +#define STATUS1_ADCERR_MASK BIT(STATUS1_ADCERR_SHIFT) +#define MAX77836_STATUS1_ADC1K_MASK BIT(MAX77836_STATUS1_ADC1K_SHIFT) /* MAX14577 STATUS2 register */ #define STATUS2_CHGTYP_SHIFT 0 @@ -109,11 +123,13 @@ enum max14577_muic_charger_type { #define STATUS2_DCDTMR_SHIFT 4 #define STATUS2_DBCHG_SHIFT 5 #define STATUS2_VBVOLT_SHIFT 6 +#define MAX77836_STATUS2_VIDRM_SHIFT 7 #define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT) -#define STATUS2_CHGDETRUN_MASK (0x1 << STATUS2_CHGDETRUN_SHIFT) -#define STATUS2_DCDTMR_MASK (0x1 << STATUS2_DCDTMR_SHIFT) -#define STATUS2_DBCHG_MASK (0x1 << STATUS2_DBCHG_SHIFT) -#define STATUS2_VBVOLT_MASK (0x1 << STATUS2_VBVOLT_SHIFT) +#define STATUS2_CHGDETRUN_MASK BIT(STATUS2_CHGDETRUN_SHIFT) +#define STATUS2_DCDTMR_MASK BIT(STATUS2_DCDTMR_SHIFT) +#define STATUS2_DBCHG_MASK BIT(STATUS2_DBCHG_SHIFT) +#define STATUS2_VBVOLT_MASK BIT(STATUS2_VBVOLT_SHIFT) +#define MAX77836_STATUS2_VIDRM_MASK BIT(MAX77836_STATUS2_VIDRM_SHIFT) /* MAX14577 CONTROL1 register */ #define COMN1SW_SHIFT 0 @@ -122,8 +138,8 @@ enum max14577_muic_charger_type { #define IDBEN_SHIFT 7 #define COMN1SW_MASK (0x7 << COMN1SW_SHIFT) #define COMP2SW_MASK (0x7 << COMP2SW_SHIFT) -#define MICEN_MASK (0x1 << MICEN_SHIFT) -#define IDBEN_MASK (0x1 << IDBEN_SHIFT) +#define MICEN_MASK BIT(MICEN_SHIFT) +#define IDBEN_MASK BIT(IDBEN_SHIFT) #define CLEAR_IDBEN_MICEN_MASK (COMN1SW_MASK | COMP2SW_MASK) #define CTRL1_SW_USB ((1 << COMP2SW_SHIFT) \ | (1 << COMN1SW_SHIFT)) @@ -143,14 +159,14 @@ enum max14577_muic_charger_type { #define CTRL2_ACCDET_SHIFT (5) #define CTRL2_USBCPINT_SHIFT (6) #define CTRL2_RCPS_SHIFT (7) -#define CTRL2_LOWPWR_MASK (0x1 << CTRL2_LOWPWR_SHIFT) -#define CTRL2_ADCEN_MASK (0x1 << CTRL2_ADCEN_SHIFT) -#define CTRL2_CPEN_MASK (0x1 << CTRL2_CPEN_SHIFT) -#define CTRL2_SFOUTASRT_MASK (0x1 << CTRL2_SFOUTASRT_SHIFT) -#define CTRL2_SFOUTORD_MASK (0x1 << CTRL2_SFOUTORD_SHIFT) -#define CTRL2_ACCDET_MASK (0x1 << CTRL2_ACCDET_SHIFT) -#define CTRL2_USBCPINT_MASK (0x1 << CTRL2_USBCPINT_SHIFT) -#define CTRL2_RCPS_MASK (0x1 << CTR2_RCPS_SHIFT) +#define CTRL2_LOWPWR_MASK BIT(CTRL2_LOWPWR_SHIFT) +#define CTRL2_ADCEN_MASK BIT(CTRL2_ADCEN_SHIFT) +#define CTRL2_CPEN_MASK BIT(CTRL2_CPEN_SHIFT) +#define CTRL2_SFOUTASRT_MASK BIT(CTRL2_SFOUTASRT_SHIFT) +#define CTRL2_SFOUTORD_MASK BIT(CTRL2_SFOUTORD_SHIFT) +#define CTRL2_ACCDET_MASK BIT(CTRL2_ACCDET_SHIFT) +#define CTRL2_USBCPINT_MASK BIT(CTRL2_USBCPINT_SHIFT) +#define CTRL2_RCPS_MASK BIT(CTRL2_RCPS_SHIFT) #define CTRL2_CPEN1_LOWPWR0 ((1 << CTRL2_CPEN_SHIFT) | \ (0 << CTRL2_LOWPWR_SHIFT)) @@ -198,14 +214,14 @@ enum max14577_charger_reg { #define CDETCTRL1_DBEXIT_SHIFT 5 #define CDETCTRL1_DBIDLE_SHIFT 6 #define CDETCTRL1_CDPDET_SHIFT 7 -#define CDETCTRL1_CHGDETEN_MASK (0x1 << CDETCTRL1_CHGDETEN_SHIFT) -#define CDETCTRL1_CHGTYPMAN_MASK (0x1 << CDETCTRL1_CHGTYPMAN_SHIFT) -#define CDETCTRL1_DCDEN_MASK (0x1 << CDETCTRL1_DCDEN_SHIFT) -#define CDETCTRL1_DCD2SCT_MASK (0x1 << CDETCTRL1_DCD2SCT_SHIFT) -#define CDETCTRL1_DCHKTM_MASK (0x1 << CDETCTRL1_DCHKTM_SHIFT) -#define CDETCTRL1_DBEXIT_MASK (0x1 << CDETCTRL1_DBEXIT_SHIFT) -#define CDETCTRL1_DBIDLE_MASK (0x1 << CDETCTRL1_DBIDLE_SHIFT) -#define CDETCTRL1_CDPDET_MASK (0x1 << CDETCTRL1_CDPDET_SHIFT) +#define CDETCTRL1_CHGDETEN_MASK BIT(CDETCTRL1_CHGDETEN_SHIFT) +#define CDETCTRL1_CHGTYPMAN_MASK BIT(CDETCTRL1_CHGTYPMAN_SHIFT) +#define CDETCTRL1_DCDEN_MASK BIT(CDETCTRL1_DCDEN_SHIFT) +#define CDETCTRL1_DCD2SCT_MASK BIT(CDETCTRL1_DCD2SCT_SHIFT) +#define CDETCTRL1_DCHKTM_MASK BIT(CDETCTRL1_DCHKTM_SHIFT) +#define CDETCTRL1_DBEXIT_MASK BIT(CDETCTRL1_DBEXIT_SHIFT) +#define CDETCTRL1_DBIDLE_MASK BIT(CDETCTRL1_DBIDLE_SHIFT) +#define CDETCTRL1_CDPDET_MASK BIT(CDETCTRL1_CDPDET_SHIFT) /* MAX14577 CHGCTRL1 register */ #define CHGCTRL1_TCHW_SHIFT 4 @@ -213,9 +229,9 @@ enum max14577_charger_reg { /* MAX14577 CHGCTRL2 register */ #define CHGCTRL2_MBCHOSTEN_SHIFT 6 -#define CHGCTRL2_MBCHOSTEN_MASK (0x1 << CHGCTRL2_MBCHOSTEN_SHIFT) +#define CHGCTRL2_MBCHOSTEN_MASK BIT(CHGCTRL2_MBCHOSTEN_SHIFT) #define CHGCTRL2_VCHGR_RC_SHIFT 7 -#define CHGCTRL2_VCHGR_RC_MASK (0x1 << CHGCTRL2_VCHGR_RC_SHIFT) +#define CHGCTRL2_VCHGR_RC_MASK BIT(CHGCTRL2_VCHGR_RC_SHIFT) /* MAX14577 CHGCTRL3 register */ #define CHGCTRL3_MBCCVWRC_SHIFT 0 @@ -225,7 +241,7 @@ enum max14577_charger_reg { #define CHGCTRL4_MBCICHWRCH_SHIFT 0 #define CHGCTRL4_MBCICHWRCH_MASK (0xf << CHGCTRL4_MBCICHWRCH_SHIFT) #define CHGCTRL4_MBCICHWRCL_SHIFT 4 -#define CHGCTRL4_MBCICHWRCL_MASK (0x1 << CHGCTRL4_MBCICHWRCL_SHIFT) +#define CHGCTRL4_MBCICHWRCL_MASK BIT(CHGCTRL4_MBCICHWRCL_SHIFT) /* MAX14577 CHGCTRL5 register */ #define CHGCTRL5_EOCS_SHIFT 0 @@ -233,7 +249,7 @@ enum max14577_charger_reg { /* MAX14577 CHGCTRL6 register */ #define CHGCTRL6_AUTOSTOP_SHIFT 5 -#define CHGCTRL6_AUTOSTOP_MASK (0x1 << CHGCTRL6_AUTOSTOP_SHIFT) +#define CHGCTRL6_AUTOSTOP_MASK BIT(CHGCTRL6_AUTOSTOP_SHIFT) /* MAX14577 CHGCTRL7 register */ #define CHGCTRL7_OTPCGHCVS_SHIFT 0 @@ -245,14 +261,111 @@ enum max14577_charger_reg { #define MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_STEP 50000 #define MAX14577_REGULATOR_CURRENT_LIMIT_MAX 950000 +/* MAX77836 regulator current limits (as in CHGCTRL4 register), uA */ +#define MAX77836_REGULATOR_CURRENT_LIMIT_MIN 45000 +#define MAX77836_REGULATOR_CURRENT_LIMIT_HIGH_START 100000 +#define MAX77836_REGULATOR_CURRENT_LIMIT_HIGH_STEP 25000 +#define MAX77836_REGULATOR_CURRENT_LIMIT_MAX 475000 + /* MAX14577 regulator SFOUT LDO voltage, fixed, uV */ #define MAX14577_REGULATOR_SAFEOUT_VOLTAGE 4900000 +/* MAX77836 regulator LDOx voltage, uV */ +#define MAX77836_REGULATOR_LDO_VOLTAGE_MIN 800000 +#define MAX77836_REGULATOR_LDO_VOLTAGE_MAX 3950000 +#define MAX77836_REGULATOR_LDO_VOLTAGE_STEP 50000 +#define MAX77836_REGULATOR_LDO_VOLTAGE_STEPS_NUM 64 + +/* Slave addr = 0x46: PMIC */ +enum max77836_pmic_reg { + MAX77836_PMIC_REG_PMIC_ID = 0x20, + MAX77836_PMIC_REG_PMIC_REV = 0x21, + MAX77836_PMIC_REG_INTSRC = 0x22, + MAX77836_PMIC_REG_INTSRC_MASK = 0x23, + MAX77836_PMIC_REG_TOPSYS_INT = 0x24, + MAX77836_PMIC_REG_TOPSYS_INT_MASK = 0x26, + MAX77836_PMIC_REG_TOPSYS_STAT = 0x28, + MAX77836_PMIC_REG_MRSTB_CNTL = 0x2A, + MAX77836_PMIC_REG_LSCNFG = 0x2B, + + MAX77836_LDO_REG_CNFG1_LDO1 = 0x51, + MAX77836_LDO_REG_CNFG2_LDO1 = 0x52, + MAX77836_LDO_REG_CNFG1_LDO2 = 0x53, + MAX77836_LDO_REG_CNFG2_LDO2 = 0x54, + MAX77836_LDO_REG_CNFG_LDO_BIAS = 0x55, + + MAX77836_COMP_REG_COMP1 = 0x60, + + MAX77836_PMIC_REG_END, +}; + +#define MAX77836_INTSRC_MASK_TOP_INT_SHIFT 1 +#define MAX77836_INTSRC_MASK_MUIC_CHG_INT_SHIFT 3 +#define MAX77836_INTSRC_MASK_TOP_INT_MASK BIT(MAX77836_INTSRC_MASK_TOP_INT_SHIFT) +#define MAX77836_INTSRC_MASK_MUIC_CHG_INT_MASK BIT(MAX77836_INTSRC_MASK_MUIC_CHG_INT_SHIFT) + +/* MAX77836 PMIC interrupts */ +#define MAX77836_TOPSYS_INT_T120C_SHIFT 0 +#define MAX77836_TOPSYS_INT_T140C_SHIFT 1 +#define MAX77836_TOPSYS_INT_T120C_MASK BIT(MAX77836_TOPSYS_INT_T120C_SHIFT) +#define MAX77836_TOPSYS_INT_T140C_MASK BIT(MAX77836_TOPSYS_INT_T140C_SHIFT) + +/* LDO1/LDO2 CONFIG1 register */ +#define MAX77836_CNFG1_LDO_PWRMD_SHIFT 6 +#define MAX77836_CNFG1_LDO_TV_SHIFT 0 +#define MAX77836_CNFG1_LDO_PWRMD_MASK (0x3 << MAX77836_CNFG1_LDO_PWRMD_SHIFT) +#define MAX77836_CNFG1_LDO_TV_MASK (0x3f << MAX77836_CNFG1_LDO_TV_SHIFT) + +/* LDO1/LDO2 CONFIG2 register */ +#define MAX77836_CNFG2_LDO_OVCLMPEN_SHIFT 7 +#define MAX77836_CNFG2_LDO_ALPMEN_SHIFT 6 +#define MAX77836_CNFG2_LDO_COMP_SHIFT 4 +#define MAX77836_CNFG2_LDO_POK_SHIFT 3 +#define MAX77836_CNFG2_LDO_ADE_SHIFT 1 +#define MAX77836_CNFG2_LDO_SS_SHIFT 0 +#define MAX77836_CNFG2_LDO_OVCLMPEN_MASK BIT(MAX77836_CNFG2_LDO_OVCLMPEN_SHIFT) +#define MAX77836_CNFG2_LDO_ALPMEN_MASK BIT(MAX77836_CNFG2_LDO_ALPMEN_SHIFT) +#define MAX77836_CNFG2_LDO_COMP_MASK (0x3 << MAX77836_CNFG2_LDO_COMP_SHIFT) +#define MAX77836_CNFG2_LDO_POK_MASK BIT(MAX77836_CNFG2_LDO_POK_SHIFT) +#define MAX77836_CNFG2_LDO_ADE_MASK BIT(MAX77836_CNFG2_LDO_ADE_SHIFT) +#define MAX77836_CNFG2_LDO_SS_MASK BIT(MAX77836_CNFG2_LDO_SS_SHIFT) + +/* Slave addr = 0x6C: Fuel-Gauge/Battery */ +enum max77836_fg_reg { + MAX77836_FG_REG_VCELL_MSB = 0x02, + MAX77836_FG_REG_VCELL_LSB = 0x03, + MAX77836_FG_REG_SOC_MSB = 0x04, + MAX77836_FG_REG_SOC_LSB = 0x05, + MAX77836_FG_REG_MODE_H = 0x06, + MAX77836_FG_REG_MODE_L = 0x07, + MAX77836_FG_REG_VERSION_MSB = 0x08, + MAX77836_FG_REG_VERSION_LSB = 0x09, + MAX77836_FG_REG_HIBRT_H = 0x0A, + MAX77836_FG_REG_HIBRT_L = 0x0B, + MAX77836_FG_REG_CONFIG_H = 0x0C, + MAX77836_FG_REG_CONFIG_L = 0x0D, + MAX77836_FG_REG_VALRT_MIN = 0x14, + MAX77836_FG_REG_VALRT_MAX = 0x15, + MAX77836_FG_REG_CRATE_MSB = 0x16, + MAX77836_FG_REG_CRATE_LSB = 0x17, + MAX77836_FG_REG_VRESET = 0x18, + MAX77836_FG_REG_FGID = 0x19, + MAX77836_FG_REG_STATUS_H = 0x1A, + MAX77836_FG_REG_STATUS_L = 0x1B, + /* + * TODO: TABLE registers + * TODO: CMD register + */ + + MAX77836_FG_REG_END, +}; + enum max14577_irq { /* INT1 */ MAX14577_IRQ_INT1_ADC, MAX14577_IRQ_INT1_ADCLOW, MAX14577_IRQ_INT1_ADCERR, + MAX77836_IRQ_INT1_ADC1K, /* INT2 */ MAX14577_IRQ_INT2_CHGTYP, @@ -260,6 +373,7 @@ enum max14577_irq { MAX14577_IRQ_INT2_DCDTMR, MAX14577_IRQ_INT2_DBCHG, MAX14577_IRQ_INT2_VBVOLT, + MAX77836_IRQ_INT2_VIDRM, /* INT3 */ MAX14577_IRQ_INT3_EOC, @@ -267,21 +381,25 @@ enum max14577_irq { MAX14577_IRQ_INT3_OVP, MAX14577_IRQ_INT3_MBCCHGERR, + /* TOPSYS_INT, only MAX77836 */ + MAX77836_IRQ_TOPSYS_T140C, + MAX77836_IRQ_TOPSYS_T120C, + MAX14577_IRQ_NUM, }; struct max14577 { struct device *dev; struct i2c_client *i2c; /* Slave addr = 0x4A */ + struct i2c_client *i2c_pmic; /* Slave addr = 0x46 */ + enum maxim_device_type dev_type; - struct regmap *regmap; + struct regmap *regmap; /* For MUIC and Charger */ + struct regmap *regmap_pmic; - struct regmap_irq_chip_data *irq_data; + struct regmap_irq_chip_data *irq_data; /* For MUIC and Charger */ + struct regmap_irq_chip_data *irq_data_pmic; int irq; - - /* Device ID */ - u8 vendor_id; /* Vendor Identification */ - u8 device_id; /* Chip Version */ }; /* MAX14577 shared regmap API function */ diff --git a/include/linux/mfd/max14577.h b/include/linux/mfd/max14577.h index 736d39c..c83fbed 100644 --- a/include/linux/mfd/max14577.h +++ b/include/linux/mfd/max14577.h @@ -1,7 +1,7 @@ /* - * max14577.h - Driver for the Maxim 14577 + * max14577.h - Driver for the Maxim 14577/77836 * - * Copyright (C) 2013 Samsung Electrnoics + * Copyright (C) 2014 Samsung Electrnoics * Chanwoo Choi <cw00.choi@samsung.com> * Krzysztof Kozlowski <k.kozlowski@samsung.com> * @@ -20,6 +20,9 @@ * MAX14577 has MUIC, Charger devices. * The devices share the same I2C bus and interrupt line * included in this mfd driver. + * + * MAX77836 has additional PMIC and Fuel-Gauge on different I2C slave + * addresses. */ #ifndef __MAX14577_H__ @@ -32,7 +35,17 @@ enum max14577_regulators { MAX14577_SAFEOUT = 0, MAX14577_CHARGER, - MAX14577_REG_MAX, + MAX14577_REGULATOR_NUM, +}; + +/* MAX77836 regulator IDs */ +enum max77836_regulators { + MAX77836_SAFEOUT = 0, + MAX77836_CHARGER, + MAX77836_LDO1, + MAX77836_LDO2, + + MAX77836_REGULATOR_NUM, }; struct max14577_regulator_platform_data { diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h index 9974e38..b8f87b7 100644 --- a/include/linux/mfd/palmas.h +++ b/include/linux/mfd/palmas.h @@ -415,7 +415,7 @@ struct palmas_usb { struct palmas *palmas; struct device *dev; - struct extcon_dev edev; + struct extcon_dev *edev; int id_otg_irq; int id_irq; diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h new file mode 100644 index 0000000..00ef24b --- /dev/null +++ b/include/linux/mfd/syscon/exynos5-pmu.h @@ -0,0 +1,44 @@ +/* + * Exynos5 SoC series Power Management Unit (PMU) register offsets + * and bit definitions. + * + * Copyright (C) 2014 Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ +#define _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ + +/* Exynos5 PMU register definitions */ +#define EXYNOS5_HDMI_PHY_CONTROL (0x700) +#define EXYNOS5_USBDRD_PHY_CONTROL (0x704) + +/* Exynos5250 specific register definitions */ +#define EXYNOS5_USBHOST_PHY_CONTROL (0x708) +#define EXYNOS5_EFNAND_PHY_CONTROL (0x70c) +#define EXYNOS5_MIPI_PHY0_CONTROL (0x710) +#define EXYNOS5_MIPI_PHY1_CONTROL (0x714) +#define EXYNOS5_ADC_PHY_CONTROL (0x718) +#define EXYNOS5_MTCADC_PHY_CONTROL (0x71c) +#define EXYNOS5_DPTX_PHY_CONTROL (0x720) +#define EXYNOS5_SATA_PHY_CONTROL (0x724) + +/* Exynos5420 specific register definitions */ +#define EXYNOS5420_USBDRD1_PHY_CONTROL (0x708) +#define EXYNOS5420_USBHOST_PHY_CONTROL (0x70c) +#define EXYNOS5420_MIPI_PHY0_CONTROL (0x714) +#define EXYNOS5420_MIPI_PHY1_CONTROL (0x718) +#define EXYNOS5420_MIPI_PHY2_CONTROL (0x71c) +#define EXYNOS5420_ADC_PHY_CONTROL (0x720) +#define EXYNOS5420_MTCADC_PHY_CONTROL (0x724) +#define EXYNOS5420_DPTX_PHY_CONTROL (0x728) + +#define EXYNOS5_PHY_ENABLE BIT(0) + +#define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) +#define EXYNOS5_MIPI_PHY_M_RESETN BIT(2) + +#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */ diff --git a/include/linux/mfd/tc3589x.h b/include/linux/mfd/tc3589x.h index 6b8e1ff..e6088c2 100644 --- a/include/linux/mfd/tc3589x.h +++ b/include/linux/mfd/tc3589x.h @@ -111,7 +111,6 @@ enum tx3589x_block { #define TC3589x_INT_PORIRQ 7 #define TC3589x_NR_INTERNAL_IRQS 8 -#define TC3589x_INT_GPIO(x) (TC3589x_NR_INTERNAL_IRQS + (x)) struct tc3589x { struct mutex lock; diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h index 51e26f3..ee80dd7 100644 --- a/include/linux/miscdevice.h +++ b/include/linux/miscdevice.h @@ -64,7 +64,7 @@ struct miscdevice { umode_t mode; }; -extern int misc_register(struct miscdevice * misc); +extern int misc_register(struct miscdevice *misc); extern int misc_deregister(struct miscdevice *misc); #define MODULE_ALIAS_MISCDEV(minor) \ diff --git a/include/linux/of.h b/include/linux/of.h index e6f0988..fa36286 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -130,6 +130,12 @@ static inline int of_node_check_flag(struct device_node *n, unsigned long flag) return test_bit(flag, &n->_flags); } +static inline int of_node_test_and_set_flag(struct device_node *n, + unsigned long flag) +{ + return test_and_set_bit(flag, &n->_flags); +} + static inline void of_node_set_flag(struct device_node *n, unsigned long flag) { set_bit(flag, &n->_flags); @@ -197,6 +203,7 @@ static inline unsigned long of_read_ulong(const __be32 *cell, int size) /* flag descriptions */ #define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */ #define OF_DETACHED 2 /* node has been detached from the device tree */ +#define OF_POPULATED 3 /* device already created for the node */ #define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags) #define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags) diff --git a/include/linux/of_gpio.h b/include/linux/of_gpio.h index f14123a..38fc050 100644 --- a/include/linux/of_gpio.h +++ b/include/linux/of_gpio.h @@ -19,7 +19,6 @@ #include <linux/errno.h> #include <linux/gpio.h> #include <linux/of.h> -#include <linux/gpio/consumer.h> struct device_node; @@ -48,7 +47,7 @@ static inline struct of_mm_gpio_chip *to_of_mm_gpio_chip(struct gpio_chip *gc) return container_of(gc, struct of_mm_gpio_chip, gc); } -extern struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, +extern int of_get_named_gpio_flags(struct device_node *np, const char *list_name, int index, enum of_gpio_flags *flags); extern int of_mm_gpiochip_add(struct device_node *np, @@ -63,10 +62,10 @@ extern int of_gpio_simple_xlate(struct gpio_chip *gc, #else /* CONFIG_OF_GPIO */ /* Drivers may not strictly depend on the GPIO support, so let them link. */ -static inline struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, +static inline int of_get_named_gpio_flags(struct device_node *np, const char *list_name, int index, enum of_gpio_flags *flags) { - return ERR_PTR(-ENOSYS); + return -ENOSYS; } static inline int of_gpio_simple_xlate(struct gpio_chip *gc, @@ -81,18 +80,6 @@ static inline void of_gpiochip_remove(struct gpio_chip *gc) { } #endif /* CONFIG_OF_GPIO */ -static inline int of_get_named_gpio_flags(struct device_node *np, - const char *list_name, int index, enum of_gpio_flags *flags) -{ - struct gpio_desc *desc; - desc = of_get_named_gpiod_flags(np, list_name, index, flags); - - if (IS_ERR(desc)) - return PTR_ERR(desc); - else - return desc_to_gpio(desc); -} - /** * of_gpio_named_count() - Count GPIOs for a device * @np: device node to count GPIOs for @@ -129,22 +116,6 @@ static inline int of_gpio_count(struct device_node *np) return of_gpio_named_count(np, "gpios"); } -/** - * of_get_gpiod_flags() - Get a GPIO descriptor and flags to use with GPIO API - * @np: device node to get GPIO from - * @index: index of the GPIO - * @flags: a flags pointer to fill in - * - * Returns GPIO descriptor to use with Linux generic GPIO API, or a errno - * value on the error condition. If @flags is not NULL the function also fills - * in flags for the GPIO. - */ -static inline struct gpio_desc *of_get_gpiod_flags(struct device_node *np, - int index, enum of_gpio_flags *flags) -{ - return of_get_named_gpiod_flags(np, "gpios", index, flags); -} - static inline int of_get_gpio_flags(struct device_node *np, int index, enum of_gpio_flags *flags) { diff --git a/include/linux/of_platform.h b/include/linux/of_platform.h index 05cb4a9..b1010ee 100644 --- a/include/linux/of_platform.h +++ b/include/linux/of_platform.h @@ -72,6 +72,7 @@ extern int of_platform_populate(struct device_node *root, const struct of_device_id *matches, const struct of_dev_auxdata *lookup, struct device *parent); +extern int of_platform_depopulate(struct device *parent); #else static inline int of_platform_populate(struct device_node *root, const struct of_device_id *matches, @@ -80,6 +81,10 @@ static inline int of_platform_populate(struct device_node *root, { return -ENODEV; } +static inline int of_platform_depopulate(struct device *parent) +{ + return -ENODEV; +} #endif #endif /* _LINUX_OF_PLATFORM_H */ diff --git a/include/linux/pci.h b/include/linux/pci.h index aab57b4..71d9673 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -365,6 +365,7 @@ struct pci_dev { #endif phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */ size_t romlen; /* Length of ROM if it's not from the BAR */ + char *driver_override; /* Driver name to force a match */ }; static inline struct pci_dev *pci_physfn(struct pci_dev *dev) @@ -477,6 +478,19 @@ static inline bool pci_is_root_bus(struct pci_bus *pbus) return !(pbus->parent); } +/** + * pci_is_bridge - check if the PCI device is a bridge + * @dev: PCI device + * + * Return true if the PCI device is bridge whether it has subordinate + * or not. + */ +static inline bool pci_is_bridge(struct pci_dev *dev) +{ + return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || + dev->hdr_type == PCI_HEADER_TYPE_CARDBUS; +} + static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev) { dev = pci_physfn(dev); @@ -518,7 +532,7 @@ static inline int pcibios_err_to_errno(int err) case PCIBIOS_FUNC_NOT_SUPPORTED: return -ENOENT; case PCIBIOS_BAD_VENDOR_ID: - return -EINVAL; + return -ENOTTY; case PCIBIOS_DEVICE_NOT_FOUND: return -ENODEV; case PCIBIOS_BAD_REGISTER_NUMBER: @@ -529,7 +543,7 @@ static inline int pcibios_err_to_errno(int err) return -ENOSPC; } - return -ENOTTY; + return -ERANGE; } /* Low-level architecture-dependent routines */ @@ -603,6 +617,9 @@ struct pci_error_handlers { /* PCI slot has been reset */ pci_ers_result_t (*slot_reset)(struct pci_dev *dev); + /* PCI function reset prepare or completed */ + void (*reset_notify)(struct pci_dev *dev, bool prepare); + /* Device driver may resume normal operations */ void (*resume)(struct pci_dev *dev); }; @@ -680,8 +697,8 @@ struct pci_driver { /** * PCI_VDEVICE - macro used to describe a specific pci device in short form - * @vendor: the vendor name - * @device: the 16 bit PCI Device ID + * @vend: the vendor name + * @dev: the 16 bit PCI Device ID * * This macro is used to create a struct pci_device_id that matches a * specific PCI device. The subvendor, and subdevice fields will be set @@ -689,9 +706,9 @@ struct pci_driver { * private data. */ -#define PCI_VDEVICE(vendor, device) \ - PCI_VENDOR_ID_##vendor, (device), \ - PCI_ANY_ID, PCI_ANY_ID, 0, 0 +#define PCI_VDEVICE(vend, dev) \ + .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \ + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0 /* these external functions are only available when PCI support is enabled */ #ifdef CONFIG_PCI @@ -764,7 +781,7 @@ int pci_scan_slot(struct pci_bus *bus, int devfn); struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); unsigned int pci_scan_child_bus(struct pci_bus *bus); -int __must_check pci_bus_add_device(struct pci_dev *dev); +void pci_bus_add_device(struct pci_dev *dev); void pci_read_bridge_bases(struct pci_bus *child); struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res); @@ -1158,7 +1175,6 @@ struct msix_entry { #ifdef CONFIG_PCI_MSI int pci_msi_vec_count(struct pci_dev *dev); -int pci_enable_msi_block(struct pci_dev *dev, int nvec); void pci_msi_shutdown(struct pci_dev *dev); void pci_disable_msi(struct pci_dev *dev); int pci_msix_vec_count(struct pci_dev *dev); @@ -1188,8 +1204,6 @@ static inline int pci_enable_msix_exact(struct pci_dev *dev, } #else static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; } -static inline int pci_enable_msi_block(struct pci_dev *dev, int nvec) -{ return -ENOSYS; } static inline void pci_msi_shutdown(struct pci_dev *dev) { } static inline void pci_disable_msi(struct pci_dev *dev) { } static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; } @@ -1244,7 +1258,7 @@ static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { } static inline void pcie_ecrc_get_policy(char *str) { } #endif -#define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1) +#define pci_enable_msi(pdev) pci_enable_msi_exact(pdev, 1) #ifdef CONFIG_HT_IRQ /* The functions a driver should call */ @@ -1572,13 +1586,13 @@ extern unsigned long pci_hotplug_io_size; extern unsigned long pci_hotplug_mem_size; /* Architecture-specific versions may override these (weak) */ -int pcibios_add_platform_entries(struct pci_dev *dev); void pcibios_disable_device(struct pci_dev *dev); void pcibios_set_master(struct pci_dev *dev); int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); int pcibios_add_device(struct pci_dev *dev); void pcibios_release_device(struct pci_dev *dev); +void pcibios_penalize_isa_irq(int irq, int active); #ifdef CONFIG_HIBERNATE_CALLBACKS extern struct dev_pm_ops pcibios_pm_ops; diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index d4de24b..7fa3173 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1631,8 +1631,6 @@ #define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480 #define PCI_VENDOR_ID_SPECIALIX 0x11cb -#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 -#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000 #define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004 #define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 @@ -2874,7 +2872,6 @@ #define PCI_DEVICE_ID_SCALEMP_VSMP_CTL 0x1010 #define PCI_VENDOR_ID_COMPUTONE 0x8e0e -#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291 #define PCI_DEVICE_ID_COMPUTONE_PG 0x0302 #define PCI_SUBVENDOR_ID_COMPUTONE 0x8e0e #define PCI_SUBDEVICE_ID_COMPUTONE_PG4 0x0001 diff --git a/include/linux/platform_data/at91_adc.h b/include/linux/platform_data/at91_adc.h index b3ca1e9..7819fc7 100644 --- a/include/linux/platform_data/at91_adc.h +++ b/include/linux/platform_data/at91_adc.h @@ -7,23 +7,10 @@ #ifndef _AT91_ADC_H_ #define _AT91_ADC_H_ -/** - * struct at91_adc_reg_desc - Various informations relative to registers - * @channel_base: Base offset for the channel data registers - * @drdy_mask: Mask of the DRDY field in the relevant registers - (Interruptions registers mostly) - * @status_register: Offset of the Interrupt Status Register - * @trigger_register: Offset of the Trigger setup register - * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register - * @mr_startup_mask: Mask of the STARTUP field in the adc MR register - */ -struct at91_adc_reg_desc { - u8 channel_base; - u32 drdy_mask; - u8 status_register; - u8 trigger_register; - u32 mr_prescal_mask; - u32 mr_startup_mask; +enum atmel_adc_ts_type { + ATMEL_ADC_TOUCHSCREEN_NONE = 0, + ATMEL_ADC_TOUCHSCREEN_4WIRE = 4, + ATMEL_ADC_TOUCHSCREEN_5WIRE = 5, }; /** @@ -42,23 +29,21 @@ struct at91_adc_trigger { /** * struct at91_adc_data - platform data for ADC driver * @channels_used: channels in use on the board as a bitmask - * @num_channels: global number of channels available on the board - * @registers: Registers definition on the board * @startup_time: startup time of the ADC in microseconds * @trigger_list: Triggers available in the ADC * @trigger_number: Number of triggers available in the ADC * @use_external_triggers: does the board has external triggers availables * @vref: Reference voltage for the ADC in millivolts + * @touchscreen_type: If a touchscreen is connected, its type (4 or 5 wires) */ struct at91_adc_data { unsigned long channels_used; - u8 num_channels; - struct at91_adc_reg_desc *registers; u8 startup_time; struct at91_adc_trigger *trigger_list; u8 trigger_number; bool use_external_triggers; u16 vref; + enum atmel_adc_ts_type touchscreen_type; }; extern void __init at91_add_device_adc(struct at91_adc_data *data); diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h index e26b0c1..4b452c6 100644 --- a/include/linux/platform_data/atmel.h +++ b/include/linux/platform_data/atmel.h @@ -84,14 +84,6 @@ struct atmel_uart_data { short use_dma_rx; /* use receive DMA? */ void __iomem *regs; /* virt. base address, if any */ struct serial_rs485 rs485; /* rs485 settings */ - int rts_gpio; /* optional RTS GPIO */ -}; - - /* Touchscreen Controller */ -struct at91_tsadcc_data { - unsigned int adc_clock; - u8 pendet_debounce; - u8 ts_sample_hold_time; }; /* CAN */ diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h index f50821c..eb8d562 100644 --- a/include/linux/platform_data/edma.h +++ b/include/linux/platform_data/edma.h @@ -43,15 +43,15 @@ /* PaRAM slots are laid out like this */ struct edmacc_param { - unsigned int opt; - unsigned int src; - unsigned int a_b_cnt; - unsigned int dst; - unsigned int src_dst_bidx; - unsigned int link_bcntrld; - unsigned int src_dst_cidx; - unsigned int ccnt; -}; + u32 opt; + u32 src; + u32 a_b_cnt; + u32 dst; + u32 src_dst_bidx; + u32 link_bcntrld; + u32 src_dst_cidx; + u32 ccnt; +} __packed; /* fields in edmacc_param.opt */ #define SAM BIT(0) @@ -130,7 +130,7 @@ void edma_set_src(unsigned slot, dma_addr_t src_port, enum address_mode mode, enum fifo_width); void edma_set_dest(unsigned slot, dma_addr_t dest_port, enum address_mode mode, enum fifo_width); -void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst); +dma_addr_t edma_get_position(unsigned slot, bool dst); void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx); void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx); void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt, @@ -158,13 +158,6 @@ struct edma_rsv_info { /* platform_data for EDMA driver */ struct edma_soc_info { - - /* how many dma resources of each type */ - unsigned n_channel; - unsigned n_region; - unsigned n_slot; - unsigned n_tc; - unsigned n_cc; /* * Default queue is expected to be a low-priority queue. * This way, long transfers on the default queue started @@ -175,7 +168,6 @@ struct edma_soc_info { /* Resource reservation for other cores */ struct edma_rsv_info *rsv; - s8 (*queue_tc_mapping)[2]; s8 (*queue_priority_mapping)[2]; const s16 (*xbar_chans)[2]; }; diff --git a/include/linux/platform_data/max3421-hcd.h b/include/linux/platform_data/max3421-hcd.h new file mode 100644 index 0000000..0303d19 --- /dev/null +++ b/include/linux/platform_data/max3421-hcd.h @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2014 eGauge Systems LLC + * Contributed by David Mosberger-Tang <davidm@egauge.net> + * + * Platform-data structure for MAX3421 USB HCD driver. + * + */ +#ifndef MAX3421_HCD_PLAT_H_INCLUDED +#define MAX3421_HCD_PLAT_H_INCLUDED + +/* + * This structure defines the mapping of certain auxiliary functions to the + * MAX3421E GPIO pins. The chip has eight GP inputs and eight GP outputs. + * A value of 0 indicates that the pin is not used/wired to anything. + * + * At this point, the only control the max3421-hcd driver cares about is + * to control Vbus (5V to the peripheral). + */ +struct max3421_hcd_platform_data { + u8 vbus_gpout; /* pin controlling Vbus */ + u8 vbus_active_level; /* level that turns on power */ +}; + +#endif /* MAX3421_HCD_PLAT_H_INCLUDED */ diff --git a/include/linux/platform_data/syscon.h b/include/linux/platform_data/syscon.h new file mode 100644 index 0000000..2354c6f --- /dev/null +++ b/include/linux/platform_data/syscon.h @@ -0,0 +1,8 @@ +#ifndef PLATFORM_DATA_SYSCON_H +#define PLATFORM_DATA_SYSCON_H + +struct syscon_platform_data { + const char *label; +}; + +#endif diff --git a/include/linux/reset.h b/include/linux/reset.h index c0eda50..349f150 100644 --- a/include/linux/reset.h +++ b/include/linux/reset.h @@ -2,6 +2,7 @@ #define _LINUX_RESET_H_ struct device; +struct device_node; struct reset_control; #ifdef CONFIG_RESET_CONTROLLER @@ -33,6 +34,9 @@ static inline struct reset_control *devm_reset_control_get_optional( return devm_reset_control_get(dev, id); } +struct reset_control *of_reset_control_get(struct device_node *node, + const char *id); + #else static inline int reset_control_reset(struct reset_control *rstc) @@ -75,6 +79,12 @@ static inline struct reset_control *devm_reset_control_get_optional( return ERR_PTR(-ENOSYS); } +static inline struct reset_control *of_reset_control_get( + struct device_node *node, const char *id) +{ + return ERR_PTR(-ENOSYS); +} + #endif /* CONFIG_RESET_CONTROLLER */ #endif diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index f729be9..7a15b5b 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -285,6 +285,22 @@ static inline int uart_poll_timeout(struct uart_port *port) /* * Console helpers. */ +struct earlycon_device { + struct console *con; + struct uart_port port; + char options[16]; /* e.g., 115200n8 */ + unsigned int baud; +}; +int setup_earlycon(char *buf, const char *match, + int (*setup)(struct earlycon_device *, const char *)); + +#define EARLYCON_DECLARE(name, func) \ +static int __init name ## _setup_earlycon(char *buf) \ +{ \ + return setup_earlycon(buf, __stringify(name), func); \ +} \ +early_param("earlycon", name ## _setup_earlycon); + struct uart_port *uart_get_console(struct uart_port *ports, int nr, struct console *c); void uart_parse_options(char *options, int *baud, int *parity, int *bits, diff --git a/include/linux/sh_timer.h b/include/linux/sh_timer.h index 4d9dcd1..8e1e036 100644 --- a/include/linux/sh_timer.h +++ b/include/linux/sh_timer.h @@ -7,6 +7,7 @@ struct sh_timer_config { int timer_bit; unsigned long clockevent_rating; unsigned long clocksource_rating; + unsigned int channels_mask; }; #endif /* __SH_TIMER_H__ */ diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h index 5ffaa34..f97d0db 100644 --- a/include/linux/sysfs.h +++ b/include/linux/sysfs.h @@ -437,7 +437,7 @@ static inline int __must_check sysfs_create_file(struct kobject *kobj, static inline void sysfs_remove_file(struct kobject *kobj, const struct attribute *attr) { - return sysfs_remove_file_ns(kobj, attr, NULL); + sysfs_remove_file_ns(kobj, attr, NULL); } static inline int sysfs_rename_link(struct kobject *kobj, struct kobject *target, diff --git a/include/linux/tty_ldisc.h b/include/linux/tty_ldisc.h index add26da..00c9d68 100644 --- a/include/linux/tty_ldisc.h +++ b/include/linux/tty_ldisc.h @@ -92,7 +92,10 @@ * This function is called by the low-level tty driver to signal * that line discpline should try to send more characters to the * low-level driver for transmission. If the line discpline does - * not have any more data to send, it can just return. + * not have any more data to send, it can just return. If the line + * discipline does have some data to send, please arise a tasklet + * or workqueue to do the real data transfer. Do not send data in + * this hook, it may leads to a deadlock. * * int (*hangup)(struct tty_struct *) * diff --git a/include/linux/types.h b/include/linux/types.h index 4d118ba..a0bb704 100644 --- a/include/linux/types.h +++ b/include/linux/types.h @@ -142,6 +142,7 @@ typedef unsigned long blkcnt_t; #define pgoff_t unsigned long #endif +/* A dma_addr_t can hold any valid DMA or bus address for the platform */ #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT typedef u64 dma_addr_t; #else diff --git a/include/linux/usb.h b/include/linux/usb.h index 6b7ec37..d2465bc 100644 --- a/include/linux/usb.h +++ b/include/linux/usb.h @@ -352,6 +352,8 @@ struct usb_bus { struct usb_bus *hs_companion; /* Companion EHCI bus, if any */ struct list_head bus_list; /* list of busses */ + struct mutex usb_address0_mutex; /* unaddressed device mutex */ + int bandwidth_allocated; /* on this bus: how much of the time * reserved for periodic (intr/iso) * requests is used, on average? diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h index d3ca3b5..7373203 100644 --- a/include/linux/usb/composite.h +++ b/include/linux/usb/composite.h @@ -57,6 +57,61 @@ struct usb_configuration; /** + * struct usb_os_desc_ext_prop - describes one "Extended Property" + * @entry: used to keep a list of extended properties + * @type: Extended Property type + * @name_len: Extended Property unicode name length, including terminating '\0' + * @name: Extended Property name + * @data_len: Length of Extended Property blob (for unicode store double len) + * @data: Extended Property blob + * @item: Represents this Extended Property in configfs + */ +struct usb_os_desc_ext_prop { + struct list_head entry; + u8 type; + int name_len; + char *name; + int data_len; + char *data; + struct config_item item; +}; + +/** + * struct usb_os_desc - describes OS descriptors associated with one interface + * @ext_compat_id: 16 bytes of "Compatible ID" and "Subcompatible ID" + * @ext_prop: Extended Properties list + * @ext_prop_len: Total length of Extended Properties blobs + * @ext_prop_count: Number of Extended Properties + * @opts_mutex: Optional mutex protecting config data of a usb_function_instance + * @group: Represents OS descriptors associated with an interface in configfs + * @owner: Module associated with this OS descriptor + */ +struct usb_os_desc { + char *ext_compat_id; + struct list_head ext_prop; + int ext_prop_len; + int ext_prop_count; + struct mutex *opts_mutex; + struct config_group group; + struct module *owner; +}; + +/** + * struct usb_os_desc_table - describes OS descriptors associated with one + * interface of a usb_function + * @if_id: Interface id + * @os_desc: "Extended Compatibility ID" and "Extended Properties" of the + * interface + * + * Each interface can have at most one "Extended Compatibility ID" and a + * number of "Extended Properties". + */ +struct usb_os_desc_table { + int if_id; + struct usb_os_desc *os_desc; +}; + +/** * struct usb_function - describes one function of a configuration * @name: For diagnostics, identifies the function. * @strings: tables of strings, keyed by identifiers assigned during bind() @@ -73,6 +128,10 @@ struct usb_configuration; * be available at super speed. * @config: assigned when @usb_add_function() is called; this is the * configuration with which this function is associated. + * @os_desc_table: Table of (interface id, os descriptors) pairs. The function + * can expose more than one interface. If an interface is a member of + * an IAD, only the first interface of IAD has its entry in the table. + * @os_desc_n: Number of entries in os_desc_table * @bind: Before the gadget can register, all of its functions bind() to the * available resources including string and interface identifiers used * in interface or class descriptors; endpoints; I/O buffers; and so on. @@ -129,6 +188,9 @@ struct usb_function { struct usb_configuration *config; + struct usb_os_desc_table *os_desc_table; + unsigned os_desc_n; + /* REVISIT: bind() functions can be marked __init, which * makes trouble for section mismatch analysis. See if * we can't restructure things to avoid mismatching. @@ -327,6 +389,8 @@ extern void usb_composite_unregister(struct usb_composite_driver *driver); extern void usb_composite_setup_continue(struct usb_composite_dev *cdev); extern int composite_dev_prepare(struct usb_composite_driver *composite, struct usb_composite_dev *cdev); +extern int composite_os_desc_req_prepare(struct usb_composite_dev *cdev, + struct usb_ep *ep0); void composite_dev_cleanup(struct usb_composite_dev *cdev); static inline struct usb_composite_driver *to_cdriver( @@ -335,11 +399,19 @@ static inline struct usb_composite_driver *to_cdriver( return container_of(gdrv, struct usb_composite_driver, gadget_driver); } +#define OS_STRING_QW_SIGN_LEN 14 +#define OS_STRING_IDX 0xEE + /** * struct usb_composite_device - represents one composite usb gadget * @gadget: read-only, abstracts the gadget's usb peripheral controller * @req: used for control responses; buffer is pre-allocated + * @os_desc_req: used for OS descriptors responses; buffer is pre-allocated * @config: the currently active configuration + * @qw_sign: qwSignature part of the OS string + * @b_vendor_code: bMS_VendorCode part of the OS string + * @use_os_string: false by default, interested gadgets set it + * @os_desc_config: the configuration to be used with OS descriptors * * One of these devices is allocated and initialized before the * associated device driver's bind() is called. @@ -369,9 +441,16 @@ static inline struct usb_composite_driver *to_cdriver( struct usb_composite_dev { struct usb_gadget *gadget; struct usb_request *req; + struct usb_request *os_desc_req; struct usb_configuration *config; + /* OS String is a custom (yet popular) extension to the USB standard. */ + u8 qw_sign[OS_STRING_QW_SIGN_LEN]; + u8 b_vendor_code; + struct usb_configuration *os_desc_config; + unsigned int use_os_string:1; + /* private: */ /* internals */ unsigned int suspended:1; diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h index 3275483..b0a3924 100644 --- a/include/linux/usb/msm_hsusb.h +++ b/include/linux/usb/msm_hsusb.h @@ -23,21 +23,6 @@ #include <linux/clk.h> /** - * Supported USB modes - * - * USB_PERIPHERAL Only peripheral mode is supported. - * USB_HOST Only host mode is supported. - * USB_OTG OTG mode is supported. - * - */ -enum usb_mode_type { - USB_NONE = 0, - USB_PERIPHERAL, - USB_HOST, - USB_OTG, -}; - -/** * OTG control * * OTG_NO_CONTROL Id/VBUS notifications not required. Useful in host @@ -115,27 +100,23 @@ enum usb_chg_type { /** * struct msm_otg_platform_data - platform device data * for msm_otg driver. - * @phy_init_seq: PHY configuration sequence. val, reg pairs - * terminated by -1. + * @phy_init_seq: PHY configuration sequence values. Value of -1 is reserved as + * "do not overwrite default vaule at this address". + * @phy_init_sz: PHY configuration sequence size. * @vbus_power: VBUS power on/off routine. * @power_budget: VBUS power budget in mA (0 will be treated as 500mA). * @mode: Supported mode (OTG/peripheral/host). * @otg_control: OTG switch controlled by user/Id pin - * @default_mode: Default operational mode. Applicable only if - * OTG switch is controller by user. - * @pclk_src_name: pclk is derived from ebi1_usb_clk in case of 7x27 and 8k - * dfab_usb_hs_clk in case of 8660 and 8960. */ struct msm_otg_platform_data { int *phy_init_seq; + int phy_init_sz; void (*vbus_power)(bool on); unsigned power_budget; - enum usb_mode_type mode; + enum usb_dr_mode mode; enum otg_control_type otg_control; - enum usb_mode_type default_mode; enum msm_usb_phy_type phy_type; void (*setup_gpio)(enum usb_otg_state state); - char *pclk_src_name; int (*link_clk_reset)(struct clk *link_clk, bool assert); int (*phy_clk_reset)(struct clk *phy_clk); }; @@ -147,7 +128,6 @@ struct msm_otg_platform_data { * @irq: IRQ number assigned for HSUSB controller. * @clk: clock struct of usb_hs_clk. * @pclk: clock struct of usb_hs_pclk. - * @pclk_src: pclk source for voting. * @phy_reset_clk: clock struct of usb_phy_clk. * @core_clk: clock struct of usb_hs_core_clk. * @regs: ioremapped register base address. @@ -168,7 +148,6 @@ struct msm_otg { int irq; struct clk *clk; struct clk *pclk; - struct clk *pclk_src; struct clk *phy_reset_clk; struct clk *core_clk; void __iomem *regs; @@ -179,10 +158,18 @@ struct msm_otg { atomic_t in_lpm; int async_int; unsigned cur_power; + int phy_number; struct delayed_work chg_work; enum usb_chg_state chg_state; enum usb_chg_type chg_type; u8 dcd_retries; + struct regulator *v3p3; + struct regulator *v1p8; + struct regulator *vddcx; + + struct reset_control *phy_rst; + struct reset_control *link_rst; + int vdd_levels[3]; }; #endif diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h index 6e97a2d..a29f603 100644 --- a/include/linux/usb/msm_hsusb_hw.h +++ b/include/linux/usb/msm_hsusb_hw.h @@ -16,6 +16,9 @@ #ifndef __LINUX_USB_GADGET_MSM72K_UDC_H__ #define __LINUX_USB_GADGET_MSM72K_UDC_H__ +/* USB phy selector - in TCSR address range */ +#define USB2_PHY_SEL 0xfd4ab000 + #define USB_AHBBURST (MSM_USB_BASE + 0x0090) #define USB_AHBMODE (MSM_USB_BASE + 0x0098) #define USB_CAPLENGTH (MSM_USB_BASE + 0x0100) /* 8 bit */ @@ -25,13 +28,15 @@ #define USB_OTGSC (MSM_USB_BASE + 0x01A4) #define USB_USBMODE (MSM_USB_BASE + 0x01A8) #define USB_PHY_CTRL (MSM_USB_BASE + 0x0240) +#define USB_PHY_CTRL2 (MSM_USB_BASE + 0x0278) #define USBCMD_RESET 2 #define USB_USBINTR (MSM_USB_BASE + 0x0148) #define PORTSC_PHCD (1 << 23) /* phy suspend mode */ -#define PORTSC_PTS_MASK (3 << 30) -#define PORTSC_PTS_ULPI (3 << 30) +#define PORTSC_PTS_MASK (3 << 30) +#define PORTSC_PTS_ULPI (2 << 30) +#define PORTSC_PTS_SERIAL (3 << 30) #define USB_ULPI_VIEWPORT (MSM_USB_BASE + 0x0170) #define ULPI_RUN (1 << 30) @@ -41,9 +46,14 @@ #define ULPI_DATA(n) ((n) & 255) #define ULPI_DATA_READ(n) (((n) >> 8) & 255) +/* synopsys 28nm phy registers */ +#define ULPI_PWR_CLK_MNG_REG 0x88 +#define OTG_COMP_DISABLE BIT(0) + #define ASYNC_INTR_CTRL (1 << 29) /* Enable async interrupt */ #define ULPI_STP_CTRL (1 << 30) /* Block communication with PHY */ #define PHY_RETEN (1 << 1) /* PHY retention enable/disable */ +#define PHY_POR_ASSERT (1 << 0) /* USB2 28nm PHY POR ASSERT */ /* OTG definitions */ #define OTGSC_INTSTS_MASK (0x7f << 16) diff --git a/include/linux/usb/usb_phy_gen_xceiv.h b/include/linux/usb/usb_phy_generic.h index cc8d818..68adae8 100644 --- a/include/linux/usb/usb_phy_gen_xceiv.h +++ b/include/linux/usb/usb_phy_generic.h @@ -3,7 +3,7 @@ #include <linux/usb/otg.h> -struct usb_phy_gen_xceiv_platform_data { +struct usb_phy_generic_platform_data { enum usb_phy_type type; unsigned long clk_rate; @@ -13,16 +13,17 @@ struct usb_phy_gen_xceiv_platform_data { int gpio_reset; }; -#if defined(CONFIG_NOP_USB_XCEIV) || (defined(CONFIG_NOP_USB_XCEIV_MODULE) && defined(MODULE)) +#if IS_ENABLED(CONFIG_NOP_USB_XCEIV) /* sometimes transceivers are accessed only through e.g. ULPI */ -extern void usb_nop_xceiv_register(void); -extern void usb_nop_xceiv_unregister(void); +extern struct platform_device *usb_phy_generic_register(void); +extern void usb_phy_generic_unregister(struct platform_device *); #else -static inline void usb_nop_xceiv_register(void) +static inline struct platform_device *usb_phy_generic_register(void) { + return NULL; } -static inline void usb_nop_xceiv_unregister(void) +static inline void usb_phy_generic_unregister(struct platform_device *pdev) { } #endif diff --git a/include/linux/vexpress.h b/include/linux/vexpress.h index 617c01b..a4c9547 100644 --- a/include/linux/vexpress.h +++ b/include/linux/vexpress.h @@ -15,28 +15,15 @@ #define _LINUX_VEXPRESS_H #include <linux/device.h> +#include <linux/platform_device.h> #include <linux/reboot.h> +#include <linux/regmap.h> #define VEXPRESS_SITE_MB 0 #define VEXPRESS_SITE_DB1 1 #define VEXPRESS_SITE_DB2 2 #define VEXPRESS_SITE_MASTER 0xf -#define VEXPRESS_CONFIG_STATUS_DONE 0 -#define VEXPRESS_CONFIG_STATUS_WAIT 1 - -#define VEXPRESS_GPIO_MMC_CARDIN 0 -#define VEXPRESS_GPIO_MMC_WPROT 1 -#define VEXPRESS_GPIO_FLASH_WPn 2 -#define VEXPRESS_GPIO_LED0 3 -#define VEXPRESS_GPIO_LED1 4 -#define VEXPRESS_GPIO_LED2 5 -#define VEXPRESS_GPIO_LED3 6 -#define VEXPRESS_GPIO_LED4 7 -#define VEXPRESS_GPIO_LED5 8 -#define VEXPRESS_GPIO_LED6 9 -#define VEXPRESS_GPIO_LED7 10 - #define VEXPRESS_RES_FUNC(_site, _func) \ { \ .start = (_site), \ @@ -44,84 +31,43 @@ .flags = IORESOURCE_BUS, \ } -/* Config bridge API */ +/* Config infrastructure */ -/** - * struct vexpress_config_bridge_info - description of the platform - * configuration infrastructure bridge. - * - * @name: Bridge name - * - * @func_get: Obtains pointer to a configuration function for a given - * device or a Device Tree node, to be used with @func_put - * and @func_exec. The node pointer should take precedence - * over device pointer when both are passed. - * - * @func_put: Tells the bridge that the function will not be used any - * more, so all allocated resources can be released. - * - * @func_exec: Executes a configuration function read or write operation. - * The offset selects a 32 bit word of the value accessed. - * Must return VEXPRESS_CONFIG_STATUS_DONE when operation - * is finished immediately, VEXPRESS_CONFIG_STATUS_WAIT when - * will be completed in some time or negative value in case - * of error. - */ -struct vexpress_config_bridge_info { - const char *name; - void *(*func_get)(struct device *dev, struct device_node *node); - void (*func_put)(void *func); - int (*func_exec)(void *func, int offset, bool write, u32 *data); -}; +void vexpress_config_set_master(u32 site); +u32 vexpress_config_get_master(void); -struct vexpress_config_bridge; +void vexpress_config_lock(void *arg); +void vexpress_config_unlock(void *arg); -struct vexpress_config_bridge *vexpress_config_bridge_register( - struct device_node *node, - struct vexpress_config_bridge_info *info); -void vexpress_config_bridge_unregister(struct vexpress_config_bridge *bridge); +int vexpress_config_get_topo(struct device_node *node, u32 *site, + u32 *position, u32 *dcc); -void vexpress_config_complete(struct vexpress_config_bridge *bridge, - int status); +/* Config bridge API */ -/* Config function API */ +struct vexpress_config_bridge_ops { + struct regmap * (*regmap_init)(struct device *dev, void *context); + void (*regmap_exit)(struct regmap *regmap, void *context); +}; -struct vexpress_config_func; +struct device *vexpress_config_bridge_register(struct device *parent, + struct vexpress_config_bridge_ops *ops, void *context); -struct vexpress_config_func *__vexpress_config_func_get(struct device *dev, - struct device_node *node); -#define vexpress_config_func_get_by_dev(dev) \ - __vexpress_config_func_get(dev, NULL) -#define vexpress_config_func_get_by_node(node) \ - __vexpress_config_func_get(NULL, node) -void vexpress_config_func_put(struct vexpress_config_func *func); +/* Config regmap API */ -/* Both may sleep! */ -int vexpress_config_read(struct vexpress_config_func *func, int offset, - u32 *data); -int vexpress_config_write(struct vexpress_config_func *func, int offset, - u32 data); +struct regmap *devm_regmap_init_vexpress_config(struct device *dev); /* Platform control */ +unsigned int vexpress_get_mci_cardin(struct device *dev); u32 vexpress_get_procid(int site); -u32 vexpress_get_hbi(int site); void *vexpress_get_24mhz_clock_base(void); void vexpress_flags_set(u32 data); -#define vexpress_get_site_by_node(node) __vexpress_get_site(NULL, node) -#define vexpress_get_site_by_dev(dev) __vexpress_get_site(dev, NULL) -unsigned __vexpress_get_site(struct device *dev, struct device_node *node); - void vexpress_sysreg_early_init(void __iomem *base); -void vexpress_sysreg_of_early_init(void); +int vexpress_syscfg_device_register(struct platform_device *pdev); /* Clocks */ -struct clk *vexpress_osc_setup(struct device *dev); -void vexpress_osc_of_setup(struct device_node *node); - void vexpress_clk_init(void __iomem *sp810_base); -void vexpress_clk_of_init(void); #endif diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h index b47dba2..5820269 100644 --- a/include/uapi/linux/serial_core.h +++ b/include/uapi/linux/serial_core.h @@ -211,7 +211,7 @@ /* VIA VT8500 SoC */ #define PORT_VT8500 97 -/* Xilinx PSS UART */ +/* Cadence (Xilinx Zynq) UART */ #define PORT_XUARTPS 98 /* Atheros AR933X SoC */ @@ -238,4 +238,10 @@ /* Tilera TILE-Gx UART */ #define PORT_TILEGX 106 +/* MEN 16z135 UART */ +#define PORT_MEN_Z135 107 + +/* SC16IS74xx */ +#define PORT_SC16IS7XX 108 + #endif /* _UAPILINUX_SERIAL_CORE_H */ diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h index e632260..99b4705 100644 --- a/include/uapi/linux/serial_reg.h +++ b/include/uapi/linux/serial_reg.h @@ -32,7 +32,7 @@ #define UART_IIR 2 /* In: Interrupt ID Register */ #define UART_IIR_NO_INT 0x01 /* No interrupts pending */ -#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ +#define UART_IIR_ID 0x0e /* Mask for the interrupt ID */ #define UART_IIR_MSI 0x00 /* Modem status interrupt */ #define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ #define UART_IIR_RDI 0x04 /* Receiver data interrupt */ diff --git a/include/xen/interface/io/blkif.h b/include/xen/interface/io/blkif.h index 32ec05a..c33e1c4 100644 --- a/include/xen/interface/io/blkif.h +++ b/include/xen/interface/io/blkif.h @@ -86,7 +86,7 @@ typedef uint64_t blkif_sector_t; * Interface%20manuals/100293068c.pdf * The backend can optionally provide three extra XenBus attributes to * further optimize the discard functionality: - * 'discard-aligment' - Devices that support discard functionality may + * 'discard-alignment' - Devices that support discard functionality may * internally allocate space in units that are bigger than the exported * logical block size. The discard-alignment parameter indicates how many bytes * the beginning of the partition is offset from the internal allocation unit's diff --git a/include/xen/interface/xen.h b/include/xen/interface/xen.h index 0cd5ca3..de08213 100644 --- a/include/xen/interface/xen.h +++ b/include/xen/interface/xen.h @@ -275,9 +275,9 @@ DEFINE_GUEST_HANDLE_STRUCT(mmu_update); * NB. The fields are natural register size for this architecture. */ struct multicall_entry { - unsigned long op; - long result; - unsigned long args[6]; + xen_ulong_t op; + xen_long_t result; + xen_ulong_t args[6]; }; DEFINE_GUEST_HANDLE_STRUCT(multicall_entry); diff --git a/include/xen/xen-ops.h b/include/xen/xen-ops.h index 2cf4717..0b3149e 100644 --- a/include/xen/xen-ops.h +++ b/include/xen/xen-ops.h @@ -9,10 +9,6 @@ DECLARE_PER_CPU(struct vcpu_info *, xen_vcpu); void xen_arch_pre_suspend(void); void xen_arch_post_suspend(int suspend_cancelled); -void xen_arch_hvm_post_suspend(int suspend_cancelled); - -void xen_mm_pin_all(void); -void xen_mm_unpin_all(void); void xen_timer_resume(void); void xen_arch_resume(void); |