diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-ixp23xx/irqs.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/board-innovator.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/irqs.h | 20 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/mfp-pxa300.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/mfp-pxa320.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/mfp.h | 18 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 5 |
7 files changed, 39 insertions, 12 deletions
diff --git a/include/asm-arm/arch-ixp23xx/irqs.h b/include/asm-arm/arch-ixp23xx/irqs.h index e696395..27c5808 100644 --- a/include/asm-arm/arch-ixp23xx/irqs.h +++ b/include/asm-arm/arch-ixp23xx/irqs.h @@ -153,7 +153,7 @@ */ #define NR_IXP23XX_MACH_IRQS 32 -#define NR_IRQS NR_IXP23XX_IRQS + NR_IXP23XX_MACH_IRQS +#define NR_IRQS (NR_IXP23XX_IRQS + NR_IXP23XX_MACH_IRQS) #define IXP23XX_MACH_IRQ(irq) (NR_IXP23XX_IRQ + (irq)) diff --git a/include/asm-arm/arch-omap/board-innovator.h b/include/asm-arm/arch-omap/board-innovator.h index b3cf334..56d2c98 100644 --- a/include/asm-arm/arch-omap/board-innovator.h +++ b/include/asm-arm/arch-omap/board-innovator.h @@ -37,7 +37,7 @@ #define OMAP1510P1_EMIFF_PRI_VALUE 0x00 #define NR_FPGA_IRQS 24 -#define NR_IRQS IH_BOARD_BASE + NR_FPGA_IRQS +#define NR_IRQS (IH_BOARD_BASE + NR_FPGA_IRQS) #ifndef __ASSEMBLY__ void fpga_write(unsigned char val, int reg); diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h index 6238dbf..b76ee6d 100644 --- a/include/asm-arm/arch-pxa/irqs.h +++ b/include/asm-arm/arch-pxa/irqs.h @@ -13,7 +13,7 @@ #define PXA_IRQ(x) (x) -#ifdef CONFIG_PXA27x +#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ #define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ #define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */ @@ -52,11 +52,27 @@ #define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */ #define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */ -#ifdef CONFIG_PXA27x +#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) #define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ #define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ #endif +#ifdef CONFIG_PXA3xx +#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */ +#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */ +#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */ +#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */ +#define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */ +#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */ +#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */ +#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */ +#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */ +#define IRQ_WAKEUP0 PXA_IRQ(49) /* EXT_WAKEUP0 */ +#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */ +#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */ +#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ +#endif + #define PXA_GPIO_IRQ_BASE (64) #define PXA_GPIO_IRQ_NUM (128) diff --git a/include/asm-arm/arch-pxa/mfp-pxa300.h b/include/asm-arm/arch-pxa/mfp-pxa300.h index 822a27c..a209966 100644 --- a/include/asm-arm/arch-pxa/mfp-pxa300.h +++ b/include/asm-arm/arch-pxa/mfp-pxa300.h @@ -179,7 +179,7 @@ #define GPIO62_LCD_CS_N MFP_CFG_DRV(GPIO62, AF2, DS01X) #define GPIO72_LCD_FCLK MFP_CFG_DRV(GPIO72, AF1, DS01X) #define GPIO73_LCD_LCLK MFP_CFG_DRV(GPIO73, AF1, DS01X) -#define GPIO74_LCD_PCLK MFP_CFG_DRV(GPIO74, AF1, DS01X) +#define GPIO74_LCD_PCLK MFP_CFG_DRV(GPIO74, AF1, DS02X) #define GPIO75_LCD_BIAS MFP_CFG_DRV(GPIO75, AF1, DS01X) #define GPIO76_LCD_VSYNC MFP_CFG_DRV(GPIO76, AF2, DS01X) diff --git a/include/asm-arm/arch-pxa/mfp-pxa320.h b/include/asm-arm/arch-pxa/mfp-pxa320.h index 488a5bb..52deedc 100644 --- a/include/asm-arm/arch-pxa/mfp-pxa320.h +++ b/include/asm-arm/arch-pxa/mfp-pxa320.h @@ -18,7 +18,7 @@ #include <asm/arch/mfp.h> /* GPIO */ -#define GPIO46_GPIO MFP_CFG(GPIO6, AF0) +#define GPIO46_GPIO MFP_CFG(GPIO46, AF0) #define GPIO49_GPIO MFP_CFG(GPIO49, AF0) #define GPIO50_GPIO MFP_CFG(GPIO50, AF0) #define GPIO51_GPIO MFP_CFG(GPIO51, AF0) diff --git a/include/asm-arm/arch-pxa/mfp.h b/include/asm-arm/arch-pxa/mfp.h index ac4157a..03c508d 100644 --- a/include/asm-arm/arch-pxa/mfp.h +++ b/include/asm-arm/arch-pxa/mfp.h @@ -346,23 +346,31 @@ typedef uint32_t mfp_cfg_t; #define MFP_CFG_PIN(mfp_cfg) (((mfp_cfg) >> 16) & 0xffff) #define MFP_CFG_VAL(mfp_cfg) ((mfp_cfg) & 0xffff) -#define MFPR_DEFAULT (0x0000) +/* + * MFP register defaults to + * drive strength fast 3mA (010'b) + * edge detection logic disabled + * alternate function 0 + */ +#define MFPR_DEFAULT (0x0840) #define MFP_CFG(pin, af) \ ((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af)) #define MFP_CFG_DRV(pin, af, drv) \ - ((MFP_PIN_##pin << 16) | MFPR_DEFAULT |\ + ((MFP_PIN_##pin << 16) | (MFPR_DEFAULT & ~MFPR_DRV_MASK) |\ ((MFP_##drv) << 10) | (MFP_##af)) #define MFP_CFG_LPM(pin, af, lpm) \ - ((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af) |\ + ((MFP_PIN_##pin << 16) | (MFPR_DEFAULT & ~MFPR_LPM_MASK) |\ (((MFP_LPM_##lpm) & 0x3) << 7) |\ (((MFP_LPM_##lpm) & 0x4) << 12) |\ - (((MFP_LPM_##lpm) & 0x8) << 10)) + (((MFP_LPM_##lpm) & 0x8) << 10) |\ + (MFP_##af)) #define MFP_CFG_X(pin, af, drv, lpm) \ - ((MFP_PIN_##pin << 16) | MFPR_DEFAULT |\ + ((MFP_PIN_##pin << 16) |\ + (MFPR_DEFAULT & ~(MFPR_DRV_MASK | MFPR_LPM_MASK)) |\ ((MFP_##drv) << 10) | (MFP_##af) |\ (((MFP_LPM_##lpm) & 0x3) << 7) |\ (((MFP_LPM_##lpm) & 0x4) << 12) |\ diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index bb68b59..6b33df6 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -110,7 +110,10 @@ #define DALGN __REG(0x400000a0) /* DMA Alignment Register */ #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ -#define DRCMR(n) __REG2(0x40000100, (n)<<2) +#define DRCMR(n) (*(((n) < 64) ? \ + &__REG2(0x40000100, ((n) & 0x3f) << 2) : \ + &__REG2(0x40001100, ((n) & 0x3f) << 2))) + #define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */ #define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */ #define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */ |