diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-ppc/cputable.h | 3 | ||||
| -rw-r--r-- | include/asm-ppc/pgtable.h | 45 | ||||
| -rw-r--r-- | include/asm-ppc/reg_booke.h | 1 |
3 files changed, 31 insertions, 18 deletions
diff --git a/include/asm-ppc/cputable.h b/include/asm-ppc/cputable.h index 22de04f..41d8f84 100644 --- a/include/asm-ppc/cputable.h +++ b/include/asm-ppc/cputable.h @@ -86,8 +86,9 @@ static inline unsigned int cpu_has_feature(unsigned int feature) #define CPU_FTR_DUAL_PLL_750FX 0x00004000 #define CPU_FTR_NO_DPM 0x00008000 #define CPU_FTR_HAS_HIGH_BATS 0x00010000 -#define CPU_FTR_NEED_COHERENT 0x00020000 +#define CPU_FTR_NEED_COHERENT 0x00020000 #define CPU_FTR_NO_BTIC 0x00040000 +#define CPU_FTR_BIG_PHYS 0x00080000 #ifdef __ASSEMBLY__ diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h index e135b4a..a67bd51 100644 --- a/include/asm-ppc/pgtable.h +++ b/include/asm-ppc/pgtable.h @@ -225,8 +225,7 @@ extern unsigned long ioremap_bot, ioremap_base; /* ERPN in a PTE never gets cleared, ignore it */ #define _PTE_NONE_MASK 0xffffffff00000000ULL -#elif defined(CONFIG_E500) - +#elif defined(CONFIG_FSL_BOOKE) /* MMU Assist Register 3: @@ -240,21 +239,29 @@ extern unsigned long ioremap_bot, ioremap_base; entries use the top 29 bits. */ -/* Definitions for e500 core */ -#define _PAGE_PRESENT 0x001 /* S: PTE contains a translation */ -#define _PAGE_USER 0x002 /* S: User page (maps to UR) */ -#define _PAGE_FILE 0x002 /* S: when !present: nonlinear file mapping */ -#define _PAGE_ACCESSED 0x004 /* S: Page referenced */ -#define _PAGE_HWWRITE 0x008 /* H: Dirty & RW, set in exception */ -#define _PAGE_RW 0x010 /* S: Write permission */ -#define _PAGE_HWEXEC 0x020 /* H: UX permission */ - -#define _PAGE_ENDIAN 0x040 /* H: E bit */ -#define _PAGE_GUARDED 0x080 /* H: G bit */ -#define _PAGE_COHERENT 0x100 /* H: M bit */ -#define _PAGE_NO_CACHE 0x200 /* H: I bit */ -#define _PAGE_WRITETHRU 0x400 /* H: W bit */ -#define _PAGE_DIRTY 0x800 /* S: Page dirty */ +/* Definitions for FSL Book-E Cores */ +#define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */ +#define _PAGE_USER 0x00002 /* S: User page (maps to UR) */ +#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */ +#define _PAGE_ACCESSED 0x00004 /* S: Page referenced */ +#define _PAGE_HWWRITE 0x00008 /* H: Dirty & RW, set in exception */ +#define _PAGE_RW 0x00010 /* S: Write permission */ +#define _PAGE_HWEXEC 0x00020 /* H: UX permission */ + +#define _PAGE_ENDIAN 0x00040 /* H: E bit */ +#define _PAGE_GUARDED 0x00080 /* H: G bit */ +#define _PAGE_COHERENT 0x00100 /* H: M bit */ +#define _PAGE_NO_CACHE 0x00200 /* H: I bit */ +#define _PAGE_WRITETHRU 0x00400 /* H: W bit */ + +#ifdef CONFIG_PTE_64BIT +#define _PAGE_DIRTY 0x08000 /* S: Page dirty */ + +/* ERPN in a PTE never gets cleared, ignore it */ +#define _PTE_NONE_MASK 0xffffffffffff0000ULL +#else +#define _PAGE_DIRTY 0x00800 /* S: Page dirty */ +#endif #define _PMD_PRESENT 0 #define _PMD_PRESENT_MASK (PAGE_MASK) @@ -433,7 +440,11 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); /* in some case we want to additionaly adjust where the pfn is in the pte to * allow room for more flags */ +#if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT) +#define PFN_SHIFT_OFFSET (PAGE_SHIFT + 8) +#else #define PFN_SHIFT_OFFSET (PAGE_SHIFT) +#endif #define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET) #define pte_page(x) pfn_to_page(pte_pfn(x)) diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h index 4b03f8e..e70c25f 100644 --- a/include/asm-ppc/reg_booke.h +++ b/include/asm-ppc/reg_booke.h @@ -172,6 +172,7 @@ do { \ #define SPRN_MAS4 0x274 /* MMU Assist Register 4 */ #define SPRN_MAS5 0x275 /* MMU Assist Register 5 */ #define SPRN_MAS6 0x276 /* MMU Assist Register 6 */ +#define SPRN_MAS7 0x3b0 /* MMU Assist Register 7 */ #define SPRN_PID1 0x279 /* Process ID Register 1 */ #define SPRN_PID2 0x27A /* Process ID Register 2 */ #define SPRN_TLB0CFG 0x2B0 /* TLB 0 Config Register */ |