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2017-12-12staging: fsl_ppfe/eth: fix RGMII tx delay issueCalvin Johnson
Recently logic to enable RGMII tx delay was changed by below patch. https://patchwork.kernel.org/patch/9447581/ Based on the patch, appropriate change is made in PFE driver. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-12-12change _nfct to nfct for linux 4.9Calvin Johnson
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2017-12-12staging: fsl_ppfe/eth: introduce pfe driverCalvin Johnson
[pfe part] This patch introduces Linux support for NXP's LS1012A Packet Forwarding Engine (pfe_eth). LS1012A uses hardware packet forwarding engine to provide high performance Ethernet interfaces. The device includes two Ethernet ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-12-12staging: fsl_ppfe/eth: header files for pfe driverCalvin Johnson
This patch has all pfe header files. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-12-12net: fsl_ppfe: dts binding for ppfeCalvin Johnson
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-12-12staging: fsl_ppfe/eth: introduce pfe driverZhao Qiang
[config part] This patch introduces Linux support for NXP's LS1012A Packet Forwarding Engine (pfe_eth). LS1012A uses hardware packet forwarding engine to provide high performance Ethernet interfaces. The device includes two Ethernet ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-12-12Extend FM MAC Statistics with frame size countersIordache Florinel-R70177
Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
2017-10-12r8152: avoid rx queue more than 1000 packetshayeswang
Stop queuing rx packets if it is more than 1000. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-10-12dma: caam: fix desc error when data length is over 130815 bytesRadu Alexe
The CAAM DMA shared descriptor states that if a buffer is large enough it is broken into chunks of maximum 65280 bytes (DMA_MAX_DATA_CHUNK) and for each chunk a transfer request is issued. The length of the chunk for each iteration should be therefore computed as min(DMA_MAX_DATA_CHUNK, data_rem_length), where data_rem_length is the length of the chunks that still remain to be send. Currently the logic of the shared descriptor is broken: on every iteration the chunk length is instead computed as max(max_chunk_size, data_rem_length). This produces an error for the first chunk when buffer data length is greater than max_chunk_size + max_allowed_chunk_size = 65280 + 65535 = 130815. Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
2017-10-11arm64: dma-mapping: Only swizzle DMA ops for IOMMU_DOMAIN_DMAWill Deacon
The arm64 DMA-mapping implementation sets the DMA ops to the IOMMU DMA ops if we detect that an IOMMU is present for the master and the DMA ranges are valid. In the case when the IOMMU domain for the device is not of type IOMMU_DOMAIN_DMA, then we have no business swizzling the ops, since we're not in control of the underlying address space. This patch leaves the DMA ops alone for masters attached to non-DMA IOMMU domains. Signed-off-by: Will Deacon <will.deacon@arm.com> Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
2017-10-09soc: fsl: fix the compilation issueZhang Ying-22455
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-10-05dma: caam: add dma driver using scatter-gatherRadu Alexe
This module introduces a SG DMA driver based on the DMA capabilities of the CAAM hardware block. CAAM DMA is a platform driver that is only probed if the device is defined in the device tree. The driver creates a DMA channel for each JR of the CAAM. This introduces a dependency on the JR driver. Therefore a defering mechanism was used to ensure that the CAAM DMA driver is probed only after the JR driver. Signed-off-by: Radu Alexe <radu.alexe@nxp.com> Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com> Signed-off-by: Rajiv Vishwakarma <rajiv.vishwakarma@nxp.com>
2017-10-05arm64: dts: ls1012a: add caam-dma nodeRadu Alexe
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
2017-10-05crypto: caam: add caam-dma node to SEC4.0 device tree bindingRadu Alexe
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
2017-09-28iommu: Allow default domain type to be set on the kernel command lineWill Deacon
commit fccb4e3b8ab0957628abec82675691c72f67003e [bindings can't be applied] The IOMMU core currently initialises the default domain for each group to IOMMU_DOMAIN_DMA, under the assumption that devices will use IOMMU-backed DMA ops by default. However, in some cases it is desirable for the DMA ops to bypass the IOMMU for performance reasons, reserving use of translation for subsystems such as VFIO that require it for enforcing device isolation. Rather than modify each IOMMU driver to provide different semantics for DMA domains, instead we introduce a command line parameter that can be used to change the type of the default domain. Passthrough can then be specified using "iommu.passthrough=1" on the kernel command line. Signed-off-by: Will Deacon <will.deacon@arm.com> Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-09-28iommu/arm-smmu-v3: Install bypass STEs for IOMMU_DOMAIN_IDENTITY domainsWill Deacon
commit beb3c6a066bff1ba412f983cb9d1a42f4cd8f76a [context adjustment] In preparation for allowing the default domain type to be overridden, this patch adds support for IOMMU_DOMAIN_IDENTITY domains to the ARM SMMUv3 driver. An identity domain is created by placing the corresponding stream table entries into "bypass" mode, which allows transactions to flow through the SMMU without any translation. Signed-off-by: Will Deacon <will.deacon@arm.com> Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-09-28iommu/arm-smmu-v3: Make arm_smmu_install_ste_for_dev return voidWill Deacon
arm_smmu_install_ste_for_dev cannot fail and always returns 0, however the fact that it returns int means that callers end up implementing redundant error handling code which complicates STE tracking and is never executed. This patch changes the return type of arm_smmu_install_ste_for_dev to void, to make it explicit that it cannot fail. Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-09-28iommu/arm-smmu: Install bypass S2CRs for IOMMU_DOMAIN_IDENTITY domainsWill Deacon
In preparation for allowing the default domain type to be overridden, this patch adds support for IOMMU_DOMAIN_IDENTITY domains to the ARM SMMU driver. An identity domain is created by placing the corresponding S2CR registers into "bypass" mode, which allows transactions to flow through the SMMU without any translation. Reviewed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-09-28iommu/arm-smmu: Restrict domain attributes to UNMANAGED domainsWill Deacon
The ARM SMMU drivers provide a DOMAIN_ATTR_NESTING domain attribute, which allows callers of the IOMMU API to request that the page table for a domain is installed at stage-2, if supported by the hardware. Since setting this attribute only makes sense for UNMANAGED domains, this patch returns -ENODEV if the domain_{get,set}_attr operations are called on other domain types. Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-09-28iommu/arm-smmu-v3: Clear prior settings when updating STEsNate Watterson
To prevent corruption of the stage-1 context pointer field when updating STEs, rebuild the entire containing dword instead of clearing individual fields. Signed-off-by: Nate Watterson <nwatters@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-09-28DPIO: Prefer the CPU affine DPIORoy Pledge
Use the cpu affine DPIO unless there isn't one which can happen if less DPIOs than cores are assign to the kernel. Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-09-28staging: fsl-mc/dpio: Fix incorrect comparisonIoana Radulescu
For some dpio functions, a negative cpu id parameter value is valid and means "any". But when trying to validate this param value against an upper limit, in this case num_possible_cpus(), we risk obtaining the wrong result due to an implicit cast. Avoid an incorrect check result when cpu id is negative, by explicitly stating the comparison is between signed values. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
2017-09-28PCI: layerscape: Add support for ls1012aHou Zhiqiang
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-09-28soc: fsl: set rcpm bit for FTMZhang Ying-22455
Set RCPM for FTM when using FTM as wakeup source. Because the RCPM module of each platform has different big-end and little-end mode, there need to set RCPM depending on the platform. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28dts: ls1012a: Add PCIe controller DT nodeHou Zhiqiang
Add PCIe controller node for ls1012a platform. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-09-28dts: ls1012a: Add MSI controller DT nodeHou Zhiqiang
Add MSI controller node for ls1012a platform. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-09-28dt-bindings: clockgen: Add compatible string for LS1012AHarninder Rai
Signed-off-by: Harninder Rai <harninder.rai@nxp.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-09-28arm64: dts: ls208xa: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28arm64: dts: ls1046a: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28arm64: dts: ls1043a: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28arm: dts: ls1021a: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28arm64: dts: ls1012a: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28arm64: dts: ls1088a: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-26crypto: caam/qi2 - zeroize memory used for S/G entriesHoria Geantă
Memory used for S/G entries (kmem cache-backed) is not zeroized. More, the dpaa2_sg_* API does not offer getters, setters for all fields / bits. This means that there are bits that currently have random values. Probably the most problematic is SGE[BMT] (Bypass Memory Translation). When this "happens" to be set and IOMMU is enabled in the system, caam engine will report DMA errors - for e.g. see below self-tests failing: [...] dpaa2_caam dpseci.1: FD error: 000000a8 dpaa2_caam dpseci.1: 40001216: DECO: desc idx 18: DMA Error alg: skcipher: encryption failed on chunk test 1 for cbc-3des-caam-qi2: ret=5 dpaa2_caam dpseci.1: FD error: 00000088 dpaa2_caam dpseci.1: 40000916: DECO: desc idx 9: DMA Error alg: aead: encryption failed on test 1 for rfc4106-gcm-aes-caam-qi2: ret=5 dpaa2_caam dpseci.1: FD error: 000000a8 dpaa2_caam dpseci.1: 40001516: DECO: desc idx 21: DMA Error alg: aead-ddst: encryption failed on test 1 for rfc4543-gcm-aes-caam-qi2: ret=5 dpaa2_caam dpseci.1: FD error: 00000088 dpaa2_caam dpseci.1: 40000916: DECO: desc idx 9: DMA Error alg: aead: encryption failed on test 1 for gcm-aes-caam-qi2: ret=5 [...] Fix this by requiring allocated memory to be zeroized. Fixes: d4df6899d2c6 ("crypto: caam/qi2 - add DPAA2-CAAM driver") Fixes: 74e4a0d250d3 ("crypto: caam/qi2 - add ablkcipher algorithms") Fixes: 40865366205a ("crypto: caam/qi2 - add support for TLS 1.0 record") Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-09-25Revert "arm64: Increase the max granular size"Camelia Groza
This reverts commit 97303480753e48fb313dc0e15daaf11b0451cdb8. Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
2017-09-25mmc: sdhci-of-esdhc: disable SD clock for clock value 0Yangbo Lu
SD clock should be disabled for clock value 0. It's not right to just return. This may cause failure of signal voltage switching. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2017-09-25Revert "mtd: fsl-quadspi: disable AHB buffer prefetch"Suresh Gupta
As per Apps this patch/erratum is not required.
2017-09-25sdk_dpaa: ls1043a errata: restrict the max mtuCamelia Groza
We can not allow for Jumbo frames and large MTU values on LS1043A due to the A-010022 FMan errata. All outgoing frames larger than 4K bytes are dropped. Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
2017-09-25mtd: spi-nor: fsl-qspi: Limit read to specified count provided by above layerSuresh Gupta
TBDR is 4 bytes aligned buffer and to fill that, reading always 4 bytes from above layer, might exceed the boundary of above layer buffer and generate crash. patch resolve the crash of type "Unable to handle kernel paging request at virtual address **" Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
2017-09-25staging: fsl-dpaa2/eth: Add generic FD defines to DPIOHoria Geantă
Previous commits: 6e2387e8f19e ("staging: fsl-dpaa2/eth: Add Freescale DPAA2 Ethernet driver") 39163c0ce0f4 ("staging: fsl-dpaa2/eth: Errors checking update") have added bits that are not specific to the WRIOP accelerator. Move these where they belong (in DPIO) such that other accelerators can make use of them. While here, fix the values of FD_CTRL_FSE and FD_CTRL_FAERR, which were shifted off by one bit. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-09-25staging: fsl-dpaa2/eth: move generic FD defines to DPIOHoria Geantă
Previous commits: 6e2387e8f19e ("staging: fsl-dpaa2/eth: Add Freescale DPAA2 Ethernet driver") 39163c0ce0f4 ("staging: fsl-dpaa2/eth: Errors checking update") have added bits that are not specific to the WRIOP accelerator. Move these where they belong (in DPIO) such that other accelerators can make use of them. While here, fix the values of FD_CTRL_FSE and FD_CTRL_FAERR, which were shifted off by one bit. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-09-25crypto: caam/qi2 - fix gfp allocation flags (part II)Horia Geantă
Decide whether to use GFP_ATOMIC / GFP_KERNEL solely based on MAY_SLEEP flag, i.e. remove MAY_BACKLOG flag from the equation. Fixes: 4aef966f7e8a ("crypto: caam/qi2 - add ablkcipher algorithms") Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-09-25crypto: caam/qi2 - fix gfp allocation flags (part I)Horia Geantă
Decide whether to use GFP_ATOMIC / GFP_KERNEL solely based on MAY_SLEEP flag, i.e. remove MAY_BACKLOG flag from the equation. Fixes: 6220d7624b1d ("crypto: caam/qi2 - add DPAA2-CAAM driver") Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-09-25crypto: caam/qi2 - fix fd_flt_dma dma unmapping directionHoria Geantă
Direction for fd_flt_dma dma unmapping must be identical with the direction used for mapping, i.e. DMA_BIDIRECTIONAL. Fixes: 6220d7624b1d ("crypto: caam/qi2 - add DPAA2-CAAM driver") Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-09-25crypto: caam/qi2 - fix caam_exit_common() signatureHoria Geantă
Fix caam_exit_common function signature - it gets a pointer to a caam_ctx struct, not to a tfm. Fixes: 6220d7624b1d ("crypto: caam/qi2 - add DPAA2-CAAM driver") Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-09-25crypto: tcrypt - remove AES-XTS-192 speed testsHoria Geantă
Remove xts(aes) speed tests with 2 x 192-bit keys, since implementations adhering strictly to IEEE 1619-2007 standard cannot cope with key sizes other than 2 x 128, 2 x 256 bits - i.e. AES-XTS-{128,256}: [...] tcrypt: test 5 (384 bit key, 16 byte blocks): caam_jr 8020000.jr: key size mismatch tcrypt: setkey() failed flags=200000 [...] Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit b66ad0b7aa92e62dc65b56f28cfeb93dbeb82f43)
2017-09-25crypto: caam/qi2 - DPAA2-CAAM driver up-revHoria Geantă
Update existing DPAA2-CAAM driver with the latest version submitted in upstream: https://patchwork.kernel.org/patch/9894411 https://patchwork.kernel.org/patch/9894415 https://patchwork.kernel.org/patch/9894413 https://patchwork.kernel.org/patch/9894423 https://patchwork.kernel.org/patch/9894421 Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-09-25crypto: caam - fix incorrect defineRadu Alexe
Fixes: 3ebfa92f49a6 ("crypto: caam - Add new macros for building extended SEC descriptors (> 64 words)") Signed-off-by: Radu Alexe <radu.alexe@nxp.com> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-09-25crypto: caam - Remove unused dentry membersFabio Estevam
Most of the dentry members from structure caam_drv_private are never used at all, so it is safe to remove them. Since debugfs_remove_recursive() is called, we don't need the file entries. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit a92f7af3854ce6b80a4cd7e3df6148663f15671b)
2017-09-25crypto: caam - free qman_fq after kill_fqXulin Sun
kill_fq removes a complete frame queue, it needs to free the qman_fq in the last. Else kmemleak will report the below warning: unreferenced object 0xffff800073085c80 (size 128): comm "cryptomgr_test", pid 199, jiffies 4294937850 (age 67.840s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 a0 80 7e 00 00 80 ff ff 00 00 00 00 00 00 00 00 04 00 04 00 5c 01 00 00 backtrace: [<ffff8000001e5760>] create_object+0xf8/0x258 [<ffff800000994e38>] kmemleak_alloc+0x58/0xa0 [<ffff8000001d5f18>] kmem_cache_alloc_trace+0x2c8/0x358 [<ffff8000007e8410>] create_caam_req_fq+0x40/0x170 [<ffff8000007e870c>] caam_drv_ctx_update+0x54/0x248 [<ffff8000007fca54>] aead_setkey+0x154/0x300 [<ffff800000452120>] setkey+0x50/0xf0 [<ffff80000045b144>] __test_aead+0x5ec/0x1028 [<ffff80000045c28c>] test_aead+0x44/0xc8 [<ffff80000045c368>] alg_test_aead+0x58/0xd0 [<ffff80000045bdb4>] alg_test+0x14c/0x308 [<ffff8000004588e8>] cryptomgr_test+0x50/0x58 [<ffff8000000c3b2c>] kthread+0xdc/0xf0 [<ffff800000083c00>] ret_from_fork+0x10/0x50 And check where the function kill_fq() is called to remove the additional kfree to qman_fq and avoid re-calling the released qman_fq. Signed-off-by: Xulin Sun <xulin.sun@windriver.com> Acked-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 430f13389bdafa6fd9ce2999fed01dca8a5d79ae) Backported to NXP SDK kernel 4.9. Signed-by: Horia Geantă <horia.geanta@nxp.com>