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2015-06-21MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cguPaul Burton
2015-06-21MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cguPaul Burton
2015-06-21MIPS,clk: migrate JZ4740 to common clock frameworkPaul Burton
2015-06-21clk: ingenic: add driver for Ingenic SoC CGU clocksPaul Burton
2015-06-21DEVICETREE: Add Ingenic CGU binding documentationPaul Burton
2015-06-21MIPS: JZ4740: replace use of jz4740_clock_bdataPaul Burton
2015-06-21MIPS: JZ4740: Call jz4740_clock_init earlierPaul Burton
2015-06-21MIPS/IRQCHIP: Move Ingenic SoC intc driver to drivers/irqchipPaul Burton
2015-06-21MIPS: JZ4740: support newer SoC interrupt controllersPaul Burton
2015-06-21MIPS: JZ4740: Avoid JZ4740-specific namingPaul Burton
2015-06-21MIPS: JZ4740: read intc base address from DTPaul Burton
2015-06-21MIPS: JZ4740: define IRQ numbers based on number of intc IRQsPaul Burton
2015-06-21MIPS: JZ4740: support >32 interruptsPaul Burton
2015-06-21MIPS: JZ4740: Remove jz_intc_base globalPaul Burton
2015-06-21MIPS: JZ4740: drop intc debugfs codePaul Burton
2015-06-21MIPS: JZ4740: register an irq_domain for the interrupt controllerPaul Burton
2015-06-21MIPS: JZ4740: parse SoC interrupt controller parent IRQ from DTPaul Burton
2015-06-21MIPS: JZ4740: probe interrupt controller via DTPaul Burton
2015-06-21devicetree: document Ingenic SoC interrupt controller bindingPaul Burton
2015-06-21MIPS: JZ4740: Move arch_init_irq out of arch/mips/jz4740/irq.cPaul Burton
2015-06-21MIPS: JZ4740: use generic plat_irq_dispatchPaul Burton
2015-06-21MIPS: JZ4740: probe CPU interrupt controller via DTPaul Burton
2015-06-21IRQCHIP: irq_cpu: declare irqchip table entryPaul Burton
2015-06-21MIPS/IRQCHIP: Move irq_chip from arch/mips to drivers/irqchip.Ralf Baechle
2015-06-21MIPS: JZ4740: require & include DTPaul Burton
2015-06-21MIPS: ingenic: Add newer vendor IDsPaul Burton
2015-06-21MIPS: JZ4740: introduce CONFIG_MACH_INGENICPaul Burton
2015-06-21devicetree/bindings: add Qi Hardware vendor prefixPaul Burton
2015-06-21devicetree/bindings: add Ingenic Semiconductor vendor prefixPaul Burton
2015-06-21MIPS: DEC: Update CPU overridesMaciej W. Rozycki
2015-06-21MIPS: netlogic: remove unnecessary MTD partition probe specificationBrian Norris
2015-06-21MIPS: tlb-r3k: Optimise a TLBWI barrier in TLB invalidationMaciej W. Rozycki
2015-06-21MIPS: tlb-r3k: Move CP0.Wired register initialisation to `tlb_init'Maciej W. Rozycki
2015-06-21MIPS: tlb-r3k: Also invalidate wired TLB entries on bootMaciej W. Rozycki
2015-06-21MIPS: dump_tlb: Take XPA into accountJames Hogan
2015-06-21MIPS: dump_tlb: Take RI/XI bits into accountJames Hogan
2015-06-21MIPS: dump_tlb: Take EHINV bit into accountJames Hogan
2015-06-21MIPS: dump_tlb: Take global bit into accountJames Hogan
2015-06-21MIPS: dump_tlb: Make use of EntryLo bit definitionsJames Hogan
2015-06-21MIPS: dump_tlb: Refactor TLB matchingJames Hogan
2015-06-21MIPS: dump_tlb: Use tlbr hazard macrosJames Hogan
2015-06-21MIPS: mipsregs.h: Add EntryLo bit definitionsJames Hogan
2015-06-21MIPS: hazards: Add hazard macros for tlb readJames Hogan
2015-06-21MIPS: Add SysRq operation to dump TLBs on all CPUsJames Hogan
2015-06-21MIPS: traps: print Exception Code in __show_regs()Petri Gynther
2015-06-21MIPS: BCM47xx: Read board info for all bcma busesRafał Miłecki
2015-06-21MIPS: BCM47xx: Extract info about et2 interfaceRafał Miłecki
2015-06-21MIPS: BCM47xx: Extract all boardflags to new u32 fieldsRafał Miłecki
2015-06-21MIPS: BCM47XX: Simplify function looking for NVRAM entryRafał Miłecki
2015-06-21MIPS: BCM47XX: Make sure NVRAM buffer ends with \0Rafał Miłecki
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