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2013-06-28Merge tag 'msm-clock-for-3.11b' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/late From David Brown: MSM clock updates for 3.11. Per Stephen Boyd's coverletter: Resending to collect higher level maintainer acks per Olof's request. The plan is to push this patchset through MSM to the arm-soc tree. This patchset moves the existing MSM clock code and affected drivers to the common clock framework. A prerequisite of moving to the common clock framework is to use clk_prepare() and clk_enable() so the first few patches migrate drivers to that call (clk_prepare() is a no-op on MSM right now). It also removes some custom clock APIs that MSM provides and finally moves the proc_comm clock code to the common struct clk. This patch series will be used as the foundation of the MSM 8660/8960 clock code that I plan to send out after this series. * tag 'msm-clock-for-3.11b' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm: ARM: msm: Migrate to common clock framework ARM: msm: Make proc_comm clock control into a platform driver ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver ARM: msm: Remove clock-7x30.h include file ARM: msm: Remove custom clk_set_{max,min}_rate() API ARM: msm: Remove custom clk_set_flags() API msm: iommu: Use clk_set_rate() instead of clk_set_min_rate() msm: iommu: Convert to clk_prepare/unprepare msm_sdcc: Convert to clk_prepare/unprepare usb: otg: msm: Convert to clk_prepare/unprepare msm_serial: Use devm_clk_get() and properly return errors msm_serial: Convert to clk_prepare/unprepare Acked-by: Chris Ball <cjb@laptop.org> # for msm_sdcc.c Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-28Merge branch 'msm/fixes' into next/lateOlof Johansson
Merging in msm/fixes to avoid silly conflicts at top level. Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-27Merge tag 'davinci-for-v3.11/dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/late From Sekhar Nori: Device Tree updates for DaVinci This patch set updates da850 DTS files to enable use of C pre-processor. Also updates pinctrl-single DT data to go with changes done in that module to enable a single register to service configuration of multiple pins. * tag 'davinci-for-v3.11/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins ARM: davinci: da850: Use #include for all device trees Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-27ARM: ux500: bail out on alien cpusLinus Walleij
This makes the l2x0 initialization fail gracefully on non-ux500 systems. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-27Merge tag 'renesas-sh-sci-for-v3.11' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late Renesas sh-sci updates for v3.11 HSCIF support by Ulrich Hecht. * tag 'renesas-sh-sci-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: serial: sh-sci: Initialise variables before access in sci_set_termios() ARM: shmobile: r8a7790: don't use external clock for SCIFs ARM: shmobile: r8a7790: HSCIF support serial: sh-sci: HSCIF support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-27Merge branch 'renesas/boards2' into next/lateArnd Bergmann
Conflicts: arch/arm/mach-shmobile/setup-r8a7778.c This is a dependency for the Renesas sh-sci updates. Signedf-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-26ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple ↵Manjunathappa, Prakash
pins function-mask DT property is now a mask for a pin at each pin offset inside a given pincontrol register. Fix DA850 DT data to reflect this change. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> [nsekhar@ti.com: reword commit message for clarity] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-06-26serial: sh-sci: Initialise variables before access in sci_set_termios()Simon Horman
This change addresses two warnings that are flagged by gcc relating to potential access to the ssr and cks variables while they are uninitialised. I have addressed this by initialising the values to the defaults present in sci_baud_calc_hscif(). It is my analysis that cks is always initialised if used but that without this change ssr may be accessed while uninitialised. The code altered by this patch was introduced by commit f303b364b41d3fc5bf879799128958400b7859aa ("serial: sh-sci: HSCIF support"). Reported-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-25Merge branch 'sti/soc' into next/lateOlof Johansson
From Srinivas Kandagatla <srinivas.kandagatla@st.com>: This patch-set adds basic support for STMicroelectronics STi series SOCs which includes STiH415 and STiH416 with B2000 and B2020 board support. STiH415 and STiH416 are dual-core ARM Cortex-A9 CPU, designed for use in Set-top-boxes. The SOC support is available in mach-sti which contains support code for STiH415, STiH416 SOCs including the generic board support. The reason for adding two SOCs at this patch set is to show that no new C code is required for second SOC(STiH416) support. * sti/soc: ARM: stih41x: Add B2020 board support ARM: stih41x: Add B2000 board support ARM: sti: Add DEBUG_LL console support ARM: sti: Add STiH416 SOC support ARM: sti: Add STiH415 SOC support Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25Merge branch 'nspire/soc' into next/lateOlof Johansson
From Daniel Tang <dt.tangr@gmail.com> This is the initial platform code for the TI-Nspire graphing calculators. The platform support is rather unspectacular, but still contains platform data for the LCD panel, which will get removed once there is a DT binding for the AMBA CLCD driver. * nspire/soc: arm: Add Initial TI-Nspire support arm: Add device trees for TI-Nspire hardware Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25ARM: stih41x: Add B2020 board supportSrinivas Kandagatla
B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM with standard set-top box IPs. This patch adds initial support to B2020 with STiH415/416 with SBC_UART1 as console and a heard beat LED. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25ARM: stih41x: Add B2000 board supportSrinivas Kandagatla
B2000 board is reference board for STIH415/416 SOCs, it has 2 x UART, 4x USB, 2 x Ethernet, 1 x SATA, 1 x PCIe, and 1GB RAM. This patch add initial support to b2000 with STiH415/416 with UART2 as console and a heard beat LED. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25ARM: sti: Add DEBUG_LL console supportSrinivas Kandagatla
This patch adds low level debug uart support to sti based SOCs. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25ARM: sti: Add STiH416 SOC supportSrinivas Kandagatla
The STiH416 is advanced HD AVC processor with 3D graphics acceleration and 1.2-GHz ARM Cortex-A9 SMP CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25ARM: sti: Add STiH415 SOC supportSrinivas Kandagatla
The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25Merge tag 'soc-exynos5420-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late From Kukjin Kim, this adds pinctrl support for Exynos 5420. * tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: pinctrl: exynos: add exynos5420 SoC specific data ARM: dts: add pinctrl support to EXYNOS5420 Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-24ARM: msm: Migrate to common clock frameworkStephen Boyd
Move the existing clock code in mach-msm to the common clock framework. We lose our capability to set the rate of and enable a clock through debugfs. This is ok though because the debugfs features are mainly used for testing and development of new clock code. To maintain compatibility with the original MSM clock code we make a wrapper for clk_reset() that calls the struct msm_clk specific reset function. This is necessary for the usb and sdcc devices on MSM until a better suited API is made available. Cc: Saravana Kannan <skannan@codeaurora.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24ARM: msm: Make proc_comm clock control into a platform driverStephen Boyd
To move closer to the generic struct clock framework move the proc_comm based clock code to a platform driver. The data describing the struct clks still live in the devices-$ARCH file, but the clock initialization is done at driver binding time. Cc: Saravana Kannan <skannan@codeaurora.org> Reviewed-by: Pankaj Jangra <jangra.pankaj9@gmail.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driverStephen Boyd
In the near future we'll be moving clock-pcom to a platform driver, in which case these two users of clk_get() in mach-msm need to be updated. Have board-trout-panel.c make the proc_comm call directly so that we don't have to port this board specific code to the driver right now and reorder the initcall order of dma.c so that it initializes after the clock driver probes but before any drivers use dma APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24ARM: msm: Remove clock-7x30.h include fileStephen Boyd
This file is not used outside of the two users in the clock-7x30 array. Those two clocks are virtual "source" clocks that don't really need to exist outside of the clock driver. Let's remove them from the array, since they're not doing anything anyway, and then remove the clock-7x30.h include file along with it. Cc: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24ARM: msm: Remove custom clk_set_{max,min}_rate() APIStephen Boyd
There are no users of this API anymore so let's just remove it. If a need arises in the future we can extend the common clock API to handle it. Acked-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24ARM: msm: Remove custom clk_set_flags() APIStephen Boyd
Nobody is using this API upstream and it's just contributing cruft. Remove it so the MSM clock API is closer to the generic struct clock API. Acked-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24msm: iommu: Use clk_set_rate() instead of clk_set_min_rate()Stephen Boyd
Calling clk_set_min_rate() is no better than just calling clk_set_rate() because MSM clock code already takes care of calling the min_rate ops if the clock really needs clk_set_min_rate() called on it. Cc: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24msm: iommu: Convert to clk_prepare/unprepareStephen Boyd
Add calls to clk_prepare and unprepare so that MSM can migrate to the common clock framework. We never unprepare the clocks until driver remove because the clocks are enabled and disabled in irq context. Finer grained power management is possible in the future via runtime power management techniques. Cc: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24msm_sdcc: Convert to clk_prepare/unprepareStephen Boyd
Add calls to clk_prepare and unprepare so that MSM can migrate to the common clock framework. Cc: Chris Ball <cjb@laptop.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24usb: otg: msm: Convert to clk_prepare/unprepareStephen Boyd
Add calls to clk_prepare and unprepare so that MSM can migrate to the common clock framework. Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24msm_serial: Use devm_clk_get() and properly return errorsStephen Boyd
Clocks are not clk_put() in this driver's error paths during probe. The code that checks for clock errors also fails to properly return the error code from the pclk member if it turns out to be the failing clock, leading to potentially confusing error values if the clk member is not an error pointer. Fix these problems with devm_clk_get() and proper error checking. Removing the clk_put() in msm_serial_remove() also points out that msm_port is unused. Furthermore, msm_port is the wrong type and so the clk_put() would be using the wrong pointer. Replace it with the proper type and call uart_remove_one_port() to do the proper cleanup. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24msm_serial: Convert to clk_prepare/unprepareStephen Boyd
Add calls to clk_prepare and unprepare so that MSM can migrate to the common clock framework. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-21arm: Add Initial TI-Nspire supportDaniel Tang
This patch adds support for the TI-Nspire platform. Changes between v1 and v2: * Added GENERIC_IRQ_CHIP to platform Kconfig Signed-off-by: Daniel Tang <dt.tangr@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21arm: Add device trees for TI-Nspire hardwareDaniel Tang
This patch adds device trees for describing the TI-Nspire hardware. Changes between v1 and v2: * Change "keymap" binding to the standard "linux,keymap" binding. Signed-off-by: Daniel Tang <dt.tangr@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21Merge tag 'soc-exynos5420-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late From Kukjin Kim: based on tags/common-clk-audio - add support for exynos5420 SoC * tag 'soc-exynos5420-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: extend soft-reset support for EXYNOS5420 ARM: EXYNOS: add secondary CPU boot base location for EXYNOS5420 clocksource: exynos_mct: use (request/free)_irq calls for local timer registration ARM: dts: Add initial device tree support for EXYNOS5420 clk: exynos5420: register clocks using common clock framework ARM: EXYNOS: use four additional chipid bits to identify EXYNOS family serial: samsung: select EXYNOS specific driver data if ARCH_EXYNOS is defined ARM: EXYNOS: Add support for EXYNOS5420 SoC ARM: dts: list the CPU nodes for EXYNOS5250 ARM: dts: fork out common EXYNOS5 nodes Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21Merge tag 'renesas-cleanup-for-v3.11' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late From Simon Horman: Renesas ARM based SoC cleanups for v3.11 __initdata annotations for the r8a7790 SoC by Morimoto-san. * tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (158 commits) ARM: shmobile: r8a7790: add __initdata on resource and device data Based on 'renesas-pinmux-for-v3.11' and 'renesas-soc-for-v3.11 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20ARM: davinci: da850: Use #include for all device treesPhilip Avinash
Replace /include/ by #include for da850 device tree files, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-06-19pinctrl: exynos: add exynos5420 SoC specific dataLeela Krishna Amudala
Add Samsung EXYNOS5420 SoC specific data to enable pinctrl support for all platforms based on EXYNOS5420. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by : Sunil Joshi <joshi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-19ARM: dts: add pinctrl support to EXYNOS5420Leela Krishna Amudala
Add the required pin configuration support to EXYNOS5420 using pinctrl interface. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Tested-by : Sunil Joshi <joshi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: EXYNOS: extend soft-reset support for EXYNOS5420Chander Kashyap
Extend the soft reset support for EXYNOS5420 SoC. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: EXYNOS: add secondary CPU boot base location for EXYNOS5420Chander Kashyap
The location at which the boot address is specified for secondary CPUs of EXYNOS5420 is SYSRAM base + 4. Update the cpu_boot_reg function accordingly. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18clocksource: exynos_mct: use (request/free)_irq calls for local timer ↵Chander Kashyap
registration Replace the (setup/remove)_irq calls for local timer registration with (request/free)_irq calls. This generalizes the local timer registration API. Suggested by Mark Rutland. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: dts: Add initial device tree support for EXYNOS5420Chander Kashyap
Add initial device tree nodes for EXYNOS5420 SoC and SMDK5420 board. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18clk: exynos5420: register clocks using common clock frameworkChander Kashyap
The EXYNOS5420 clocks are statically listed and registered using the Samsung specific common clock helper functions. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: EXYNOS: use four additional chipid bits to identify EXYNOS familyChander Kashyap
Use chipid[27:20] bits to identify the EXYNOS family while setting up the serial port during the uncompression setup. This uses four additional bits of chipid to identify the EXYNOS family since this is required for identifying EXYNOS5420 SoC. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18serial: samsung: select EXYNOS specific driver data if ARCH_EXYNOS is definedChander Kashyap
All EXYNOS4/5 SoCs share a common driver data in the samsung serial driver. Hence, let the driver data inclusion be based on ARCH_EXYNOS instead of SOC specific definition. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Reviewed by: Girish K S <ks.giri@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: EXYNOS: Add support for EXYNOS5420 SoCChander Kashyap
EXYNOS5420 is new SoC in Samsung's Exynos5 SoC series. Add initial support for this new SoC. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: dts: list the CPU nodes for EXYNOS5250Chander Kashyap
Instead of having to specify the number for CPUs in EXYNOS5250 in platsmp.c file, let the number of CPUs be determined by having this information listed in EXYNOS5250 device tree file. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: dts: fork out common EXYNOS5 nodesChander Kashyap
In preparation of adding support for EXYNOS5420, which has many peripherals similar to EXYNOS5250, a new common EXYNOS5 device tree source file is created out of the exising EXYNOS5250 device tree source file. Only the common nodes required for basic boot up on EXYNOS5420 based boards are moved into this new file and the rest of the common nodes would be moved subsequently. EXYNOS5440 SoC is quite different from EXYNOS5250 and EXYNOS5420. Hence it is not possible to reuse "exynos5.dtsi" for EXYNOS5440. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2Padmavathi Venna
This patch adds enum entries for div_i2s1 and div_i2s2 which are required for i2s1 and i2s2 controllers. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: dts: Update Samsung I2S documentationPadmavathi Venna
This patch updates the samsung i2s documentation for pinmux and clock entries. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: dts: add clock provider information for i2s controllers in Exynos5250Padmavathi Venna
Add clock lookup information for i2s controllers on exynos5250 SoC. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: dts: add Exynos audio subsystem clock controller nodePadmavathi Venna
Audio subsystem introduced in s5pv210 and exynos platforms which has a internal clock controller. This patch adds a node for the same on exynos5250. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18clk: samsung: register audio subsystem clocks using common clock frameworkPadmavathi Venna
Audio subsystem is introduced in s5pv210 and exynos platforms. This has seperate clock controller which can control i2s0 and pcm0 clocks. This patch registers the audio subsystem clocks with the common clock framework on Exynos family. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>