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2017-12-12staging: fsl-dpaa2/eth: Add DCB supportBogdan Purcareata
Add initial DCB ops in the DPAA2 Ethernet driver. Currently they are dummy calls. Tested integration with userspace lldpad: - lldpad daemon running - bring interface up - lldptool -L -i niX adminStatus=rxtx - lldptool -T -i niX -V PFC -c enabled={prio comma separated list} - lldptool -t -i niX -V PFC -c enabled Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Switch to v2 dpni_set_pools cmdBogdan Purcareata
The v2 dpni_set_pools command format allows sending an additional parameter, the priority mask for the buffer pool. This can be used to configure multiple buffer pools for the same dpni, to serve different priorities. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Add fs entries for all tcsBogdan Purcareata
The current MC (10.3.1) design uses a separate flow steering table for each traffic class. When adding a flow steering rule, add it for each traffic class. The location of the rule is the same in all tables. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Handle multiple traffic classesBogdan Purcareata
The driver only handles frame workqueues associated with traffic class 0. Add support for multiple traffic classes for the same flowid, based on the tc field in the fq struct, and the num_tcs parameter in the dpni atttributes. Create a separate fq for each tc x flowid. Display the information in debugfs. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12arm32: dts: ls1021a: Add a compatible node for ls1021a esdhcyinbo.zhu
The compatible node is to mark the 1021a esdhc HW feature Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-12-12ARM: dts: ls1021a: Enable the esdhcyinbo.zhu
Ls1021a esdhc had been enabled in uboot, but it had not been enabled it in kernel, So set the esdhc's status to "okay". Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-12-12mmc: sdhci-of-esdhc: Workaround for reducing the maximum speed on ls1021atwryinbo.zhu
In SDHC high speed AC timing, the tshivkh parameter is defined as input setup times:SDHC_CMD, SDHC_DATx, to SDHC_CLK. The value of the tshivkh should be 2.5 ns considering the round trip delay, board/data skew. However, because of this erratum, it needs at least 4.1 ns. eSDHC cannot run at the maximum clock speed for the high speed mode, or there is a limit on the length of the trace on the board for data, command, and clock lines of the SDHC. Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-12-12mmc: sdhci-of-esdhc: fix eMMC couldn't work after kexecyinbo.zhu
The bit eSDHC_TBCTL[TB_EN] couldn't be reset by eSDHC_SYSCTL[RSTA] which is used to reset for all. The driver should make sure it's cleared before card initialization, otherwise the initialization would fail. Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-12-12PCI: layerscape: Change default error response behaviorMinghuan Lian
[modify to adapt to 4.9, pcie have member pp instead of pci] By default, when the PCIe controller experiences an erroneous completion from an external completer for its outbound non-posted request, it sends an OKAY response to the device's internal AXI slave system interface. However, this default system error response behavior cannot be used for other types of outbound non-posted requests. For example, the outbound memory read transaction requires an actual ERROR response, like UR completion or completion timeout. Fix this by forwarding the error response of the non-posted request. Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-12-12PCI: Disable MSI for Freescale Layerscape PCIe RC modeHou Zhiqiang
[context adjustment] The Freescale PCIe controller advertises the MSI/MSI-X capability in both RC and Endpoint mode, but in RC mode it doesn't support MSI/MSI-X by itself; it can only transfer MSI/MSI-X from downstream devices. Add a quirk to prevent use of MSI/MSI-X in RC mode. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Minghuan Lian <minghuan.Lian@nxp.com> Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-12-12crypto: testmgr - don't DMA map IV from stack in test_skcipher()Horia Geantă
Fix the "DMA-API: device driver maps memory from stack" warning generated when crypto accelerators map the IV. Note: while so far this has been only a warning and thus a theoretical issue, on latest kernel trees ablkcipher algorithms fail when IV is on the stack. Both caam/jr and caam/qi2 fail in the same way, i.e. same incorrect ciphertexts. Below is log for caam/qi2: alg: skcipher: Test 1 failed (invalid result) on encryption for cbc-aes-caam-qi2 00000000: ff 04 80 c3 af 64 47 db 3a 5c b9 b8 91 40 04 8f alg: skcipher: Test 1 failed (invalid result) on encryption for cbc-3des-caam-qi2 00000000: 22 11 b7 06 29 2a 88 cc 75 46 f4 14 8f d0 44 68 00000010: fe 08 88 30 8d d7 b3 01 21 ca 2d 46 0f 81 2e b6 00000020: ab 2f 38 52 79 00 42 82 5e 31 87 ac 8c 0d 19 88 00000030: 0a 27 5b 4b 6c aa f7 10 80 47 b6 81 83 58 7c 0a 00000040: 63 a5 f7 78 aa 05 11 56 9d 99 06 1d fb 98 01 28 00000050: 8a c0 86 7b 68 62 0c 66 84 b3 31 25 60 ad 13 65 00000060: 54 05 2f cd 4f 9a 1e e3 87 51 dc 11 a7 74 15 c4 00000070: 7a df 68 24 34 50 e6 5e 41 ba 98 48 ca 67 9a 6f alg: skcipher: Test 1 failed (invalid result) on encryption for cbc-des-caam-qi2 00000000: 52 ee 01 1b 1b a9 59 c7 a6 f5 ea 74 bf 8f f2 2c 00000010: fe d4 df 4a 50 64 3f 2a alg: skcipher: Test 1 failed (invalid result) on encryption for ctr-aes-caam-qi2 00000000: 4a 3d 28 7a e5 18 b7 84 ce 38 e2 f5 b2 86 58 0b 00000010: a1 04 9f 8f f5 a4 48 bd 0f c6 f3 af 6e d6 cb b3 00000020: 4c f1 52 30 3e bf bd d8 b2 9d 47 a0 40 42 dd 67 00000030: 70 2d 63 f3 1c 9e 96 07 75 29 1e ca db b2 35 ce alg: skcipher: Test 1 failed (invalid result) on encryption for rfc3686-ctr-aes-caam-qi2 00000000: 26 56 7f bb 8d 68 27 e3 52 e7 0f 51 ee 4f ae 03 alg: skcipher: Test 1 failed (invalid result) on encryption for xts-aes-caam-qi2 00000000: bf 84 80 16 02 00 ec 59 b2 d7 dc 2a 50 22 23 95 00000010: a8 e1 f2 65 15 72 67 1e e3 39 86 6b 4d 27 48 87 Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam/qi2 - add DKP support for tlsHoria Geantă
Add DKP support for tls using caam/qi2 as backend. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam/qi - add DKP support for tlsHoria Geantă
Add DKP support for tls using caam/qi as backend. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam/qi2 - add support for ahash algorithmsHoria Geantă
Add support for unkeyed and keyed (hmac) md5, sha algorithms. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam/qi2 - add DKP support for authenc algosHoria Geantă
Add DKP support for authenc algorithms using caam/qi2 as backend. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam - export ahash shared descriptor generationHoria Geantă
Upcoming caam/qi2 driver will support ahash algorithms, thus move ahash descriptors generation in a shared location. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam - add Derived Key Protocol (DKP) supportHoria Geantă
Offload split key generation in CAAM engine, using DKP. DKP is supported starting with Era 6. Note that the way assoclen is transmitted from the job descriptor to the shared descriptor changes - DPOVRD register is used instead of MATH3 (where available), since DKP protocol thrashes the MATH registers. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam - save Era in driver's private dataHoria Geantă
Save Era in driver's private data for further usage, like deciding whether an erratum applies or a feature is available based on its value. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam - remove unused param of ctx_map_to_sec4_sg()Horia Geantă
ctx_map_to_sec4_sg() function, added in commit 045e36780f115 ("crypto: caam - ahash hmac support") has never used the "desc" parameter, so let's drop it. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit dfcd8393efefb7a111f9cb6af69058ecaf4a4d72)
2017-12-12crypto: caam - remove unneeded edesc zeroizationHoria Geantă
Extended descriptor allocation has been changed by commit dde20ae9d6383 ("crypto: caam - Change kmalloc to kzalloc to avoid residual data") to provide zeroized memory, meaning we no longer have to sanitize its members - edesc->src_nents and edesc->dst_dma. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit f2ac67746534fab0cbc0bc29bfc3e507b1f58474)
2017-12-12arm64: lsdk.config: enable CONFIG_CRYPTO_USERHoria Geantă
Enable CONFIG_CRYPTO_USER to allow for configuring crypto algorithms from user space, for e.g. changing their priorities. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12arm64: dts: ls: Add optee nodeSumit Garg
Add optee device tree node on ls1012a, ls1043a, ls1046a, ls1088a and ls208xa. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-12-12arm64: defconfig: enable OP-TEEVictor Chong
This patch enables configs for Trusted Execution Environment (TEE) and OP-TEE. +CONFIG_TEE=y +CONFIG_OPTEE=y Signed-off-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-12-12DPAA: adjust DPAA to adapt to Linux 4.9Zhao Qiang
2017-12-12soc/qbman: Disable IRQs for deferred QBMan workRoy Pledge
Work for Congestion State Notifications (CSCN) and Message Ring (MR) handling is handled via the workqueue mechanism. This requires the driver to disable those IRQs before scheduling the work and re-enabling it once the work is completed so that the interrupt doesn't continually fire. Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12fsl/soc/qbman: Enable FSL_LAYERSCAPE config on ARMMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> [Stuart: changed to use ARCH_LAYERSCAPE] Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12soc/fsl/qbman: Add missing headers on ARMClaudiu Manoil
Unlike PPC builds, ARM builds need following headers explicitly: +#include <linux/io.h> for ioread32be() +#include <linux/delay.h> for udelay() Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12soc/fsl/qbman: different register offsets on ARMMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12soc/fsl/qbman: add QMAN_REV32Madalin Bucur
Add revision 3.2 of the QBMan block. This is the version for LS1043A and LS1046A SoCs. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12soc/fsl/qbman: Rework ioremap() calls for ARM/PPCRoy Pledge
Rework ioremap() for PPC and ARM. The PPC devices require a non-coherent mapping while ARM will work with a non-cachable/write combine mapping. Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12soc/fsl/qbman: Fix ARM32 typoValentin Rothberg
The Kconfig symbol for 32bit ARM is 'ARM', not 'ARM32'. Signed-off-by: Valentin Rothberg <valentinrothberg@gmail.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12soc/fsl/qbman: Drop L1_CACHE_BYTES compile time checkClaudiu Manoil
Not relevant and arch dependent. Overkill for PPC. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12soc/fsl/qbman: Drop set/clear_bits usageMadalin Bucur
Replace PPC specific set/clear_bits API with standard bit twiddling so driver is portalable outside PPC. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocationsRoy Pledge
Use the shared-memory-pool mechanism for frame queue descriptor and packed frame descriptor record area allocations. Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12soc/fsl/qbman: Use shared-dma-pool for BMan private memory allocationsRoy Pledge
Use the shared-memory-pool mechanism for free buffer proxy record area allocation. Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-12-12soc/qman: export non-programmable FQD fields queryHoria Geantă
Export qman_query_fq_np() function and related structures. This will be needed in the caam/qi driver, where "queue empty" condition will be decided based on the frm_cnt. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-12-12soc/qman: add dedicated channel ID for CAAMHoria Geantă
Add and export the ID of the channel serviced by the CAAM (Cryptographic Acceleration and Assurance Module) DCP. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-12-12soc/qman: export volatile dequeue related structsHoria Geantă
Since qman_volatile_dequeue() is already exported, move the related structures into the public header too. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-12-12soc/fsl/qman: test: use DEFINE_SPINLOCK()Fabian Frederick
Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Scott Wood <oss@buserror.net>
2017-12-12soc/fsl/bman: Use resource_size instead of computationWei Yongjun
Use resource_size function on resource object instead of explicit computation. Generated by: scripts/coccinelle/api/resource_size.cocci Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Scott Wood <oss@buserror.net>
2017-12-12soc/fsl/qbman: Convert to hotplug state machineSebastian Andrzej Siewior
Install the callbacks via the state machine. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Scott Wood <oss@buserror.net> Cc: Claudiu Manoil <claudiu.manoil@nxp.com> Cc: rt@linutronix.de Cc: Roy Pledge <roy.pledge@nxp.com> Link: http://lkml.kernel.org/r/20161126231350.10321-21-bigeasy@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-12-12soc/fsl/qbman: Convert to hotplug state machineSebastian Andrzej Siewior
Install the callbacks via the state machine. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Scott Wood <oss@buserror.net> Cc: Claudiu Manoil <claudiu.manoil@nxp.com> Cc: rt@linutronix.de Cc: Roy Pledge <roy.pledge@nxp.com> Link: http://lkml.kernel.org/r/20161126231350.10321-20-bigeasy@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-12-12soc/qman: Handle endianness of h/w descriptorsClaudiu Manoil
The hardware descriptors have big endian (BE) format. Provide proper endianness handling for the remaining descriptor fields, to ensure they are correctly accessed by non-BE CPUs too. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Scott Wood <oss@buserror.net>
2017-12-12soc/qman: Clean up CGR CSCN target update operationsClaudiu Manoil
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Scott Wood <oss@buserror.net>
2017-12-12soc/qman: Change remaining contextB into context_bClaudiu Manoil
There are multiple occurences of both contextB and context_b in different h/w descriptors, referring to the same descriptor field known as "Context B". Stick with the "context_b" naming, for obvious reasons including consistency (see also context_a). Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Scott Wood <oss@buserror.net>
2017-12-12soc/qbman: Handle endianness of qm/bm_in/out()Claudiu Manoil
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Scott Wood <oss@buserror.net>
2017-12-12soc/qman: Drop unused field from eqcr/dqrr descriptorsClaudiu Manoil
ORP ("Order Restoration Point") mechanism not supported. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Scott Wood <oss@buserror.net>
2017-12-12soc/qman: Fix accesses to fqid, cleanupClaudiu Manoil
Preventively mask every access to the 'fqid' h/w field, since it is defined as a 24-bit field, for every h/w descriptor. Add generic accessors for this field to ensure correct access. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Scott Wood <oss@buserror.net>
2017-12-12soc/qman: Remove unused struct qm_mcc* layoutsClaudiu Manoil
1. qm_mcc_querywq layout not used for now, so drop it; 2. queryfq, queryfq_np and alterfq are used only for accesses to the 'fqid' field, so replace these with a generic 'fq' layout. As a consequence, 'querycgr' turns into 'cgr' following the same reasoning above and for consistent naming. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Scott Wood <oss@buserror.net>
2017-12-12soc/qman: Remove redundant checks from qman_create_cgr()Claudiu Manoil
opts is checked redundantly. Move local_opts declaration inside its usage scope. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Scott Wood <oss@buserror.net>
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