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Make return value void since function never return meaningful value
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
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Invalidate the cache for the software portals before using them
since the portals are non coherent. This ensures that the core
using the portal is seeing the most up to date information in
case the cache contained older data. This is important during
the cleanup phase if cleanup occurs on a differnt core than
what the application was using.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
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Use the management commmand response registers to determine
the next expected valid bit when initializing a software
portal. This avoids using the wrong valid bit in cases
where a command was partially written but then not
completed.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
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The errata prevents us from transmitting S/G frames. Instead of
linearizing them ourselves, stop advertising S/G support and have the
stack do it for us.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
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Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com>
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Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
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Add support for ls1088a.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Minghuan Lian <minghuan.Lian@nxp.com>
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This product is named 'TP-LINK USB 3.0 Gigabit Ethernet Network
Adapter (Model No.is UE300)'. It uses chip RTL8153 and works with
driver drivers/net/usb/r8152.c
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
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Issue: When the USB controller is configured as a USB device
mode, the device initiates low power when an ACK is pending for a
data packet (DP). When operating in SuperSpeed mode and when the
internal condition for low power (u1/u2) is satisfied, the device
initiates u1/u2 even though it has just received a DPH of the DP
header (DPH). This causes the link to enter and exit low power before
the device sends an ACK for the DP. This behavior can cause a
transaction timeout on the host for the DP. Impact: Depending on the
host transaction timeout value, the host may timeout on the
transaction and the host retries the transfer. If the same issue
happens again, this could result in the host resetting the device and
re-enumerating.
Workaround: Disable USB_DCTL (InitU1Ena, InitU2Ena) bits. As a
result,the device does not initiate lowpower requests; however,
it can still accept low-power requests from the host/hub and enter
low power.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
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[PowerPC part]
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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[PowerPC part]
The codes of qe_ic init from a variety of platforms are redundant,
merge them to a common function and put it to irqchip/irq-qeic.c
For non-p1021_mds mpc85xx_mds boards, use "qe_ic_init(np, 0,
qe_ic_cascade_low_mpic, qe_ic_cascade_high_mpic);" instead of
"qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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Documentation/networking/netdevices.txt mentions that interfaces must
be able to receive frames at least the size of the configured MTU. The
behavior for received frames larger than the MTU is unspecified. We have
been dropping these frames in software. Remove this behavior and accept
them.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
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Enable CAAM (Cryptographic Accelerator and Assurance Module) driver
for QorIQ Data Path Acceleration Architecture (DPAA) v2.
It handles DPSECI (Data Path SEC Interface) DPAA2 objects that sit
on the Management Complex (MC) fsl-mc bus.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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The ls1012a implement only 1 msi controller, and it is the same as
ls1043a.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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add CONFIG_FSL_PPFE_UTIL_DISABLED to arm32
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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While fixing checkpatch errors some of the index increments
were commented out. They are enabled.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
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Remove unused functions hif_xmit_pkt & hif_lib_xmit_pkt.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
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Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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This change is due to a future patch that will introduce memcpy support
for the caam_dma driver. Therefore a distinction must be made between
sg/memcpy functions.
Also, when fields are used in common (ex. src_dma, dst_dma), they must
not show any bias in their naming towards any particular functionality.
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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Recently logic to enable RGMII tx delay was changed by
below patch.
https://patchwork.kernel.org/patch/9447581/
Based on the patch, enabling tx delay again using rgmii-txid.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
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Update ls1012a dtsi and platform dts files with
support for ppfe.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
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Recently logic to enable RGMII tx delay was changed by
below patch.
https://patchwork.kernel.org/patch/9447581/
Based on the patch, appropriate change is made in PFE driver.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
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Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
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[pfe part]
This patch introduces Linux support for NXP's LS1012A Packet
Forwarding Engine (pfe_eth). LS1012A uses hardware packet forwarding
engine to provide high performance Ethernet interfaces. The device
includes two Ethernet ports.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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This patch has all pfe header files.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
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Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
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[config part]
This patch introduces Linux support for NXP's LS1012A Packet
Forwarding Engine (pfe_eth). LS1012A uses hardware packet forwarding
engine to provide high performance Ethernet interfaces. The device
includes two Ethernet ports.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
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Stop queuing rx packets if it is more than 1000.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The CAAM DMA shared descriptor states that if a buffer is large enough it
is broken into chunks of maximum 65280 bytes (DMA_MAX_DATA_CHUNK) and for
each chunk a transfer request is issued. The length of the chunk for each
iteration should be therefore computed as min(DMA_MAX_DATA_CHUNK,
data_rem_length), where data_rem_length is the length of the chunks that
still remain to be send.
Currently the logic of the shared descriptor is broken: on every iteration
the chunk length is instead computed as max(max_chunk_size,
data_rem_length). This produces an error for the first chunk when buffer
data length is greater than max_chunk_size + max_allowed_chunk_size =
65280 + 65535 = 130815.
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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The arm64 DMA-mapping implementation sets the DMA ops to the IOMMU DMA
ops if we detect that an IOMMU is present for the master and the DMA
ranges are valid.
In the case when the IOMMU domain for the device is not of type
IOMMU_DOMAIN_DMA, then we have no business swizzling the ops, since
we're not in control of the underlying address space. This patch leaves
the DMA ops alone for masters attached to non-DMA IOMMU domains.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
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Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
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This module introduces a SG DMA driver based on the DMA capabilities of
the CAAM hardware block. CAAM DMA is a platform driver that is only
probed if the device is defined in the device tree. The driver creates
a DMA channel for each JR of the CAAM. This introduces a dependency on
the JR driver. Therefore a defering mechanism was used to ensure that
the CAAM DMA driver is probed only after the JR driver.
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Rajiv Vishwakarma <rajiv.vishwakarma@nxp.com>
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Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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commit fccb4e3b8ab0957628abec82675691c72f67003e
[bindings can't be applied]
The IOMMU core currently initialises the default domain for each group
to IOMMU_DOMAIN_DMA, under the assumption that devices will use
IOMMU-backed DMA ops by default. However, in some cases it is desirable
for the DMA ops to bypass the IOMMU for performance reasons, reserving
use of translation for subsystems such as VFIO that require it for
enforcing device isolation.
Rather than modify each IOMMU driver to provide different semantics for
DMA domains, instead we introduce a command line parameter that can be
used to change the type of the default domain. Passthrough can then be
specified using "iommu.passthrough=1" on the kernel command line.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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commit beb3c6a066bff1ba412f983cb9d1a42f4cd8f76a
[context adjustment]
In preparation for allowing the default domain type to be overridden,
this patch adds support for IOMMU_DOMAIN_IDENTITY domains to the
ARM SMMUv3 driver.
An identity domain is created by placing the corresponding stream table
entries into "bypass" mode, which allows transactions to flow through
the SMMU without any translation.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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arm_smmu_install_ste_for_dev cannot fail and always returns 0, however
the fact that it returns int means that callers end up implementing
redundant error handling code which complicates STE tracking and is
never executed.
This patch changes the return type of arm_smmu_install_ste_for_dev
to void, to make it explicit that it cannot fail.
Signed-off-by: Will Deacon <will.deacon@arm.com>
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In preparation for allowing the default domain type to be overridden,
this patch adds support for IOMMU_DOMAIN_IDENTITY domains to the
ARM SMMU driver.
An identity domain is created by placing the corresponding S2CR
registers into "bypass" mode, which allows transactions to flow through
the SMMU without any translation.
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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The ARM SMMU drivers provide a DOMAIN_ATTR_NESTING domain attribute,
which allows callers of the IOMMU API to request that the page table
for a domain is installed at stage-2, if supported by the hardware.
Since setting this attribute only makes sense for UNMANAGED domains,
this patch returns -ENODEV if the domain_{get,set}_attr operations are
called on other domain types.
Signed-off-by: Will Deacon <will.deacon@arm.com>
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To prevent corruption of the stage-1 context pointer field when
updating STEs, rebuild the entire containing dword instead of
clearing individual fields.
Signed-off-by: Nate Watterson <nwatters@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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Use the cpu affine DPIO unless there isn't one which can happen
if less DPIOs than cores are assign to the kernel.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
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For some dpio functions, a negative cpu id parameter value is
valid and means "any". But when trying to validate this param
value against an upper limit, in this case num_possible_cpus(),
we risk obtaining the wrong result due to an implicit cast.
Avoid an incorrect check result when cpu id is negative, by
explicitly stating the comparison is between signed values.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
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Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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Set RCPM for FTM when using FTM as wakeup source. Because the RCPM
module of each platform has different big-end and little-end mode,
there need to set RCPM depending on the platform.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
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Add PCIe controller node for ls1012a platform.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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Add MSI controller node for ls1012a platform.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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