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AgeCommit message (Expand)Author
2016-03-09drm/i915: Refactor platform specifics out of intel_get_shared_dpll()Ander Conselvan de Oliveira
2016-03-09drm/i915: Use a table to initilize shared dpllsAnder Conselvan de Oliveira
2016-03-09drm/i915: Move shared dpll function prototypes to intel_dpll_mgr.hAnder Conselvan de Oliveira
2016-03-09drm/i915: Move shared dpll struct definitions to separate header fileAnder Conselvan de Oliveira
2016-03-09drm/i915: Store a direct pointer to shared dpll in intel_crtc_stateAnder Conselvan de Oliveira
2016-03-09drm/i915: Split intel_get_shared_dpll() into smaller functionsAnder Conselvan de Oliveira
2016-03-09drm/i915: Move ddi shared dpll code to intel_dpll_mgr.cAnder Conselvan de Oliveira
2016-03-09drm/i915: Move shared dpll code to a new fileAnder Conselvan de Oliveira
2016-03-09drm/i915: Only use sanitized values for ILK watermarksMaarten Lankhorst
2016-03-09drm/i915/bxt: add missing DSI power domain to power well 1Jani Nikula
2016-03-07drm/i915: Fix bogus dig_port_map[] assignment for pre-HSWTakashi Iwai
2016-03-07drm/i915/gen9: Fix DMC firmware initializationImre Deak
2016-03-04drm/i915/hangcheck: Prevent long walks across full-ppgttMika Kuoppala
2016-03-04drm/i915: Generalise common GPU engine reset request/unrequest codeTomas Elf
2016-03-04drm/i915: Use DIV_ROUND_CLOSEST for PWM calculationsVille Syrjälä
2016-03-04drm/i915: Clean up .get_aux_clock_divider() functionsVille Syrjälä
2016-03-04drm/i915: Read out hrawclk from CCK on vlv/chvVille Syrjälä
2016-03-04drm/i915: Use g4x_get_aux_clock_divider() for VLV/CHVVille Syrjälä
2016-03-04drm/i915: Rename s/i9xx/g4x/ in DP codeVille Syrjälä
2016-03-04drm/i915: Store rawclk_freq in dev_privVille Syrjälä
2016-03-03drm/i915: Do not wait atomically for display clocksTvrtko Ursulin
2016-03-03drm/i915: Do not lie about atomic timeout granularityTvrtko Ursulin
2016-03-03drm/i915: Kconfig for extra driver debuggingTvrtko Ursulin
2016-03-03drm/i915/lrc: Do not wait atomically when stopping enginesTvrtko Ursulin
2016-03-03drm/i915: Add wait_for_usTvrtko Ursulin
2016-03-03drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwardsDeepak M
2016-03-03drm/i915: Only recalculate wm's for planes part of the state, v2.Maarten Lankhorst
2016-03-03drm/i915: Allow preservation of watermarks, v2.Maarten Lankhorst
2016-03-03drm/i915: Handle invalid ilk pipe watermarks correctly.Maarten Lankhorst
2016-03-02drm/i915: Hold RPM reference while setting freq limits through sysfsSagar Arun Kamble
2016-03-02drm/i915: Avoid snooping with userptr where not supportedTvrtko Ursulin
2016-03-02drm/i915: Do not return unknown status when load detection is tested.Maarten Lankhorst
2016-03-01drm/i915/gen9: Remove state asserts when disabling DC statesImre Deak
2016-03-01drm/i915/gen9: Disable DC states if power well support is disabledImre Deak
2016-03-01drm/i915/gen9: Sanitize handling of allowed DC statesImre Deak
2016-03-01drm/i915/skl: Fix power domain suspend sequenceImre Deak
2016-03-01drm/i915/error: Capture WA ctx batch in error statearun.siluvery@linux.intel.com
2016-03-01drm/i915: Try to fix CRT port clock limitsVille Syrjälä
2016-03-01drm/i915: Read out VGA dotclock properly on LPTVille Syrjälä
2016-03-01drm/i915: Make the LPT iclkip 20MHz case more genericVille Syrjälä
2016-03-01drm/i915: Remove the SPLL==270Mhz assumption from intel_fdi_link_freq()Ville Syrjälä
2016-03-01drm/i915: Move the encoder vs. FDI dotclock check out from encoder .get_config()Ville Syrjälä
2016-03-01drm/i915: Dump ddi_pll_sel in hex instead of decimal on HSW/BDWVille Syrjälä
2016-03-01drm/i915: Embed rotation_info under intel_framebufferVille Syrjälä
2016-03-01drm/i915: Move the NULL sg handling out from rotate_pages()Ville Syrjälä
2016-03-01drm/i915: Reorganize intel_rotation_infoVille Syrjälä
2016-03-01drm/i915: Pass drm_frambuffer to intel_compute_page_offset()Ville Syrjälä
2016-03-01drm/i915: Don't pass plane+plane_state to intel_pin_and_fence_fb_obj()Ville Syrjälä
2016-03-01drm/i915: Support for extra alignment for tiled surfacesVille Syrjälä
2016-03-01drm/i915: Pass 90/270 vs. 0/180 rotation info for intel_gen4_compute_page_off...Ville Syrjälä
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