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- move dpaa2_mac_open and dpaa2_mac_stop out of
CONFIG_FSL_DPAA2_MAC_NETDEVS, since their implementation is necessary
regardless of it
- reorder ndo ops to match function implementation order
- update comment to describe the phy connection mode that's to be used -
it no longer depends on DPC, but on the device tree
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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free_netdev (put_device) already handles freeing the private data
structure, and KASAN will complain due to a free after free if we
explicitly do the same afterwards.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Add a Kconfig option for enabling Data Center Bridging (DCB)
support in the Ethernet driver. This is needed for priority
flow control support.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
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When system wakes up from sleep on ls1046ardb, the SD operation fails
with mmc error messages since ESDHC_TB_EN bit couldn’t be cleaned by
eSDHC_SYSCTL[RSTA]. It's proper to clean this bit in esdhc_reset()
rather than in probe.
Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
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The replacement of MDHA split key generation with DKP has the side
effect of the crypto engine writing the authentication key, and thus
the DMA mapping direction for the buffer holding the key has to change
from DMA_TO_DEVICE to DMA_BIDIRECTIONAL.
There are two cases:
-key is inlined in descriptor - descriptor buffer mapping changes
-key is referenced - key buffer mapping changes
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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setkey() callback may be invoked multiple times for the same tfm.
In this case, DMA API leaks are caused by shared descriptors
and keys being mapped several times and unmapped only once.
Fix this by performing mapping / unmapping only in crypto algorithm's
cra_init() / cra_exit() callbacks and sync_for_device in the setkey()
tfm callback.
This is similar to commit
bbf2234494af "crypto: caam - fix DMA API leaks for multiple setkey() calls"
and also to caam/qi2 ahash implementation.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Move flc_dma member (which is accessed only by GPP) out of the caam_flc
structure, which is DMA mapped and intended for crypto engine
consumption.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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ablkcipher (xts included) algorithms have shared descriptors with
immediate (inline) keys.
Accordingly, there is no need to:
-copy user-provided keys in ctx->key
-DMA map the keys
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Key data is not modified, it is copied in the shared descriptor.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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currently big endian was not supported on qdma,update the dma descriptor
structure to support big endian mode.
Signed-off-by: Wen He <wen.he_1@nxp.com>
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Signed-off-by: Wen He <wen.he_1@nxp.com>
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Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
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According to the hardware ArchDef, the PTV1 field in FD[CTRL]
is ignored by WRIOP, so setting it for Tx FDs is pointless.
Remove all references to it from the code.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
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While in NAPI context, free skbs by calling napi_consume_skb()
instead of dev_kfree_skb(), to take advantage of the bulk freeing
mechanism.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
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When releasing buffers to the hardware pool, don't call
cpu_relax() unless we are actually waiting for the QBMan
portal to finish the previous command.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
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The network stack will take care to reserve space for HH_DATA_MOD when
building the skb, so there's no need to account for it in the netdevice
needed headroom. Based on that, decrease the frame buffer headroom for
ingress frames.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
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Instead of the old opaque value, define the Rx buffer headroom size
based on other frame buffer fields, in accordance to how we expect them
to be configured by MC.
Based on DPNI_BUF_LAYOUT_OPT_TIMESTAMP, MC will enable an additional
field in the Tx hardware annotation area, increasing its size to 128.
Update the driver value to reflect this.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
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When configuring the Tx buffer layout, the software annotation size is
mentioned, and MC accounts for it when configuring the frame
tx_data_offset. No need to handle it in the driver as well.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
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Since adding support for multiple buffer thresholds (taildrop, flow
control pause frames, PFC pause frames), it's useful to have the
per-channel buffer count available in the debug stats.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Make sure the NAPI instances are enabled only after all other
device initialization is done, to avoid accessing uninit vars.
Mirror that change on device remove routine.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
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On Rx path, if we fail to build an skb from the incoming FD,
we still need to update the channel buffer count accordingly,
otherwise we risk depleting the pool while the software counter
still sees available buffers.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
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We incorrectly assumed that dpaa2_io_release() can only
return -EBUSY as an error code, when in fact it can also
fail in case some of its arguments don't have valid values.
Make sure we only retry the operation while the portal is
busy and abort for all other error cases, otherwise we risk
entering an endless loop.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
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Commit 42a1431068088 in the LSDK 4.9 kernel("usb: host: Add support
to add/remove usb host driver") introduced the compilation error. We fix it now.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
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As per USB specification, in the Suspend state, the status bit does
not change until the port is suspended. However, there may be a delay
in suspending a port if there is a transaction currently in progress
on the bus.
In the USBDR controller, the PORTSCx[SUSP] bit changes immediately when
the application sets it and not when the port is actually suspended
Workaround for this issue involves waiting for a minimum of 10ms to
allow the controller to go into SUSPEND state before proceeding ahead
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Change-Id: I8d20619d7d62afc12981c2f913c3d3ec735f7e64
Reviewed-on: http://git.am.freescale.net:8181/3996
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Aggrwal Poonam-B10812 <Poonam.Aggrwal@freescale.com>
Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
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Commit f44116ae8818 ("PCI: Remove pci_find_parent_resource() use for
allocation") updated the logic that iterates over all bus resources and
compares them to a given resource, in order to decide whether one is the
parent of the latter.
This change inadvertently causes pci_find_parent_resource() to disregard
resources starting at address 0x0, resulting in an error such as the one
below on ARM systems whose I/O window starts at 0x0.
pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff window]
pci_bus 0000:00: root bus resource [io 0x0000-0xffff window]
pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff window]
pci_bus 0000:00: root bus resource [bus 00-0f]
pci 0000:00:01.0: PCI bridge to [bus 01]
pci 0000:00:02.0: PCI bridge to [bus 02]
pci 0000:00:03.0: PCI bridge to [bus 03]
pci 0000:00:03.0: can't claim BAR 13 [io 0x0000-0x0fff]: no compatible bridge window
pci 0000:03:01.0: can't claim BAR 0 [io 0x0000-0x001f]: no compatible bridge window
While this never happens on x86, it is perfectly legal in general for a PCI
MMIO or IO window to start at address 0x0, and it was supported in the code
before commit f44116ae8818.
Drop the test for res->start != 0; resource_contains() already checks
whether [start, end) completely covers the resource, and so it should be
redundant.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Fix compiling errors for backporting dash-lts.
Signed-off-by: Guanhua Gao <guanhua.gao>
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The dpaa2-eth PFC configuration is kept in a private driver variable.
When getting PFC configuration via ieee_getpfc, get it straight from the
Management Complex based on the Rx congestion notification setup.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Implement the following:
- Enable PFC in DPNI options.
- Set queue taildrops for priorities (traffic classes) that are not PFC
enabled (pause frames are not sent in case of congestion). Since the
buffer pool is shared, we can't risk other traffic to consume all
available buffers.
- Configure Rx congestion notifications for PFC enabled priorities.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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With the introduction of PFC support, there are multiple ways taildrop
is configured, based on the DPNI pause frame configuration:
- no pause frames - per-queue taildrop thresholds.
- pause frames - no taildrop thresholds (pause frames sent based on
buffer depletion).
- PFC pause frames - per-group (traffic class) taildrop thresholds for
non-PFC enabled priorities (pause frames sent based on Rx congestion
notifications).
Refactor the fq taildrop setup area.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Configure static ingress classification based on VLAN PCP, required by
PFC.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Add initial DCB ops in the DPAA2 Ethernet driver. Currently they are
dummy calls.
Tested integration with userspace lldpad:
- lldpad daemon running
- bring interface up
- lldptool -L -i niX adminStatus=rxtx
- lldptool -T -i niX -V PFC -c enabled={prio comma separated list}
- lldptool -t -i niX -V PFC -c enabled
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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The v2 dpni_set_pools command format allows sending an additional
parameter, the priority mask for the buffer pool. This can be used to
configure multiple buffer pools for the same dpni, to serve different
priorities.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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The current MC (10.3.1) design uses a separate flow steering table for
each traffic class. When adding a flow steering rule, add it for each
traffic class. The location of the rule is the same in all tables.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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The driver only handles frame workqueues associated with traffic class
0. Add support for multiple traffic classes for the same flowid, based
on the tc field in the fq struct, and the num_tcs parameter in the dpni
atttributes. Create a separate fq for each tc x flowid. Display the
information in debugfs.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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The compatible node is to mark the 1021a esdhc HW feature
Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
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Ls1021a esdhc had been enabled in uboot,
but it had not been enabled it in kernel,
So set the esdhc's status to "okay".
Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
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In SDHC high speed AC timing, the tshivkh parameter
is defined as input setup times:SDHC_CMD, SDHC_DATx,
to SDHC_CLK. The value of the tshivkh should be 2.5 ns
considering the round trip delay, board/data skew.
However, because of this erratum, it needs
at least 4.1 ns.
eSDHC cannot run at the maximum clock speed for the
high speed mode, or there is a limit on the length
of the trace on the board for data, command, and
clock lines of the SDHC.
Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
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The bit eSDHC_TBCTL[TB_EN] couldn't be reset by eSDHC_SYSCTL[RSTA] which is
used to reset for all. The driver should make sure it's cleared before card
initialization, otherwise the initialization would fail.
Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
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[modify to adapt to 4.9, pcie have member pp instead of pci]
By default, when the PCIe controller experiences an erroneous completion
from an external completer for its outbound non-posted request, it sends
an OKAY response to the device's internal AXI slave system interface.
However, this default system error response behavior cannot be used for
other types of outbound non-posted requests. For example, the outbound
memory read transaction requires an actual ERROR response, like UR
completion or completion timeout.
Fix this by forwarding the error response of the non-posted request.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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[context adjustment]
The Freescale PCIe controller advertises the MSI/MSI-X capability in both
RC and Endpoint mode, but in RC mode it doesn't support MSI/MSI-X by
itself; it can only transfer MSI/MSI-X from downstream devices.
Add a quirk to prevent use of MSI/MSI-X in RC mode.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Minghuan Lian <minghuan.Lian@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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Fix the "DMA-API: device driver maps memory from stack" warning
generated when crypto accelerators map the IV.
Note: while so far this has been only a warning and thus a theoretical
issue, on latest kernel trees ablkcipher algorithms fail when IV
is on the stack.
Both caam/jr and caam/qi2 fail in the same way, i.e. same incorrect
ciphertexts. Below is log for caam/qi2:
alg: skcipher: Test 1 failed (invalid result) on encryption for cbc-aes-caam-qi2
00000000: ff 04 80 c3 af 64 47 db 3a 5c b9 b8 91 40 04 8f
alg: skcipher: Test 1 failed (invalid result) on encryption for cbc-3des-caam-qi2
00000000: 22 11 b7 06 29 2a 88 cc 75 46 f4 14 8f d0 44 68
00000010: fe 08 88 30 8d d7 b3 01 21 ca 2d 46 0f 81 2e b6
00000020: ab 2f 38 52 79 00 42 82 5e 31 87 ac 8c 0d 19 88
00000030: 0a 27 5b 4b 6c aa f7 10 80 47 b6 81 83 58 7c 0a
00000040: 63 a5 f7 78 aa 05 11 56 9d 99 06 1d fb 98 01 28
00000050: 8a c0 86 7b 68 62 0c 66 84 b3 31 25 60 ad 13 65
00000060: 54 05 2f cd 4f 9a 1e e3 87 51 dc 11 a7 74 15 c4
00000070: 7a df 68 24 34 50 e6 5e 41 ba 98 48 ca 67 9a 6f
alg: skcipher: Test 1 failed (invalid result) on encryption for cbc-des-caam-qi2
00000000: 52 ee 01 1b 1b a9 59 c7 a6 f5 ea 74 bf 8f f2 2c
00000010: fe d4 df 4a 50 64 3f 2a
alg: skcipher: Test 1 failed (invalid result) on encryption for ctr-aes-caam-qi2
00000000: 4a 3d 28 7a e5 18 b7 84 ce 38 e2 f5 b2 86 58 0b
00000010: a1 04 9f 8f f5 a4 48 bd 0f c6 f3 af 6e d6 cb b3
00000020: 4c f1 52 30 3e bf bd d8 b2 9d 47 a0 40 42 dd 67
00000030: 70 2d 63 f3 1c 9e 96 07 75 29 1e ca db b2 35 ce
alg: skcipher: Test 1 failed (invalid result) on encryption for rfc3686-ctr-aes-caam-qi2
00000000: 26 56 7f bb 8d 68 27 e3 52 e7 0f 51 ee 4f ae 03
alg: skcipher: Test 1 failed (invalid result) on encryption for xts-aes-caam-qi2
00000000: bf 84 80 16 02 00 ec 59 b2 d7 dc 2a 50 22 23 95
00000010: a8 e1 f2 65 15 72 67 1e e3 39 86 6b 4d 27 48 87
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Add DKP support for tls using caam/qi2 as backend.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Add DKP support for tls using caam/qi as backend.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Add support for unkeyed and keyed (hmac) md5, sha algorithms.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Add DKP support for authenc algorithms using caam/qi2 as backend.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Upcoming caam/qi2 driver will support ahash algorithms,
thus move ahash descriptors generation in a shared location.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Offload split key generation in CAAM engine, using DKP.
DKP is supported starting with Era 6.
Note that the way assoclen is transmitted from the job descriptor
to the shared descriptor changes - DPOVRD register is used instead
of MATH3 (where available), since DKP protocol thrashes the MATH
registers.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Save Era in driver's private data for further usage,
like deciding whether an erratum applies or a feature is available
based on its value.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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ctx_map_to_sec4_sg() function, added in
commit 045e36780f115 ("crypto: caam - ahash hmac support")
has never used the "desc" parameter, so let's drop it.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit dfcd8393efefb7a111f9cb6af69058ecaf4a4d72)
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