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2016-06-28ARM: imx: remove cpu_is_mx*()Arnd Bergmann
The mxc_cpu_type and cpu_is_mx() logic is largely unused, and the few remaining users were easy to convert into simpler code. Now that they are gone, we can remove all those macros as well. The related cpu_is_imx6*() set of function unfortunately is harder to remove, so those are staying around for now. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-02-02ARM: imx: use endian-safe readl/readw/writel/writewJohannes Berg
Instead of __raw_*, define imx_* to *_relaxed and use those. Using imx_* was requested by Arnd because *_relaxed tends to indicate that the code was carefully reviewed to not require any synchronisation and otherwise be safe, which isn't the case here with the automatic conversion. The conversion itself was done using the following spatch (since that automatically adjusts the coding style unlike a simple search&replace). @@ expression E1, E2; @@ -__raw_writel(E1, E2) +imx_writel(E1, E2) @@ expression E1, E2; @@ -__raw_writew(E1, E2) +imx_writew(E1, E2) @@ expression E1; @@ -__raw_readl(E1) +imx_readl(E1) @@ expression E1; @@ -__raw_readw(E1) +imx_readw(E1) Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-07-14ARM: imx: add i.mx6ul msl supportFrank Li
i.MX6UL is a new SOC, add MSL support Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-06-03ARM: imx: add msl support for imx7dAnson Huang
Add i.MX7D MSL support. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-06-03ARM: imx: move revision definitions and declarations into a headerShawn Guo
The revision definitions and declarations are widely used by clock drivers. As a step of moving clock drivers out of arch/arm/mach-imx, let's create header include/soc/imx/revision.h to accommodate them. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-11-23ARM: imx: replace cpu type check with ddr type checkAnson Huang
As the DDR/IO and MMDC setting are different on LPDDR2 and DDR3, we used cpu type to decide how to do these settings in suspend before which is NOT flexible, take i.MX6SL for example, although it has LPDDR2 on EVK board, but users can also use DDR3 on other boards, so it is better to read the DDR type from MMDC then decide how to do related settings. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-16ARM: i.MX6: add more chip revision supportJason Liu
Add more revision support for the new i.MX6DQ tape-out (TO1.5). This TO1.5 is the Rev 1.3 as documented in i.MX6DQ data sheet, because TO1.3 and TO1.4 are never revealed. Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-07-18ARM: imx: build cpu_is_imx6sl function conditionallyArnd Bergmann
imx6q_pm_enter calls imx6sl_set_wait_clk when run on an imx6sl based machine. However if support for imx6sl is not enabled at compile time, this prevents us from building the kernel and we get this link error instead: arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter': :(.text+0x4b84): undefined reference to `imx6sl_set_wait_clk' This makes the cpu_is_imx6sl function conditionally return false if imx6sl is disabled at compile-time, which matches what the older cpu_is_mx* macros did. We have similar inline functions for the other imx6 variants, but so far I have not run into a case where the extra #ifdef is necessary. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: imx: add basic imx6sx SoC supportShawn Guo
Add basic suppport for i.MX6 SoloX SoC. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2013-10-21ARM: imx: enable suspend for imx6slShawn Guo
The imx6sl low power mode implementation inherits imx6q/dl one, and pm-imx6q.c can just work for imx6sl with some minor updates. Let's enable imx6sl suspend support by reusing pm-imx6q.c and use cpu_is_imxXX() to handle the those minor differences between imx6sl and imx6q/dl. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx6: report soc info via soc deviceShawn Guo
The patch enables soc bus infrastructure and adds a function imx_soc_device_init() to report soc info via soc device interface for imx6qdl and imx6sl. With the support, user space can get soc related info by looking at sysfs like below. $ cat /sys/devices/soc0/machine Freescale i.MX6 Quad SABRE Smart Device Board $ cat /sys/devices/soc0/family Freescale i.MX $ cat /sys/devices/soc0/soc_id i.MX6Q $ cat /sys/devices/soc0/revision 1.2 Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12ARM: imx: add initial imx6dl supportShawn Guo
The i.MX6 DualLite/Solo is another i.MX6 family SoC, which is highly compatible with i.MX6 Quad/Dual. And that's why we choose to support it using imx6q code with cpu_is_imx6dl() check when necessary. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-01-29ARM: imx: Remove mx508 supportFabio Estevam
Only mx508 based board is mach-mx50_rdp and it has been marked as BROKEN for several releases. mx508 currently lacks clock support. In case someone needs to add mx508 support back, then the recommended approach is to use device tree. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-10-15ARM: imx: include hardware.h rather than mach/hardware.hShawn Guo
It moves a bunch of header files included in hardware.h and itself from mach-imx/include/mach to mach-imx, and updates users to include hardware.h rather than mach/hardware.h. The files in mach-imx/devices will need to include "../hardware.h". Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Arnd Bergmann <arnd@arndb.de>