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path: root/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
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2017-09-25arm64: dts: ls1088a: Add flash node for ls1088a qds and rdbPrabhakar Kushwaha
LS1088AQDS consist of NOR, NAND and FPGA connected over IFC LS1088ARDB consist of NAND and FPGA connected over IFC. So add flash information in ifc node of device tree. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2017-09-25arm64: dts: ls1088a: Add USB supportyinbo.zhu
Fix the issue that usb is not detected on ls1088ardb Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com> Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2017-07-14arm64: dts: ls1088a: add esdhc nodeYangbo Lu
Add esdhc node for ls1088a and enable it on both RDB and QDS boards. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-07-14arm64: dts: fsl/ls1088,ls208x: Add mdio and phy nodesBogdan Purcareata
Add mdio and phy nodes for the following FSL platforms: - LS1088A RDB - LS2080A QDS & RDB - LS2088A QDS, RDB & simu Contains contributions from patches by the following authors: Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-07-14arm64: dts: ls1088a: Add QSPI node for QDS, RDBAlison Wang
This is temporary patch, will rewrite for open source Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
2017-07-14arm64: dts: Add support for FSL's LS1088A SoCHarninder Rai
LS1088A contains eight ARM v8 CortexA53 processor cores with 32 KB L1-D cache and 32 KB L1-I cache Features summary Eight 32-bit / 64-bit ARM v8 Cortex-A53 CPUs - Arranged as two clusters of four cores sharing a 1 MB L2 cache - Speed Up to 1.5 GHz - Support for cluster power-gating. Cache coherent interconnect (CCI-400) - Hardware-managed data coherency - Up to 700 MHz One 64-bit DDR4 SDRAM memory controller with ECC Data path acceleration architecture 2.0 (DPAA2) Three PCIe 3.0 controllers One serial ATA (SATA 3.0) controller Three high-speed USB 3.0 controllers with integrated PHY Following levels of DTSI/DTS files have been created for the LS1088A SoC family: - fsl-ls1088a.dtsi: DTS-Include file for NXP LS1088A SoC. - fsl-ls1088a-qds.dts: DTS file for NXP LS1088A QDS board. - fsl-ls1088a-rdb.dts: DTS file for NXP LS1088A RDB board Signed-off-by: Harninder Rai <harninder.rai@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>` Signed-off-by: Shawn Guo <shawnguo@kernel.org>