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2016-02-26arm64: dts: apm: Update GPIO to control power-off on X-Gene v2 platformsDuc Dang
This patch updates gpio-keys node that supports power-off for X-Gene v2 Merlin board to adapt with new changes in xgene-gpio-sb driver (to support configuring some GPIO pins as interrupt pins). Signed-off-by: Quan Nguyen <qnguyen@apm.com> Signed-off-by: Duc Dang <dhdang@apm.com>
2016-02-26arm64: dts: apm: Update GPIO standby controller DT node for X-Gene v2 platformsDuc Dang
xgene-gpio-sb driver now supports configuring some GPIO pins as interrupt pins. This patch adds the required fields for GPIO standby controller DT node of X-Gene v2 platform to work with this new driver change. Signed-off-by: Quan Nguyen <qnguyen@apm.com> Signed-off-by: Duc Dang <dhdang@apm.com>
2016-02-26arm64: dts: apm: Update GPIO to control power-off on X-Gene v1 platformsDuc Dang
This patch updates gpio-keys node that supports power-off for X-Gene v1 Mustang board to adapt with new changes in xgene-gpio-sb driver (to support configuring some GPIO pins as interrupt pins). Signed-off-by: Duc Dang <dhdang@apm.com>
2016-02-25arm64: dts: salvator-x: enable USB 2.0 Host of channel 1 and 2Yoshihiro Shimoda
We should set SW15 to pin 2-3 side on the board before we use CN9 as USB host or peripheral. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-25arm64: dts: salvator-x: enable usb2_phy of channel 1 and 2Yoshihiro Shimoda
This board has a MAX3355 chip. However, we cannot use the extcon/max3355 driver because the ID pin doesn't connect to a gpio pin (in other words, it connects to the SoC specific pin). And, the phy-rcar-gen3-usb2 driver cannot handle such a chip for now. So, this patch enables usb2_phy of channel 1 and 2. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-25arm64: dts: r8a7795: add USB2.0 Host (EHCI/OHCI) device nodesYoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-25arm64: dts: r8a7795: add usb2_phy device nodesYoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-25arm64: dts: r8a7795: use fallback etheravb compatibility stringSimon Horman
Use recently added fallback compatibility string in r8a7795 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-25arm64: dts: r8a7795: salvator-x: enable SDHI0 & 3Ai Kyuse
Add the exposed SD card slots. The on-board eMMC needs to wait until we fixed the 8bit support. Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-25arm64: dts: r8a7795: Add SDHI support to dtsiAi Kyuse
Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [wsa: squashed some fixes and added mmc-caps] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-25arm64: dts: qcom: fix usb digital voltage levelsSrinivas Kandagatla
This patch updates the digital voltage levels from corner values to microvolts as we are going to use s1 regulator directly for vddcx instead of s1_corner. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2016-02-25arm64: dts: qcom: apq8016-sbc: enable lpass on DB410cSrinivas Kandagatla
This patch enables the lpass on DB410C. LPASS is used as cpu dai for both analog and digital audio. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2016-02-25arm64: dts: qcom: add lpass nodeSrinivas Kandagatla
This patch adds lpass node to the SOC. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2016-02-25arm64: dts: qcom: add audio pinctrlsSrinivas Kandagatla
This patch adds pinctrls required for digital and analog audio via lpass. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2016-02-25arm64: dts: qcom: apq8016-sbc: add usb supportSrinivas Kandagatla
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2016-02-25arm64: dts: qcom: add manual pullup setting to otg.Srinivas Kandagatla
This patch adds manual pull up setting for usb otg indicating that the vbus is vbus is not routed to USB controller/phy therefore enables pull-up explicitly before starting controller. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2016-02-25arm64: dts: apm: Update X-Gene standby GPIO controller DTS entriesQuan Nguyen
Update APM X-Gene standby GPIO controller DTS entries to enable it as interrupt controller. [dhdang: update patch subject] Signed-off-by: Y Vo <yvo@apm.com> Signed-off-by: Quan Nguyen <qnguyen@apm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Duc Dang <dhdang@apm.com>
2016-02-25arm64: dts: apm: Update Merlin DT PCP PLL clock node for v2 hardwareLoc Ho
Update Merlin DT PCP PLL clock node to reflect compatible string change to reflect v2 hardware. [dhdang: change patch subject] Signed-off-by: Loc Ho <lho@apm.com> Signed-off-by: Duc Dang <dhdang@apm.com>
2016-02-25dts: mt8173: Add iommu/smi nodes for mt8173Yong Wu
This patch add the iommu/larbs nodes for mt8173 Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25arm64: dts: hip05: Append power button node for D02 boardKefeng Wang
This patch adds poweroff button device node to support poweroff feature on hip05 d02 board. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-02-25arm64: dts: hip05: Append gpio nodesKefeng Wang
There are two dw GPIO controllers in hip05 peri sub, this patch adds the corresponding device tree nodes. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-02-25arm64: dts: hip05: Append all gicv3 ITS entriesKefeng Wang
There are four subsystems in hip05 soc, peri/m3/pcie/dsa, each subsystem has one its, append them under gicv3 node. They will be used by hisilicon mbigen. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-02-25arm64: dts: hip05: Use Cortex specific device node for pmuKefeng Wang
Instead of using the generic armv8-pmuv3 compatibility, use the more specific Cortex A57 compatibility. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-02-25arm64: dts: hip05: Add L2 cache topologyKefeng Wang
The Hip05 SoC has four L2 cache for all 16 CPUs, every four cpus share one L2 cache, add them to the dtsi file so that the cache hierarchy can be probed. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-02-25ARM64: zynqmp: Extract clock information from EP108Michal Simek
Extract clocks and put it specific file to help with platform autogeneration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-02-25ARM64: zynqmp: Keep gpio node alphabetically sortedMichal Simek
No functional change. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-02-25Merge tag 'mvebu-dt64-4.6-1' of git://git.infradead.org/linux-mvebu into ↵Olof Johansson
next/dt64 mvebu dt64 for 4.6 (part 1) Device tree part of the Armada 3700 support: - binding for the Armada 3700 SoCs - device tree files for the SoCs and a board - tidy up the Marvell related files * tag 'mvebu-dt64-4.6-1' of git://git.infradead.org/linux-mvebu: arm64: dts: add the Marvell Armada 3700 family and a development board devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC family Documentation: dt: Tidy up the Marvell related files Documentation: dt-bindings: Add a new compatible for the Armada 3700 Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-25dts/ls2080a: Update PCIe compatibleMinghuan Lian
The patch adds LS2085a to PCIe compatible to fix the compatibility issue when using firmware with LS2085a compatible property. Signed-off-by: Minghuan Lian <minghuan.lian@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24arm64: dts: amd: Fix-up for ccn504 and kcs nodesSuravee Suthikulpanit
This is a fix-up patch based on the review comment from Arnd regarding: * fix ccn504 address in the node name * remove kcs interrupt-name Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24Merge tag 'v4.6-rockchip-dts64-1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64 Define the tuning-related mmc clocks and move from gpio-key,wakeup to the more generic wakeup-source property. * tag 'v4.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: replace gpio-key,wakeup with wakeup-source property arm64: dts: rockchip: add rk3368 tuning clk for emmc and sdmmc Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24Merge tag 'vexpress-for-v4.6/dt-updates' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt Few updates for ARM VExpress/Juno platforms 1. GICv3 support on Foundation models 2. Support for Juno R2 board 3. Support for ARM HDLCD on all Juno platforms * tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: Add HDLCD support on Juno platforms Documentation: drm: Add DT bindings for ARM HDLCD arm64: dts: Add support for Juno r2 board arm64: dts: move juno pcie-controller to base file arm64: dts: add .dts for GICv3 Foundation model arm64: dts: split Foundation model dts to put the GIC separately arm64: dts: Foundation model: increase GICC region to allow EOImode=1 arm64: dts: prepare foundation-v8.dts to cope with GICv3 Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24arm64: dts: qcom: msm8916: Add RPMCC DT nodeGeorgi Djakov
Add the RPM Clock Controller DT node and include the necessary header file for clocks. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24ARM64: dts: qcom: Remove size elements from pmic reg propertiesStephen Boyd
The #size-cells for the pmics are 0, but we specify a size in the reg property so that MPP and GPIO modules can figure out how many pins there are. Now that we've done that by counting irqs, we can remove the size elements in the reg properties and be DT compliant. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: msm8996: Add #power-domain-cells propertyRajendra Nayak
Add #power-domain-cells property for both the gcc and mmcc clock controller nodes as they both supports power domains (gdsc's) Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: apq8016-sbc: Add real regulators and pinctrl for sdhcSrinivas Kandagatla
This patch adds real regulators and pinctrl nodes for sdhc_1. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: apq8016-sbc: move sdhci node under soc nodeSrinivas Kandagatla
To be consistent with other nodes move sdhci node under the soc node, rather than using lable references. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: apq8016-sbc: make 1.8v available on LS expansionSrinivas Kandagatla
96boards mezzanine boards on LS expansion require 1.8v as per 96boards specifications, so enable the corresponding regulators and make them always-on. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: apq8016-sbc: add regulators supportSrinivas Kandagatla
This patch adds required regulators for apq8016-sbc aka db410c board. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: qcom: add lable for smd rpm regulatorsSrinivas Kandagatla
This patch adds label to smd rpm regulators so that the board level file can use the label directly to populate the regulators, rather than having deep nesting. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: remove s2 regulator from smd regulators.Srinivas Kandagatla
s2 is spmi controller regulator on msm8916 according to downstream 3.10 kernel, so remove it from the dt to avoid confusion an use of it. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: qcom: add correct drive strenght on cs pinsSrinivas Kandagatla
2mA drive strenght is not enough to drive chipselect low on hardware configurations with level shifters, 16mA should give good range to allow such configurations to work. This issue was noticed while testing spi on db410c with sensor board. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: qcom: remove redundant spi cs pins from pinconfSrinivas Kandagatla
This patch removes redundant pins from spi pinconf as these are already specified in pinconf_cs. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: apq8016-sbc: Add aliases to spi device.Srinivas Kandagatla
This patch adds aliases to spi device so that it can get proper bus number rather than a random number. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: Add L2 cache node to msm8916Stephen Boyd
The msm8916 SoC has an L2 cache for all 4 CPUs. Add it to the dtsi file so that the cache hierarchy can be probed. Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: Rename qcom,gcc node to clock-controllerStephen Boyd
Use the standard name for clock controller nodes instead of a qcom specific name. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-24arm64: dts: qcom: Add pm8994 gpios and MPPsStephen Boyd
Add the gpio and MPP devices to the pm8994 pmic dts. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-23arm64: dts: qcom: Add pm8994, pmi8994, pm8004 PMIC skeletonsStephen Boyd
Add the skeleton nodes for the PMICs found on msm8996-mtp devices. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-23arm64: dts: Add msm8996 SoC and MTP board supportStephen Boyd
Add initial device tree support for the Qualcomm MSM8996 SoC and MTP8996 evaluation board. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-02-23Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
Conflicts: drivers/net/phy/bcm7xxx.c drivers/net/phy/marvell.c drivers/net/vxlan.c All three conflicts were cases of simple overlapping changes. Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-22arm64: EXYNOS: Consolidate ARCH_EXYNOS7 symbol into ARCH_EXYNOSKrzysztof Kozlowski
The ARMv8 Exynos family SoCs in Linux kernel are currently: - Exynos5433 (controlled by ARCH_EXYNOS), - Exynos7 (controlled by ARCH_EXYNOS7). It duplicates Kconfig symbols unnecessarily, so consolidate them into one ARCH_EXYNOS. Future SoCs could fall also under the ARCH_EXYNOS symbol. The commit should not bring any visible functional change. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
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