Age | Commit message (Collapse) | Author |
|
Add the identify of the platform to support set the rcpm with
big-endian or little-endian.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
|
|
Add the identify of the platform to support set the rcpm with
big-endian or little-endian.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
|
|
Add the identify of the platform to support set the rcpm with
big-endian or little-endian.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
|
|
Add the identify of the platform to support set the rcpm with
big-endian or little-endian.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
|
|
This reverts commit 97303480753e48fb313dc0e15daaf11b0451cdb8.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
|
|
According to PSCI standard v0.2, for CPU_SUSPEND call, which is
used by cpu idle framework, bit[16] of state parameter must be 0.
So update bit[16] of property 'arm,psci-suspend-param', which is
used as state parameter, to 0.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
|
|
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
|
|
This patch adds iommu-map property for PCIe, which enables
SMMU for these devices on LS1088.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
|
|
This patch adds iommu-map property for PCIe, which enables
SMMU for these devices on LS208xA devices.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
|
|
Register the DMA ops for fsl-mc bus
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
|
|
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
|
|
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
|
|
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
|
|
Signed-Off-by: Guanhua Gao <guanhua.gao@nxp.com>
|
|
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
|
|
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
|
|
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
|
|
LS1012A has one USB 3.0(DWC3) controller and
one USB 2.0 controller.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
|
|
Add "dis_rxdet_inp3_quirk" bollean property to USB3 node. This property
is used to disable rx detection in P3 PHY mode
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
|
|
-As per board design, different QSPI flash is connected on
boards, hence change QSPI flash node from s25fl256s1 to s25fs512ss in
device tree.
-Enable fast-read support in QSPI node.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
|
|
Update ls2081ardb.dts for below nodes:
-As per updated board design, different QSPI flash is connected on
boards, hence change QSPI flash node from n25q512a to s25fs512ss in
device tree.
-Enable dual flash support in QSPI node.
-Add DTS node for INA220.
-Enable SATA node.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Tao Yang <b31903@freescale.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
|
|
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
|
|
Modification required for fsl,dpaa node placement.
Now the node is part of soc node.
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
|
|
Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
|
|
Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
|
|
LS1088AQDS consist of NOR, NAND and FPGA connected over IFC
LS1088ARDB consist of NAND and FPGA connected over IFC.
So add flash information in ifc node of device tree.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
|
|
This is temporary patch, will rewrite for open source
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
|
|
This patch add support for NXP LS2081ARDB board which has
LS2081A SoC.
LS2081A SoC is 40-pin derivative of LS2088A SoC
So, from functional perspective both are same.
Hence,ls2088a SoC dtsi files are included from ls2081ARDB dts
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
|
|
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
|
|
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
|
|
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
|
|
Fix the issue that usb is not detected on ls1088ardb
Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
|
|
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
|
|
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
|
|
For the patch to update struct map_info's swap field based on device
characteristics defined in device tree, CONFIG_MTD_CFI_BE_BYTE_SWAP
is not used.
This patch will remove it in lsdk.config.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
|
|
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
|
|
This patch adds SAI and eDMA support in the defconfig.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
|
|
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
|
|
This patch allows user-space to mmap PCI resources. This
patch is inline to arm32 bit implementation.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
|
|
For the patch to update struct map_info's swap field based on device
characteristics defined in device tree, big-endian parameter is added
for LS1043A/LS1046A.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
|
|
Signed-off-by: Haiying Wang <Haiying.wang@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
|
|
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
|
|
[arch part]
On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
When chip support the aer/pme interrupts with none MSI/MSI-X/INTx mode,
maybe there is interrupt line for aer pme etc. Search the interrupt
number in the fdt file. Then fixup the dev->irq with it.
Signed-off-by: Po Liu <po.liu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
|
|
Add USDPAA device trees for LS1043/LS1046 RDB boards
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
|
|
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
|
|
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
|