summaryrefslogtreecommitdiff
path: root/arch/mips/mm/sc-mips.c
AgeCommit message (Expand)Author
2014-03-26MIPS: Add cases for CPU_P5600James Hogan
2014-03-06MIPS: Add 1074K CPU support explicitly.Steven J. Hill
2014-01-22MIPS: Add support for interAptiv coresLeonid Yegoshin
2014-01-22MIPS: Add support for the proAptiv coresLeonid Yegoshin
2013-09-17MIPS: Optimize current_cpu_type() for better code.Ralf Baechle
2013-07-14MIPS: Delete __cpuinit/__CPUINIT usage from MIPS codePaul Gortmaker
2013-04-05MIPS: Fix ISA level which causes secondary cache init bypassing and moreDeng-Cheng Zhu
2012-03-28Disintegrate asm/system.h for MIPSDavid Howells
2010-12-17MIPS: Fix build errors in sc-mips.cKevin Cernekee
2010-10-29MIPS: Honor L2 bypass bitKevin Cernekee
2009-09-30MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.Kevin Cernekee
2008-03-12[MIPS] Fix loads of section missmatchesRalf Baechle
2007-10-11[MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle
2006-06-29[MIPS] MIPS32/MIPS64 S-cache fix and cleanupAtsushi Nemoto
2006-06-29[MIPS] MIPS32/MIPS64 secondary cache managementChris Dearman