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2013-08-01serial: sccnxp: Using CLK API for getting UART clockAlexander Shiyan
This patch removes "frequency" parameter from SCCNXP platform_data and uses CLK API for getting clock. If CLK ommited, default IC frequency will be used instead. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-03-02Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds
Pull MIPS updates from Ralf Baechle: o Add basic support for the Mediatek/Ralink Wireless SoC family. o The Qualcomm Atheros platform is extended by support for the new QCA955X SoC series as well as a bunch of patches that get the code ready for OF support. o Lantiq and BCM47XX platform have a few improvements and bug fixes. o MIPS has sent a few patches that get the kernel ready for the upcoming microMIPS support. o The rest of the series is made up of small bug fixes and cleanups that relate to various parts of the MIPS code. The biggy in there is a whitespace cleanup. After I was sent another set of whitespace cleanup patches I decided it was the time to clean the whitespace "issues" for once and and that touches many files below arch/mips/. Fix up silly conflicts, mostly due to whitespace cleanups. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits) MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h MIPS: remove broken conditional inside vpe loader code MIPS: SMTC: fix implicit declaration of set_vi_handler MIPS: early_printk: drop __init annotations MIPS: Probe for and report hardware virtualization support. MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board MIPS: ath79: add USB controller registration code for the QCA955X SoCs MIPS: ath79: add PCI controller registration code for the QCA955X SoCs MIPS: ath79: add WMAC registration code for the QCA955X SoCs MIPS: ath79: register UART for the QCA955X SoCs MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear} MIPS: ath79: add GPIO setup code for the QCA955X SoCs MIPS: ath79: add IRQ handling code for the QCA955X SoCs MIPS: ath79: add clock setup code for the QCA955X SoCs MIPS: ath79: add SoC detection code for the QCA955X SoCs MIPS: ath79: add early printk support for the QCA955X SoCs MIPS: ath79: fix WMAC IRQ resource assignment mips: reserve elfcorehdr mips: Make sure kernel memory is in iomem MIPS: ath79: use dynamically allocated USB platform devices ...
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-01-16serial: sccnxp: Rename header file to match functionalityAlexander Shiyan
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-10-11MIPS: SNI: Switch RM400 serial to SCCNXP driverThomas Bogendoerfer
The new SCCNXP driver supports the SC2681 chips used in RM400 machines. We now use the new driver instead of the old SC26xx driver. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4417/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-05serial: Add note about migration to driver SCCNXPAlexander Shiyan
This patch adds note about migration to driver SCCNXP in the code of driver SC26XX and in MIPS SNI board initialization with example. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2011-03-29MIPS: Convert the irq functions to the new namesThomas Gleixner
Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-25MIPS: SNI: Convert to new irq_chip functionsThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2206/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-10-07MIPS: Add missing #inclusions of <linux/irq.h>David Howells
Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should really include it. Note that this can replace #inclusions of <asm/irq.h>. This is required for the patch to sort out irqflags handling function naming to compile on MIPS. The problem is that these files require access to things like setup_irq() - which isn't available by #including <linux/interrupt.h> Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17MIPS: Fixup last users of irq_chip->typename Thomas Gleixner
The typename member of struct irq_chip was kept for migration purposes and is obsolete since more than 2 years. Fix up the leftovers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org To: LKML <linux-kernel@vger.kernel.org> Cc: Ingo Molnar <mingo@elte.hu> Patchwork: http://patchwork.linux-mips.org/patch/661/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-03-30MIPS: Enable GENERIC_HARDIRQS_NO__DO_IRQ for all platformsRalf Baechle
__do_IRQ() is deprecated and will go away. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29[MIPS] RM: Collected changesThomas Bogendoerfer
- EISA support for non PCI RMs (RM200 and RM400-xxx). The major part is the splitting of the EISA and onboard ISA of the RM200, which makes the EISA bus on the RM200 look like on other RMs. - 64bit kernel support - system type detection is now common for big and little endian - moved sniprom code to arch/mips/fw - added call_o32 function to arch/mips/fw/lib, which uses a private stack for calling prom functions - fix problem with ISA interrupts, which makes using PIT clockevent possible Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12[MIPS] RM: Use only phyiscal address for 82596 and 53c710Thomas Bogendoerfer
Use physical address for 82596 and 53c710 base address Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] SNI RM updatesThomas Bogendoerfer
- use RTC_CLASS instead of GEN_RTC - get rid of ds1216 in favour of a RTC_CLASS driver - use correct console device for older RM400 - use physical addresses for 82596 device - use 128 byte L1 cache line size (this is needed because most of the SNI caches are using 128 L2 cache lines) Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-18[MIPS] Support for several more SNI RM models.Thomas Bogendoerfer
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>