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path: root/arch/x86/pci/intel_mid_pci.c
AgeCommit message (Expand)Author
2015-03-20Revert "x86/PCI: Refine the way to release PCI IRQ resources"Rafael J. Wysocki
2015-02-10Merge tag 'pm+acpi-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds
2015-02-05x86/PCI: Refine the way to release PCI IRQ resourcesJiang Liu
2015-01-07spi: dw-pci: describe Intel MID controllers betterAndy Shevchenko
2014-12-16x86, irq: Keep balance of IOAPIC pin reference countJiang Liu
2014-08-29x86, irq, PCI: Keep IRQ assignment for runtime power managementJiang Liu
2014-08-08x86, irq, PCI: Keep IRQ assignment for PCI devices during suspend/hibernationJiang Liu
2014-06-21x86, irq, SFI: Release IOAPIC pin when PCI device is disabledJiang Liu
2014-06-21x86, irq, SFI: Use common irqdomain map interface to program IOAPIC pinsJiang Liu
2014-06-21x86, SFI, irq: Provide basic irqdomain supportJiang Liu
2014-01-15x86, intel-mid: Add Merrifield platform supportDavid Cohen
2013-10-17intel_mid: Renamed *mrst* to *intel_mid*Kuppuswamy Sathyanarayanan
2013-10-17pci: intel_mid: Return true/false in function returning boolFengguang Wu
2013-10-17intel_mid: Renamed *mrst* to *intel_mid*Kuppuswamy Sathyanarayanan