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2017-12-12arm64: defconfig: enable OP-TEEVictor Chong
This patch enables configs for Trusted Execution Environment (TEE) and OP-TEE. +CONFIG_TEE=y +CONFIG_OPTEE=y Signed-off-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-12-12irqchip/qeic: remove PPCisms for QEICZhao Qiang
[PowerPC part] QEIC was supported on PowerPC, and dependent on PPC, Now it is supported on other platforms, so remove PPCisms. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-12-12irqchip/qeic: merge qeic init code from platforms to a common functionZhao Qiang
[PowerPC part] The codes of qe_ic init from a variety of platforms are redundant, merge them to a common function and put it to irqchip/irq-qeic.c For non-p1021_mds mpc85xx_mds boards, use "qe_ic_init(np, 0, qe_ic_cascade_low_mpic, qe_ic_cascade_high_mpic);" instead of "qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);". qe_ic_cascade_muxed_mpic was used for boards has the same interrupt number for low interrupt and high interrupt, qe_ic_init has checked if "low interrupt == high interrupt" Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-12-12arm64: defconfig: enable CAAM crypto engine on QorIQ DPAA2 SoCsHoria Geantă
Enable CAAM (Cryptographic Accelerator and Assurance Module) driver for QorIQ Data Path Acceleration Architecture (DPAA) v2. It handles DPSECI (Data Path SEC Interface) DPAA2 objects that sit on the Management Complex (MC) fsl-mc bus. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12PFE: fix compile issue on arm32Zhao Qiang
add CONFIG_FSL_PPFE_UTIL_DISABLED to arm32 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-12-12arm64: dts: freescale: ls1012a: fix RGMII tx delay issueCalvin Johnson
Recently logic to enable RGMII tx delay was changed by below patch. https://patchwork.kernel.org/patch/9447581/ Based on the patch, enabling tx delay again using rgmii-txid. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-12-12arm64: dts: freescale: ls1012a: update with pppfe supportCalvin Johnson
Update ls1012a dtsi and platform dts files with support for ppfe. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-12-12staging: fsl_ppfe/eth: introduce pfe driverZhao Qiang
[config part] This patch introduces Linux support for NXP's LS1012A Packet Forwarding Engine (pfe_eth). LS1012A uses hardware packet forwarding engine to provide high performance Ethernet interfaces. The device includes two Ethernet ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-10-11arm64: dma-mapping: Only swizzle DMA ops for IOMMU_DOMAIN_DMAWill Deacon
The arm64 DMA-mapping implementation sets the DMA ops to the IOMMU DMA ops if we detect that an IOMMU is present for the master and the DMA ranges are valid. In the case when the IOMMU domain for the device is not of type IOMMU_DOMAIN_DMA, then we have no business swizzling the ops, since we're not in control of the underlying address space. This patch leaves the DMA ops alone for masters attached to non-DMA IOMMU domains. Signed-off-by: Will Deacon <will.deacon@arm.com> Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
2017-10-05arm64: dts: ls1012a: add caam-dma nodeRadu Alexe
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
2017-09-28dts: ls1012a: Add PCIe controller DT nodeHou Zhiqiang
Add PCIe controller node for ls1012a platform. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-09-28dts: ls1012a: Add MSI controller DT nodeHou Zhiqiang
Add MSI controller node for ls1012a platform. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-09-28arm64: dts: ls208xa: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28arm64: dts: ls1046a: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28arm64: dts: ls1043a: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28arm: dts: ls1021a: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28arm64: dts: ls1012a: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-28arm64: dts: ls1088a: Add the identify of the platform to support to set rcpm bitZhang Ying-22455
Add the identify of the platform to support set the rcpm with big-endian or little-endian. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-25Revert "arm64: Increase the max granular size"Camelia Groza
This reverts commit 97303480753e48fb313dc0e15daaf11b0451cdb8. Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
2017-09-25arm64: dts: update the cpu idle nodeYuantian Tang
According to PSCI standard v0.2, for CPU_SUSPEND call, which is used by cpu idle framework, bit[16] of state parameter must be 0. So update bit[16] of property 'arm,psci-suspend-param', which is used as state parameter, to 0. Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
2017-09-25arm: configs: enable CONFIG_IP_MULTICAST in lsdk.configYangbo Lu
1588 stack requires multicast communication. It's proper to enable CONFIG_IP_MULTICAST in default. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2017-09-25dts: ls1043aqds: add #address-cells = <1> and #size-cells to fpga nodeZhao Qiang
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-09-25ARM: dts: ls1021a: Add quirk for Erratum A009116Rajesh Bhagat
Add "snps,quirk-frame-length-adjustment" property to USB3 node for erratum A009116. This property provides value of GFLADJ_30MHZ for post silicon frame length adjustment. Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-09-25arm64: dts: ls1088a: Add iommu-map property for pciBharat Bhushan
This patch adds iommu-map property for PCIe, which enables SMMU for these devices on LS1088. Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
2017-09-25arm64: dts: ls208xa: Add iommu-map property for pciBharat Bhushan
This patch adds iommu-map property for PCIe, which enables SMMU for these devices on LS208xA devices. Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
2017-09-25ARM: DTS: Fix register map for virt-capable GICMarc Zyngier
Since everybody copied my own mistake from the DT binding example, let's address all the offenders in one swift go. Most of them got the CPU interface size wrong (4kB, while it should be 8kB), except for both keystone platforms which got the control interface wrong (4kB instead of 8kB). In a few cases where I knew for sure what implementation was used, I've added the "arm,gic-400" compatible string. I'm 99% sure that this is what everyone is using, but short of having the TRM for all the other SoCs, I've left them alone. Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-09-25arm: multi_v7_defconfig: enable RTC_DRV_PCF2127 and RTC_DRV_PCF85263 on ↵Zhang Ying-22455
32bit system Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-25arm:configs: Add lttng.config to support LTTng modulesShengzhou Liu
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2017-09-25arm64:configs: Add lttng.config to support LTTng modulesShengzhou Liu
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2017-09-25arm64: dma-mapping: Add support for the fsl-mc busNipun Gupta
Register the DMA ops for fsl-mc bus Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2017-09-25arm64: defconfig: enable CONFIG_RTC_DRV_PCF85263Zhang Ying-22455
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-25arm64: dts: ls1043a: add pcf85263 rtc nodesZhang Ying-22455
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-09-25dts: ls1046aqds: include fsl-ls1046a-qds.dts instead of fsl-ls1046a-rdb.dtsZhao Qiang
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-09-25Add dspi node for fsl-ls1046a-qds-sdk dtsGao Guanhua
Signed-Off-by: Guanhua Gao <guanhua.gao@nxp.com>
2017-09-25dts: ls1046aqds: add "simple-bus" and ranges to fpgaZhao Qiang
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-09-25arm64: dts: ls1012a: add cpu idle supportYuantian Tang
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
2017-09-25arm64: dts: ls1043a: add cpu idle supportYuantian Tang
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
2017-09-25arm64: dts: ls1012a: add USB host controller nodesRan Wang
LS1012A has one USB 3.0(DWC3) controller and one USB 2.0 controller. Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2017-09-25arm64: dts: ls1046a: Add dis_rxdet_inp3_quirk property to USB3 nodeRan Wang
Add "dis_rxdet_inp3_quirk" bollean property to USB3 node. This property is used to disable rx detection in P3 PHY mode Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2017-09-25arm64: dts: ls2088ardb: Update nodes for QSPISantan Kumar
-As per board design, different QSPI flash is connected on boards, hence change QSPI flash node from s25fl256s1 to s25fs512ss in device tree. -Enable fast-read support in QSPI node. Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
2017-09-25arm64: dts: ls2081ardb: Update nodes for QSPI, SATA, INA220Santan Kumar
Update ls2081ardb.dts for below nodes: -As per updated board design, different QSPI flash is connected on boards, hence change QSPI flash node from n25q512a to s25fs512ss in device tree. -Enable dual flash support in QSPI node. -Add DTS node for INA220. -Enable SATA node. Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Tao Yang <b31903@freescale.com> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
2017-09-25arm64: dts: ls1088: Add Reboot node in dtsiAshish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-09-25arm64:dts: Add LS1043/46 USDPAA dts files in MakefileAkhil Goyal
Modification required for fsl,dpaa node placement. Now the node is part of soc node. Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2017-09-25arm64: dts: add OH ports on LS1043/46Iordache Florinel-R70177
Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com> Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
2017-09-25arm64: dts: ls1021/ls1043/ls1046: add qdma nodesjiaheng.fan
Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
2017-09-25arm64: dts: ls1088a: Add flash node for ls1088a qds and rdbPrabhakar Kushwaha
LS1088AQDS consist of NOR, NAND and FPGA connected over IFC LS1088ARDB consist of NAND and FPGA connected over IFC. So add flash information in ifc node of device tree. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2017-09-25arm64: dts: ls208xa: Add QSPI Flash node for RDBSuresh Gupta
This is temporary patch, will rewrite for open source Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
2017-09-25arm64: dts: ls2081ardb: Add DTS support for NXP LS2081ARDBPriyanka Jain
This patch add support for NXP LS2081ARDB board which has LS2081A SoC. LS2081A SoC is 40-pin derivative of LS2088A SoC So, from functional perspective both are same. Hence,ls2088a SoC dtsi files are included from ls2081ARDB dts Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2017-09-25arm64: dts: add iommu-map property in fsl-mc nodeNipun Gupta
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2017-09-25arm64: dts: ls2088a: add cpu idle supportYuantian Tang
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
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