Age | Commit message (Collapse) | Author |
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Signed-Off-by: Guanhua Gao <guanhua.gao@nxp.com>
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Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
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Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
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LS1012A has one USB 3.0(DWC3) controller and
one USB 2.0 controller.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
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Add "dis_rxdet_inp3_quirk" bollean property to USB3 node. This property
is used to disable rx detection in P3 PHY mode
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
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-As per board design, different QSPI flash is connected on
boards, hence change QSPI flash node from s25fl256s1 to s25fs512ss in
device tree.
-Enable fast-read support in QSPI node.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
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Update ls2081ardb.dts for below nodes:
-As per updated board design, different QSPI flash is connected on
boards, hence change QSPI flash node from n25q512a to s25fs512ss in
device tree.
-Enable dual flash support in QSPI node.
-Add DTS node for INA220.
-Enable SATA node.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Tao Yang <b31903@freescale.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
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Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
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Modification required for fsl,dpaa node placement.
Now the node is part of soc node.
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
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Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
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Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
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LS1088AQDS consist of NOR, NAND and FPGA connected over IFC
LS1088ARDB consist of NAND and FPGA connected over IFC.
So add flash information in ifc node of device tree.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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This is temporary patch, will rewrite for open source
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
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This patch add support for NXP LS2081ARDB board which has
LS2081A SoC.
LS2081A SoC is 40-pin derivative of LS2088A SoC
So, from functional perspective both are same.
Hence,ls2088a SoC dtsi files are included from ls2081ARDB dts
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
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Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
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Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
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qoriq clock driver has been updated to parse the clock configuration
information defined in driver itself not in dts.
Since the new implementation and the bindings have been merged,
it is time to update the clock related node and remove redundent clock
configuration information from the dts.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
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Fix the issue that usb is not detected on ls1088ardb
Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
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Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
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Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
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Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
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For the patch to update struct map_info's swap field based on device
characteristics defined in device tree, CONFIG_MTD_CFI_BE_BYTE_SWAP
is not used.
This patch will remove it in multi_v7_defconfig.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
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For the patch to update struct map_info's swap field based on device
characteristics defined in device tree, CONFIG_MTD_CFI_BE_BYTE_SWAP
is not used.
This patch will remove it in lsdk.config.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
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Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
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Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
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Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
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Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
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Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
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enable CONFIG_FSL_SDK_DPA instead of CONFIG_HAS_FSL_QBMAN
for 32b os on arm64
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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This patch adds SAI and eDMA support in the defconfig.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
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Signed-off-by: Jianhua Xie <jianhua.xie@nxp.com>
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Signed-off-by: Pan Jiafei <Jiafei.Pan@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
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Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
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This patch allows user-space to mmap PCI resources. This
patch is inline to arm32 bit implementation.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
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Signed-off-by: yinbo zhu <yinbo.zhu@nxp.com>
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For the patch to update struct map_info's swap field based on device
characteristics defined in device tree, big-endian parameter is added
for LS1021A.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
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For the patch to update struct map_info's swap field based on device
characteristics defined in device tree, big-endian parameter is added
for LS1043A/LS1046A.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
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Signed-off-by: Haiying Wang <Haiying.wang@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
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Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
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Add below functions for ARM platform which are used by ehci fsl driver:
1. spin_event_timeout function
2. set/clear bits functions
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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[arch part]
On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
When chip support the aer/pme interrupts with none MSI/MSI-X/INTx mode,
maybe there is interrupt line for aer pme etc. Search the interrupt
number in the fdt file. Then fixup the dev->irq with it.
Signed-off-by: Po Liu <po.liu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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Add USDPAA device trees for LS1043/LS1046 RDB boards
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
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Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
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Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
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Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
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