summaryrefslogtreecommitdiff
path: root/drivers/clk/bcm/clk-bcm2835.c
AgeCommit message (Expand)Author
2016-04-20clk: bcm2835: Fix PLL poweronEric Anholt
2016-04-20clk: bcm2835: Fix compiler warnings on 64-bit buildsEric Anholt
2016-03-17clk: bcm2835: add missing osc and per clocksMartin Sperl
2016-03-17clk: bcm2835: add missing PLL clock dividersMartin Sperl
2016-03-17clk: bcm2835: enable management of PCM clockMartin Sperl
2016-03-17clk: bcm2835: reorganize bcm2835_clock_array assignmentMartin Sperl
2016-03-17clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driverMartin Sperl
2016-03-17clk: bcm2835: expose raw clock-registers via debugfsMartin Sperl
2016-03-17clk: bcm2835: clean up coding style issuesMartin Sperl
2016-03-17clk: bcm2835: correctly enable fractional clock supportMartin Sperl
2016-03-17clk: bcm2835: divider value has to be 1 or moreMartin Sperl
2016-03-17clk: bcm2835: add locking to pll*_on/off methodsMartin Sperl
2016-03-17clk: bcm2835: pll_off should only update CM_PLL_ANARSTMartin Sperl
2016-03-03clk: bcm: Remove CLK_IS_ROOTStephen Boyd
2016-02-26clk: bcm2835: added missing clock register definitionsMartin Sperl
2016-02-16clk: bcm2835: Reuse CLK_DIVIDER_MAX_AT_ZERO for recalc_rate()Eric Anholt
2016-02-16clk: bcm2835: Fix setting of PLL divider clock ratesEric Anholt
2015-12-25clk: bcm2835: Add PWM clock supportRemi Pommarel
2015-12-25clk: bcm2835: Support for clock parent selectionRemi Pommarel
2015-12-25clk: bcm2835: add a round up ability to the clock divisorRemi Pommarel
2015-10-12clk: bcm2835: Add support for programming the audio domain clocksEric Anholt
2015-10-02clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.Eric Anholt