Age | Commit message (Expand) | Author |
---|---|---|
2013-04-08 | clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3} | Tushar Behera |
2013-04-04 | clk: exynos5250: register display block gate clocks to common clock framework | Leela Krishna Amudala |
2013-04-04 | clk: exynos4: Add support for SoC-specific register save list | Tomasz Figa |
2013-03-25 | clk: exynos5250: register clocks using common clock framework | Thomas Abraham |