linux - NXP/Freescale LSDK linux tree with Scalys patches

Age	Commit message (Expand)	Author
2014-01-14	Merge branch 'clk-next-shmobile' into clk-next	Mike Turquette
2014-01-14	clk: shmobile: Fix MSTP clock array initialization	Valentine Barshak
2014-01-14	clk: shmobile: Fix MSTP clock index	Valentine Barshak
2014-01-09	Merge tag 'for_3.14/samsung-clk' of git://git.kernel.org/pub/scm/linux/kernel...	Mike Turquette
2014-01-08	clk: max77686: Register OF clock provider	Tomasz Figa
2014-01-08	clk: max77686: Refactor driver data handling	Tomasz Figa
2014-01-08	clk: max77686: Fix clean-up in error and remove paths	Tomasz Figa
2014-01-08	clk: max77686: Make max77686_clk_register() return struct clk *	Tomasz Figa
2014-01-08	clk: max77686: Refactor successful exit of probe function	Tomasz Figa
2014-01-08	clk: max77686: Provide .recalc_rate() operation	Tomasz Figa
2014-01-08	clk: max77686: Correct callback used for checking clock status	Tomasz Figa
2014-01-08	clk: exynos-audss: add support for Exynos 5420	Andrew Bresticker
2014-01-08	clk: exynos5250: add clock ID for div_pcm0	Andrew Bresticker
2014-01-08	clk: exynos-audss: allow input clocks to be specified in device tree	Andrew Bresticker
2014-01-08	clk: exynos-audss: convert to platform device	Andrew Bresticker
2014-01-08	clk: exynos5440: replace clock ID private enums with IDs from DT header	Andrzej Hajda
2014-01-08	clk: exynos5420: replace clock ID private enums with IDs from DT header	Andrzej Hajda
2014-01-08	clk: exynos5250: replace clock ID private enums with IDs from DT header	Andrzej Hajda
2014-01-08	clk: exynos4: replace clock ID private enums with IDs from DT header	Andrzej Hajda
2014-01-08	clk: exynos5250: register APLL rate table	Andrew Bresticker
2013-12-31	Merge branch 'clk-next-unregister' into clk-next	Mike Turquette
2013-12-30	Merge branch 'for_3.14/keystone-clk' of git://git.kernel.org/pub/scm/linux/ke...	Mike Turquette
2013-12-30	clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apll	Sachin Kamat
2013-12-30	clk: samsung: exynos5250: Fix parents of gate clocks from MFC domain	Tomasz Figa
2013-12-30	clk: samsung: exynos5250: Correct parent list of audio muxes	Tomasz Figa
2013-12-30	clk: samsung: exynos5250: Add missing unpopulated mux parents	Tomasz Figa
2013-12-30	clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domain	Tomasz Figa
2013-12-30	clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domain	Tomasz Figa
2013-12-30	clk: samsung: exynos5250: Make names of mux and div clocks consistent	Tomasz Figa
2013-12-30	clk: samsung: exynos5250: Sort definitions by registers and bitfield	Tomasz Figa
2013-12-30	Merge branch 'samsung-fixes' into samsung-next-base	Tomasz Figa
2013-12-30	clk: exynos: File scope reg_save array should depend on PM_SLEEP	Krzysztof Kozlowski
2013-12-30	clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clock	Abhilash Kesavan
2013-12-30	clk: samsung: exynos5250: Add MDMA0 clocks	Abhilash Kesavan
2013-12-30	clk: samsung: exynos5250: Fix ACP gate register offset	Abhilash Kesavan
2013-12-30	clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks	Andrew Bresticker
2013-12-30	clk: samsung: exynos4: Correct SRC_MFC register	Seung-Woo Kim
2013-12-29	Merge tag 'sunxi-clk-3.14-for-mike' of https://bitbucket.org/emiliolopez/linu...	Mike Turquette
2013-12-28	clk: sunxi: Allwinner A20 output clock support	Chen-Yu Tsai
2013-12-28	clk: sunxi: support better factor DT nodes	Emilio López
2013-12-28	clk: sunxi: mod0 support	Emilio López
2013-12-28	clk: sunxi: add PLL5 and PLL6 support	Emilio López
2013-12-28	clk: sunxi: make factors_clk_setup return the clock it registers	Emilio López
2013-12-28	clk: sunxi: add gating support to PLL1	Emilio López
2013-12-28	clk: sunxi: clean the magic number of mux parents	Emilio López
2013-12-28	clk: sunxi: register factors clocks behind composite	Emilio López
2013-12-28	clk: remove CONFIG_COMMON_CLK_DEBUG	Mike Turquette
2013-12-26	clk: max77686: Remove redundant break	Sachin Kamat
2013-12-23	clk: add accuracy support for fixed clock	Boris BREZILLON
2013-12-23	clk: add clk accuracy retrieval support	Boris BREZILLON