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path: root/drivers/gpu/drm/nouveau/nouveau_object.c
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2012-07-26drm/nouveau: move current gpuobj code out of nouveau_object.cBen Skeggs
I want this file for the new interfaces... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nouveau: turn a BUG into a WARNBen Skeggs
This is very annoying sometimes.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nouveau/ttm: untangle code to support accelerated buffer movesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nouveau/fifo: turn all fifo modules into engine modulesBen Skeggs
Been tested on each major revision that's relevant here, but I'm sure there are still bugs waiting to be ironed out. This is a *very* invasive change. There's a couple of pieces left that I don't like much (eg. other engines using fifo_priv for the channel count), but that's an artefact of there being a master channel list still. This is changing, slowly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nouveau: move flip-related channel setup to software engineBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nouveau: create real execution engine for software object classBen Skeggs
Just a cleanup more or less, and to remove the need for special handling of software objects. This removes a heap of documentation on dma/graph object formats. The info is very out of date with our current understanding, and is far better documented in rnndb in envytools git. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nvd0/disp: add support for page flippingBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-11-30drm/nouveau: Keep RAMIN heap within the channel.Younes Manton
The entire RAMIN is allocated to be 'size', but the heap is specified as 'base' + 'size' inside RAMIN, so it will overflow past RAMIN by 'base' bytes on NV50+ and clobber other allocatons unless it's size is adjusted. Signed-off-by: Younes Manton <younes.m@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvd0: lets not attempt to dereference a nv50_display pointerBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau: fixup init/fini sequence to deal with no CRTCsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvd0: add a card_type for 0xdX chipsetsBen Skeggs
These are different enough from 0xcX to justify it, half fermi, half kepler(??).. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: fix off-by-oneBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: fix null pointer deref on pre-nv50 chipsetsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0: enable per-client address spacesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0: explicitly map PDISP semaphore buffer into each channel's vmBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: convert bo.mem.start usage to bo.offsetBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: will need to specify channel for vm-ful gpuobj allocationsBen Skeggs
Abuses existing gpuobj_new() chan argument for this, which in turn forces all NVOBJ_FLAG_VM allocations to be done from the global heap, not suballocated from the channel's private heap. Not a problem though in practise. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: modify gpuobj/ntfy takedown orderingBen Skeggs
gpuobj really needs splitting into channel/gpuobj code instead... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nv50-nvc0/chan: inherit vm from fpriv, rather than chan_vm directlyBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: store a per-client channel listBen Skeggs
Removes the need to disable IRQs to lookup channel struct on every pushbuf ioctl, among others. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: remove remnants of nouveau_pgraph_engineBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nv50/gr: move to exec engine interfacesBen Skeggs
This needs a massive cleanup, but to catch bugs from the interface changes vs the engine code cleanup, this will be done later. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: working towards a common way to represent enginesBen Skeggs
There's lots of more-or-less independant engines present on NVIDIA GPUs these days, and we generally want to perform the same operations on them. Implementing new ones requires hooking into lots of different places, the aim of this work is to make this simpler and cleaner. NV84:NV98 PCRYPT moved over as a test. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: move engine object creation into per-engine hooksBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-04-19drm/nouveau: split ramin_lock into two locks, one hardirq safeBen Skeggs
Fixes a possible lock ordering reversal between context_switch_lock and ramin_lock. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2011-02-24drm/nv50-nvc0: initialise display sync channelsBen Skeggs
Also imports a couple of helper functions that'll be used to implement page flipping in the following commits.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-24drm/nouveau: introduce new gart type, and name _SGDMA more appropriatelyBen Skeggs
In preparation for the addition of a new nv40 backend, we'll need to be able to distinguish between a paged dma object and the on-chip GART. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-23drm/nouveau: don't munge in drm_mm internalsDaniel Vetter
Nouveau was checking drm_mm internals on teardown to see whether the memory manager was initialized. Hide these internals in a small inline helper function. Acked-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-07drm/nouveau: create grctx on the fly on all chipsetsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-21drm/nvc0: implement channel structure initialisationBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-21drm/nvc0: gpuobj_new need only check validity and init the relevant engineBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nv04-nv40: Fix up PCI(E) GART DMA object bus address calculation.Francisco Jerez
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nv50: tidy up PCIEGART implementationBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nv50: implement global channel address space on new VM codeBen Skeggs
As of this commit, it's guaranteed that if an object is in VRAM that its GPU virtual address will be constant. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nv50: import new vm codeBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nouveau: no need to zero dma objects, we fill them completely anywayBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nouveau: implicitly insert non-DMA objects into RAMHTBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nouveau: Synchronize with the user channel before GPU object destruction.Francisco Jerez
There have been reports of PFIFO cache errors during context take down (fdo bug 31637). They are caused by some GPU objects being taken out while the channel is still potentially processing commands. Make sure that all the previous rendering has landed before releasing a GPU object. Reported-by: Grzesiek Sójka <pld@pfu.pl> Reported-by: Patrice Mandin <patmandin@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Acked-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nv04-nv40: Give "gpuobj->cinst" the same meaning as on nv50.Francisco Jerez
No functional changes, just simplify some code paths a bit. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: tidy up and extend dma object creation interfacesBen Skeggs
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: rework gpu-specific instmem interfacesBen Skeggs
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: simplify gpuobj suspend/resumeBen Skeggs
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: tidy+move PGRAPH ISRs to their respective *_graph.c filesBen Skeggs
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: create graph and crypt contexts on demandBen Skeggs
This really needs cleaning up somehow, and probably investigate what's needed to do this on earlier generations. NVIDIA do something similar there too. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv84: add support for the PCRYPT engineBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: only expose the object classes that are supported by the chipsetBen Skeggs
We previously added all the available classes for the entire generation, even though the objects wouldn't work on the hardware. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: use object class structs more extensivelyBen Skeggs
The structs themselves, as well as the non-sw object creation function are probably very misnamed now. That's a problem for later :) Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: store engine type in gpuobj class structsBen Skeggs
We will eventually want to address hw engines other than PGRAPH. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: pass gpuobj alignment request down into backing allocatorBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: return error from nouveau_ramht_remove() if not foundBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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