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2016-04-11Merge tag 'mmc-v4.6-rc1' of git://git.linaro.org/people/ulf.hansson/mmcLinus Torvalds
Pull MMC fixes from Ulf Hansson: "Here are a couple of mmc fixes intended for v4.6 rc3: MMC host: - sdhci: Fix regression setting power on Trats2 board - sdhci-pci: Add support and PCI IDs for more Broxton host controllers" * tag 'mmc-v4.6-rc1' of git://git.linaro.org/people/ulf.hansson/mmc: mmc: sdhci-pci: Add support and PCI IDs for more Broxton host controllers mmc: sdhci: Fix regression setting power on Trats2 board
2016-04-05mmc: sdhci-pci: Add support and PCI IDs for more Broxton host controllersAdrian Hunter
Add support and PCI IDs for more Broxton host controllers Other BXT IDs were added in v4.4 so cc'ing stable. This patch is dependent on commit 163cbe31e516 ("mmc: sdhci-pci: Fix card detect race for Intel BXT/APL") but that is already in stable since v4.4.4. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v4.4+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-04-04mm, fs: get rid of PAGE_CACHE_* and page_cache_{get,release} macrosKirill A. Shutemov
PAGE_CACHE_{SIZE,SHIFT,MASK,ALIGN} macros were introduced *long* time ago with promise that one day it will be possible to implement page cache with bigger chunks than PAGE_SIZE. This promise never materialized. And unlikely will. We have many places where PAGE_CACHE_SIZE assumed to be equal to PAGE_SIZE. And it's constant source of confusion on whether PAGE_CACHE_* or PAGE_* constant should be used in a particular case, especially on the border between fs and mm. Global switching to PAGE_CACHE_SIZE != PAGE_SIZE would cause to much breakage to be doable. Let's stop pretending that pages in page cache are special. They are not. The changes are pretty straight-forward: - <foo> << (PAGE_CACHE_SHIFT - PAGE_SHIFT) -> <foo>; - <foo> >> (PAGE_CACHE_SHIFT - PAGE_SHIFT) -> <foo>; - PAGE_CACHE_{SIZE,SHIFT,MASK,ALIGN} -> PAGE_{SIZE,SHIFT,MASK,ALIGN}; - page_cache_get() -> get_page(); - page_cache_release() -> put_page(); This patch contains automated changes generated with coccinelle using script below. For some reason, coccinelle doesn't patch header files. I've called spatch for them manually. The only adjustment after coccinelle is revert of changes to PAGE_CAHCE_ALIGN definition: we are going to drop it later. There are few places in the code where coccinelle didn't reach. I'll fix them manually in a separate patch. Comments and documentation also will be addressed with the separate patch. virtual patch @@ expression E; @@ - E << (PAGE_CACHE_SHIFT - PAGE_SHIFT) + E @@ expression E; @@ - E >> (PAGE_CACHE_SHIFT - PAGE_SHIFT) + E @@ @@ - PAGE_CACHE_SHIFT + PAGE_SHIFT @@ @@ - PAGE_CACHE_SIZE + PAGE_SIZE @@ @@ - PAGE_CACHE_MASK + PAGE_MASK @@ expression E; @@ - PAGE_CACHE_ALIGN(E) + PAGE_ALIGN(E) @@ expression E; @@ - page_cache_get(E) + get_page(E) @@ expression E; @@ - page_cache_release(E) + put_page(E) Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Acked-by: Michal Hocko <mhocko@suse.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-03-29mmc: sdhci: Fix regression setting power on Trats2 boardAdrian Hunter
Several commits relating to setting power have been introducing problems by putting driver-specific rules into generic SDHCI code. Krzysztof Kozlowski reported that after commit 918f4cbd4340 ("mmc: sdhci: restore behavior when setting VDD via external regulator") on Trats2 board there are warnings for invalid VDD value (2.8V): [ 3.119656] ------------[ cut here ]------------ [ 3.119666] WARNING: CPU: 3 PID: 90 at ../drivers/mmc/host/sdhci.c:1234 sdhci_do_set_ios+0x4cc/0x5e0 [ 3.119669] mmc0: Invalid vdd 0x10 [ 3.119673] Modules linked in: [ 3.119679] CPU: 3 PID: 90 Comm: kworker/3:1 Tainted: G W 4.5.0-next-20160324 #23 [ 3.119681] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree) [ 3.119690] Workqueue: events_freezable mmc_rescan [ 3.119708] [<c010e0ac>] (unwind_backtrace) from [<c010ae10>] (show_stack+0x10/0x14) [ 3.119719] [<c010ae10>] (show_stack) from [<c0323260>] (dump_stack+0x88/0x9c) [ 3.119728] [<c0323260>] (dump_stack) from [<c011b754>] (__warn+0xe8/0x100) [ 3.119734] [<c011b754>] (__warn) from [<c011b7a4>] (warn_slowpath_fmt+0x38/0x48) [ 3.119740] [<c011b7a4>] (warn_slowpath_fmt) from [<c0527d28>] (sdhci_do_set_ios+0x4cc/0x5e0) [ 3.119748] [<c0527d28>] (sdhci_do_set_ios) from [<c0528018>] (sdhci_runtime_resume_host+0x60/0x114) [ 3.119758] [<c0528018>] (sdhci_runtime_resume_host) from [<c0402570>] (__rpm_callback+0x2c/0x60) [ 3.119767] [<c0402570>] (__rpm_callback) from [<c04025c4>] (rpm_callback+0x20/0x80) [ 3.119773] [<c04025c4>] (rpm_callback) from [<c04034b8>] (rpm_resume+0x36c/0x558) [ 3.119780] [<c04034b8>] (rpm_resume) from [<c04036f0>] (__pm_runtime_resume+0x4c/0x64) [ 3.119788] [<c04036f0>] (__pm_runtime_resume) from [<c0512728>] (__mmc_claim_host+0x170/0x1b0) [ 3.119795] [<c0512728>] (__mmc_claim_host) from [<c0514e2c>] (mmc_rescan+0x54/0x348) [ 3.119807] [<c0514e2c>] (mmc_rescan) from [<c0130dac>] (process_one_work+0x120/0x3f4) [ 3.119815] [<c0130dac>] (process_one_work) from [<c01310b8>] (worker_thread+0x38/0x554) [ 3.119823] [<c01310b8>] (worker_thread) from [<c01365a4>] (kthread+0xdc/0xf4) [ 3.119831] [<c01365a4>] (kthread) from [<c0107878>] (ret_from_fork+0x14/0x3c) [ 3.119834] ---[ end trace a22d652aa3276886 ]--- Fix by adding a 'set_power' callback and restoring the default behaviour prior to commit 918f4cbd4340 ("mmc: sdhci: restore behavior when setting VDD via external regulator"). The desired behaviour of that commit is gotten by having sdhci-pxav3 provide its own set_power callback. Reported-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Link: http://lkml.kernel.org/r/CAJKOXPcGDnPm-Ykh6wHqV1YxfTaov5E8iVqBoBn4OJc7BnhgEQ@mail.gmail.com Fixes: 918f4cbd4340 ("mmc: sdhci: restore behavior when setting VDD...) Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v4.5+ Reviewed-by: Jisheng Zhang <jszhang@marvell.com> Tested-by: Jisheng Zhang <jszhang@marvell.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-21Merge tag 'mmc-v4.6' of git://git.linaro.org/people/ulf.hansson/mmcLinus Torvalds
Pull MMC updates from Ulf Hansson: "MMC core: - Fix ABI regression of MMC BLK ioctl - Remove the unused MMC_DATA_STREAM flag - Enable asynchronous system PM for the host device - Minor fixes and clean-ups SDHCI host: Throughout the years, the numbers of SDHCI variants have increased and so has also the numbers of SDHCI callbacks/quirks. The purpose of these callbacks/quirks were to enable SDHCI to deal with variant specific requirements, but unfortunate this method didn't scale. Instead we have ended up with a mess. Not only did the code become suboptimal but also highly fragile. Lately many discussions of how to move forward with SDHCI has taken place at the MMC mailing list. Step by step, we aim to turn SDHCI's common code into a set of library functions. This will enable for optimizations and allow some of the existing callbacks and quirks to be removed, which also should help to make the code less fragile. Therefore I am also really pleased to announce that Adrian Hunter (Intel) has volunteered to step in as the maintainer for SDHCI. Future wise, I hope the community around SDHCI will continue to grow and that this release cycle can be the starting point of moving SDHCI into a better shape. As a matter of fact, already in this cycle the re-factoring has begun, but of course there are also fixes and new features included. Some highlights: - sdhci-iproc: Add support for Broadcom's BCM2835 eMMC IP - sdhci-acpi: Add support for QCOM controllers - sdhci-pic32: Add new SDHCI variant for PIC32MZDA Other hosts: - atmel-mci: Fix a NULL pointer dereference - mediatek: Add SD write-protect support - mmc_spi: Fix card detect in GPIO case - tmio/sdhi: Add r8a7795 support - tmio/sdhi: Some fixes and clean-ups - dw_mmc: Add HW reset support - dw_mmc: Some fixes and clean-ups - sunxi: Add support for MMC DDR52 mode" * tag 'mmc-v4.6' of git://git.linaro.org/people/ulf.hansson/mmc: (123 commits) mmc: sdhci-of-at91: fix wake-up issue when using runtime pm mmc: sdhci-pci: Do not set DMA mask in enable_dma() mmc: sdhci-acpi: Remove enable_dma() hook mmc: sdhci: Set DMA mask when adding host mmc: block: fix ABI regression of mmc_blk_ioctl mmc: atmel-mci: Check pdata for NULL before dereferencing it at DMA config mmc: core: remove redundant memset of sdio_read_cccr mmc: core: remove redundant memset of mmc_decode_cid mmc: of_mmc_spi: fix unused warning mmc: sdhci-of-arasan: add phy support for sdhci-of-arasan mmc: sdhci-of-arasan: fix missing sdhci_pltfm_free for err handling mmc: sdhci-of-arasan: remove disable clk_ahb from sdhci_arasan_resume Documentation: bindings: add description of phy for sdhci-of-arasan mmc: sdhci: Fix override of timeout clk wrt max_busy_timeout mmc: mmci: Remove unnecessary header file mmc: sdhci-acpi: add QCOM controllers mmc: tegra: implement memcomp pad calibration mmc: mediatek: Use mmc_regulator_set_vqmmc in start_signal_voltage_switch mmc: mediatek: Change signal voltage error to dev_dbg() mmc: sh_mmcif, tmio: Use ARCH_RENESAS ...
2016-03-18mmc: sdhci-of-at91: fix wake-up issue when using runtime pmludovic.desroches@atmel.com
It is impossible to wake-up on card detect event because when sdhci controller is runtime suspended, it is assumed that all clocks are disabled so we can't get irqs. If the device is removable and there is no gpio to manage the card detection then polling is used. It doesn't mean card detection is broken. It is curently we only way to wake-up on card event if using runtime pm. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-18mmc: sdhci-pci: Do not set DMA mask in enable_dma()Alexandre Courbot
DMA mask will already be set by sdhci_set_dma_mask(), which is equivalent to the removed code since pci_set_dma_mask() expands to its DMA-API counterpart. There should also be no reason to set the DMA mask after probe. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-18mmc: sdhci-acpi: Remove enable_dma() hookAlexandre Courbot
This hook was solely used to set the DMA mask, which is now done by the newly-added sdhci_set_dma_mask() function. The use of a flag to ensure the mask is only set once is a strong hint that it should not have been done there anyway. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-18mmc: sdhci: Set DMA mask when adding hostAlexandre Courbot
Set the DMA mask in sdhci_add_host() after we determined the capabilities of the device. 64-bit devices in particular are given the proper mask that ensures bounce buffers are not used. Also disable DMA if no proper DMA mask can be set, as the DMA-API documentation specifies. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17Merge tag 'tty-4.6-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty Pull tty/serial updates from Greg KH: "Here's the big tty/serial driver pull request for 4.6-rc1. Lots of changes in here, Peter has been on a tear again, with lots of refactoring and bugs fixes, many thanks to the great work he has been doing. Lots of driver updates and fixes as well, full details in the shortlog. All have been in linux-next for a while with no reported issues" * tag 'tty-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (220 commits) serial: 8250: describe CONFIG_SERIAL_8250_RSA serial: samsung: optimize UART rx fifo access routine serial: pl011: add mark/space parity support serial: sa1100: make sa1100_register_uart_fns a function tty: serial: 8250: add MOXA Smartio MUE boards support serial: 8250: convert drivers to use up_to_u8250p() serial: 8250/mediatek: fix building with SERIAL_8250=m serial: 8250/ingenic: fix building with SERIAL_8250=m serial: 8250/uniphier: fix modular build Revert "drivers/tty/serial: make 8250/8250_ingenic.c explicitly non-modular" Revert "drivers/tty/serial: make 8250/8250_mtk.c explicitly non-modular" serial: mvebu-uart: initial support for Armada-3700 serial port serial: mctrl_gpio: Add missing module license serial: ifx6x60: avoid uninitialized variable use tty/serial: at91: fix bad offset for UART timeout register tty/serial: at91: restore dynamic driver binding serial: 8250: Add hardware dependency to RT288X option TTY, devpts: document pty count limiting tty: goldfish: support platform_device with id -1 drivers: tty: goldfish: Add device tree bindings ...
2016-03-17mmc: block: fix ABI regression of mmc_blk_ioctlShawn Lin
If mmc_blk_ioctl returns -EINVAL, blkdev_ioctl continues to work without returning err to user-space. But now we check CAP_SYS_RAWIO firstly, so we return -EPERM to blkdev_ioctl, which make blkdev_ioctl return -EPERM to user-space directly. So this will break all the ioctl with BLKROSET. Now we find Android-adb suffer it for the following log: remount of /system failed; couldn't make block device writable: Operation not permitted openat(AT_FDCWD, "/dev/block/platform/ff420000.dwmmc/by-name/system", O_RDONLY) = 3 ioctl(3, BLKROSET, 0) = -1 EPERM (Operation not permitted) Fixes: a5f5774c55a2 ("mmc: block: Add new ioctl to send multi commands") Cc: stable@vger.kernel.org Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: atmel-mci: Check pdata for NULL before dereferencing it at DMA configBrent Taylor
Using an at91sam9g20ek development board with DTS configuration may trigger a kernel panic because of a NULL pointer dereference exception, while configuring DMA. Let's fix this by adding a check for pdata before dereferencing it. Signed-off-by: Brent Taylor <motobud@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: core: remove redundant memset of sdio_read_cccrShawn Lin
When initializing sdio card, we get struct mmc_card from mmc_alloc_card which allocates it by kzalloc. So we don't need another memset while reading cccr. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: core: remove redundant memset of mmc_decode_cidShawn Lin
When initializing sd or sdio card, we get struct mmc_card from mmc_alloc_card which allocates it by kzalloc. So we don't need another memset while decoding cid. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: of_mmc_spi: fix unused warningBrian Norris
drivers/mmc/host/of_mmc_spi.c: In function 'mmc_spi_get_pdata': drivers/mmc/host/of_mmc_spi.c:77:6: warning: variable 'ret' set but not used [-Wunused-but-set-variable] int ret = -EINVAL; ^ Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sdhci-of-arasan: add phy support for sdhci-of-arasanShawn Lin
This patch adds Generic PHY access for sdhci-of-arasan. Driver can get PHY handler from dt-binding, and power-on/init the PHY. Currently, it's just mandatory for arasan,sdhci-5.1. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sdhci-of-arasan: fix missing sdhci_pltfm_free for err handlingShawn Lin
Currently, some err handling of sdhci_arasan_probe return directly without calling sdhci_pltfm_free. This patch fixes them. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sdhci-of-arasan: remove disable clk_ahb from sdhci_arasan_resumeShawn Lin
We don't really need disable clk_ahb when failing to resume. Otherwise we may take risk of bus error for accessing register without clk_ahb. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sdhci: Fix override of timeout clk wrt max_busy_timeoutAdrian Hunter
Normally the timeout clock frequency is read from the capabilities register. It is also possible to set the value prior to calling sdhci_add_host() in which case that value will override the capabilities register value. However that was being done after calculating max_busy_timeout so that max_busy_timeout was being calculated using the wrong value of timeout_clk. Fix that by moving the override before max_busy_timeout is calculated. The result is that the max_busy_timeout and max_discard increase for BSW devices so that, for example, the time for mkfs.ext4 on a 64GB eMMC drops from about 1 minute 40 seconds to about 20 seconds. Note, in the future, the capabilities setting will be tidied up and this override won't be used anymore. However this fix is needed for stable. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v3.18+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: mmci: Remove unnecessary header fileWang Hongcheng
The header file asm/sizes.h is unnecessary, let's remove it. This also allows to compile under X86 arch. Signed-off-by: Wang Hongcheng <annie.wang@amd.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sdhci-acpi: add QCOM controllersPhilip Elcan
This adds the HIDs for Qualcomm Technologies Inc SDHC controllers: QCOM8051: non-removable device that does not support 1.8v QCOM8052: non-removable device that does support 1.8v Signed-off-by: Philip Elcan <pelcan@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: tegra: implement memcomp pad calibrationLucas Stach
The Tegra30+ SDMMC module has memcomp pads that are used to automatically find and set the correct drive strength settings to the sdmmc pads. The calibration needs to be manually kicked off when the card signal voltage is changed, after the card clock is supplied again. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> [Ulf: Rebased to fix a trivial compile error] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: mediatek: Use mmc_regulator_set_vqmmc in start_signal_voltage_switchNicolas Boichat
We've introduced a new helper in the MMC core: mmc_regulator_set_vqmmc(). Let's use this in mtk-sd. Using this new helper has some advantages: 1. We get the mmc_regulator_set_vqmmc() behavior of trying to match VQMMC and VMMC when the signal voltage is 3.3V. This ensures max compatibility. 2. We get rid of a few more warnings when probing unsupported voltages. 3. We get rid of some non-mediatek specific code in mtk-sd. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: mediatek: Change signal voltage error to dev_dbg()Nicolas Boichat
In commit ceae98f20e36 ("mmc: core: Try other signal levels during power up") we can see that there are times when it's valid to try several signal voltages. Don't print an ugly error in the logs when that happens. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sh_mmcif, tmio: Use ARCH_RENESASSimon Horman
Make use of ARCH_RENESAS in place of ARCH_SHMOBILE. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: tegra: properly disable card clockLucas Stach
The new code to do the clock rate setting externally to the SDMMC module has a shortcut to not propagate changes with a 0 rate to the CAR by simply bailing out. This breaks proper cutting of the card clock. Fix it by directly calling the correct sdhci function. Fixes: a8e326a911d3 "mmc: tegra: implement module external clock change" Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-16mmc: mmc_spi: Add Card Detect comments and fix CD GPIO caseMagnus Damm
This patch fixes the MMC SPI driver from doing polling card detect when a CD GPIO that supports interrupts is specified using the gpios DT property. Without this patch the DT node below results in the following output: spi_gpio: spi-gpio { /* SD2 @ CN12 */ compatible = "spi-gpio"; #address-cells = <1>; #size-cells = <0>; gpio-sck = <&gpio6 16 GPIO_ACTIVE_HIGH>; gpio-mosi = <&gpio6 17 GPIO_ACTIVE_HIGH>; gpio-miso = <&gpio6 18 GPIO_ACTIVE_HIGH>; num-chipselects = <1>; cs-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>; status = "okay"; spi@0 { compatible = "mmc-spi-slot"; reg = <0>; voltage-ranges = <3200 3400>; spi-max-frequency = <25000000>; gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; /* CD */ }; }; # dmesg | grep mmc mmc_spi spi32766.0: SD/MMC host mmc0, no WP, no poweroff, cd polling mmc0: host does not support reading read-only switch, assuming write-enable mmc0: new SDHC card on SPI mmcblk0: mmc0:0000 SU04G 3.69 GiB mmcblk0: p1 With this patch applied the "cd polling" portion above disappears. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Cc: stable@vger.kernel.org # v3.18+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-16mmc: tegra: Disable UHS-I modes for tegra114Jon Hunter
SD card support for Tegra114 started failing after commit a8e326a911d3 ("mmc: tegra: implement module external clock change") was merged. This commit was part of a series to enable UHS-I modes for Tegra. To workaround this problem for now, disable UHS-I modes for Tegra114 by separating the soc data structures for Tegra114 and Tegra124 so that UHS-I is still enabled for Tegra124 but not Tegra114. Fixes: a8e326a911d3 ("mmc: tegra: implement module external clock change") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Lucas Stach <dev@lynxeye.de> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-pltfm: remove priv variable from sdhci_pltfm_hostJisheng Zhang
Now all clients migration to use sdhci_pltfm_init for private allocation is done and there's no users of the priv variable, so we can remove it from the sdhci_pltfm_host structure. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-pxav2: remove unnecessary assignment of pltfm_host->privJisheng Zhang
The sdhci_pltfm_init() function has initialized the priv member as NULL, so there's no need to do it again. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-tegra: use sdhci_pltfm_init for private allocationJisheng Zhang
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-tegra to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-st: use sdhci_pltfm_init for private allocationJisheng Zhang
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-st to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-pxav3: use sdhci_pltfm_init for private allocationJisheng Zhang
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-pxav3 to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-of-esdhc: use sdhci_pltfm_init for private allocationJisheng Zhang
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-esdhc driver to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-of-at91: use sdhci_pltfm_init for private allocationJisheng Zhang
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-at91 driver to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-of-arasan: use sdhci_pltfm_init for private allocationJisheng Zhang
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-arasan driver to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-of-arasan: fix clk issue in sdhci_arasan_remove()Jisheng Zhang
sdhci_pltfm_unregister() could operate host's registers, it will cause problems if the clk is already disabled and unprepared. Fix this issue by moving the clk_disable_unprepare() call to the end of remove function. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-msm: use sdhci_pltfm_init for private allocationJisheng Zhang
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-msm to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-msm: factorise sdhci_msm_pdata outisde of sdhci_msm_hostJisheng Zhang
There's no need to allocate one sdhci_msm_pdata for each sdhci_msm_host. This patch removes the sdhci_msm_pdata member from sdhci_msm_host and uses one static global sdhci_msm_pdata for all sdhci msm hosts. It also marks sdhci_msm_ops as const. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-esdhc-imx: use sdhci_pltfm_init for private allocationJisheng Zhang
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci esdhc-imx driver to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-bcm2835: use sdhci_pltfm_init for private allocationJisheng Zhang
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-bcm2835 to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: mediatek: add SD write protect supportChaotian Jing
use mmc core layer's API to support sd write protect Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhi: Add r8a7795 supportWolfram Sang
Registers are 64bit apart, so we refactor bus_shift handling a little and set it based on the DT compatible. Also, EXT_ACC is different. It has been tested on a Salvator-X (Gen3) and, to check for regressions, on a Lager (Gen2). Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: further code simplicationRussell King
Further simplify the code in sdhci_prepare_data() - we don't set SDHCI_REQ_USE_DMA anywhere else in the driver, so there is no need to set it, and then immediately test it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: consolidate the DMA/ADMA size/address quicksRussell King
Rather than scanning the scatterlist multiple times for each quirk, scan it once, checking for each possible quirk. This should be cheaper due to the length and offset members commonly sharing the same cache line than scanning the scatterlist multiple times. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: prepare DMA address/size quirk handling consolidationRussell King
Prepare to consolidate the DMA address/size quirk handling into one single loop. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: cleanup DMA un-mappingRussell King
The patch "mmc: sdhci: plug DMA mapping leak on error" added un-mapping logic to sdhci_tasklet_finish() where it is always called, thereby preventing the mapping leaking. Consequently the un-mapping code in sdhci_finish_data() is no longer needed. Remove it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [ Split from original "mmc: sdhci: plug DMA mapping leak on error" patch ] Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: clean up host cookie handlingRussell King
Commit d31911b9374a ("mmc: sdhci: fix dma memory leak in sdhci_pre_req()") added a complicated method to manage the DMA map state for the data transfer, but this complexity is not required. There are three states: * Unmapped * Mapped by sdhci_pre_req() * Mapped by sdhci_prepare_data() sdhci_prepare_data() needs to know when the data buffers have been successfully mapped by sdhci_pre_req(), and if so, there is no need to map them a second time. When we come to tear down the mapping, we want to know whether sdhci_post_req() will be called (which is determined by sdhci_pre_req() having been previously called) so that we can postpone the unmap operation. Hence, it makes sense to simply record when the successful DMA map happened (via COOKIE_PRE_MAPPED vs COOKIE_MAPPED) rather than having the complex mechanics involving COOKIE_MAPPED vs COOKIE_GIVEN. If a mapping is created by sdhci_prepare_data(), we must tear it down ourselves, without waiting for sdhci_post_req() (hence, the new COOKIE_MAPPED case). If the mapping is created by sdhci_pre_req() then sdhci_post_req() is responsible for tearing the mapping down. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: always unmap a mapped data transfer in sdhci_post_req()Russell King
If the host cookie indicates that the data buffers of a request are mapped at sdhci_post_req() time, always unmap the data buffers. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: pass the cookie into sdhci_pre_dma_transfer()Russell King
Pass the desired cookie for a successful map. This is in preparation to clean up the MAPPED/GIVEN states. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>