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path: root/drivers/net
AgeCommit message (Expand)Author
2016-03-10rtl8xxxu: Dump contents of unhandled C2H eventsJes Sorensen
2016-03-10rtl8xxxu: Report media status using the correct H2C command for 8723buJes Sorensen
2016-03-10rtl8xxxu: Implement basic 8723b specific update_rate_mask() functionJes Sorensen
2016-03-10rtl8xxxu: Define 8723b H2C ramask command structureJes Sorensen
2016-03-10rtl8xxxu: Do not parse RX descriptor info for C2H packetsJes Sorensen
2016-03-10rtl8xxxu: Improve handling of txdesc32 vs txdesc40 handlingJes Sorensen
2016-03-10rtl8xxxu: TX RTS rate is word 4 for 8723aJes Sorensen
2016-03-10rtl8723au: Update TX descriptor words 4 and 5 definitionsJes Sorensen
2016-03-10rtl8xxxu: Set sequence number correctly for 40 byte TX descriptorsJes Sorensen
2016-03-10rtl8xxxu: Set the correct TX descriptor bits for agg and break on 8723bJes Sorensen
2016-03-10rtl8xxxu: Add more 40 byte TX desc bit definitionsJes Sorensen
2016-03-10rtl8xxxu: Add additional tx descriptor bits for data word 0Jes Sorensen
2016-03-10rtl8xxxu: Do not unconditionally print debug info in rtl8723bu_handle_c2h()Jes Sorensen
2016-03-10rtl8xxxu: Handle 40 byte TX descriptors for rtl8723buJes Sorensen
2016-03-10rtl8xxxu: Add definition for 8723bu tx descriptorJes Sorensen
2016-03-10rtl8xxxu: Set the correct thermal meter register for 8723buJes Sorensen
2016-03-10rtl8xxxu: Set 8723bu MCS TX powerJes Sorensen
2016-03-10rtl8xxxu: Set 8723bu TX power for CCK and OFDM ratesJes Sorensen
2016-03-10rtl8xxxu: Parse efuse power indices for 8723buJes Sorensen
2016-03-10rtl8xxxu: Bump TX power arrays to handle larger channel groupsJes Sorensen
2016-03-10rtl8xxxu: Use size of source pointer when copying efuse dataJes Sorensen
2016-03-10rtl8xxxu: Introduce set_tx_power() fileop and a new 8723b dummy derivativeJes Sorensen
2016-03-10rtl8xxxu: Correct struct rtl8723bu_efuse to list power bases correctlyJes Sorensen
2016-03-10rtl8xxxu: Do not use hard-wired RF enable settings for 8723buJes Sorensen
2016-03-10rtl8xxxu: Setup coex table correctly (hopefully)Jes Sorensen
2016-03-10rtl8xxxu: Use REG_RFE_CTRL_ANTA_SRC rather than hard coded valueJes Sorensen
2016-03-10rtl8xxxu: Use name for REG_RFE_BUFFER rather than hard coded valueJes Sorensen
2016-03-10rtl8xxxu: 8723bu: REG_BT_COEX_TABLE4 is only 8 bitsJes Sorensen
2016-03-10rtl8xxxu: Set WLAN_ACT_CONTROL per vendor driver settingJes Sorensen
2016-03-10rtl8xxxu: RF_T_METER is different on the newer chipsJes Sorensen
2016-03-10rtl8xxxu: Implement init_statistics for 8723buJes Sorensen
2016-03-10rtl8xxxu: Add missing blank space in front of bracketJes Sorensen
2016-03-10rtl8xxxu: Setup RX aggregationJes Sorensen
2016-03-10rtl8xxxu: Group chip quirks togetherJes Sorensen
2016-03-10rtl8xxxu: Add REG_DWBCN1_CTRL_8723B defineJes Sorensen
2016-03-10rtl8xxxu: 8723bu lock phy after RF initJes Sorensen
2016-03-10rtl8xxxu: Call device specific _config_channel()Jes Sorensen
2016-03-10rtl8xxxu: Initialize burst parameters for 8723buJes Sorensen
2016-03-10rtl8xxxu: Set RX boundary for 8723buJes Sorensen
2016-03-10rtl8xxxu: Do not set FPGA0_TX_INFO for 8723bu and use a larger PBP page sizeJes Sorensen
2016-03-10rtl8xxxu: Do queue init in same order as 8723bu vendor driverJes Sorensen
2016-03-10rtl8xxxu: 80M spur hack is for 8723au onlyJes Sorensen
2016-03-10rtl8xxxu: Init H2C command register for 8723buJes Sorensen
2016-03-10rtl8xxxu: Another 8723bu magic register set during initJes Sorensen
2016-03-10rtl8xxxu: Another 8723bu patch for rtl8xxxu_init_phy_bb()Jes Sorensen
2016-03-10rtl8xxxu: Handle XTAL_K value in efuse specific locationJes Sorensen
2016-03-10rtl8xxxu: Additional fixes for 8723buJes Sorensen
2016-03-10rtl8xxxu: Setup LLT before downloading firmwareJes Sorensen
2016-03-10rtl8xxxu: Implement 8723bu power on sequenceJes Sorensen
2016-03-10rtl8xxxu: Do not set REG_AFE_XTAL_CTRL on 8723buJes Sorensen
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