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commit 71ca9d68e282482f4e67cebac2b287b9f11d826a
[dwc -> host]
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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commit 1d77040bde2d21dc7db575d4b43c1da24c94cca1
[context adjustment]
Add support for the LS1046a PCIe controller. This device has a different
LUT_DBG offset, so add "lut_dbg" to ls_pcie_drvdata to
describe this difference.
[bhelgaas: changelog, remove now-unused PCIE_LUT_DBG]
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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Signed-off-by: hongbo.wang <hongbo.wang@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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commit 433fcf6b7b31f1f233dd50aeb9d066a0f6ed4b9d upstream.
When we have 32 or more CPUs in the affinity mask, we should use a special
constant to specify that to the host. Fix this issue.
Signed-off-by: K. Y. Srinivasan <kys@microsoft.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Long Li <longli@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 59c58ceeea9cdc6144d7b0303753e6bd26d87455 upstream.
The memory allocation here needs to be non-blocking. Fix the issue.
Signed-off-by: K. Y. Srinivasan <kys@microsoft.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Long Li <longli@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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[ Upstream commit 0d414268fb8d0844030f87027e904f69d96706be ]
Pull the register resource lookup out of thunder_pem_init() so we can
easily add a corresponding lookup using ACPI. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 6e347b5e05ea2ac4ac467a5a1cfaebb2c7f06f80 upstream.
The host bridge memory window resource is inserted into the iomem_resource
tree and cannot be deallocated until the host bridge itself is removed.
Previously, the window was on the stack, which meant the iomem_resource
entry pointed into the stack and was corrupted as soon as the probe
function returned, which caused memory corruption and errors like this:
pcie_iproc_bcma bcma0:8: resource collision: [mem 0x40000000-0x47ffffff] conflicts with PCIe MEM space [mem 0x40000000-0x47ffffff]
Move the memory window resource from the stack into struct iproc_pcie so
its lifetime matches that of the host bridge.
Fixes: c3245a566400 ("PCI: iproc: Request host bridge window resources")
Reported-and-tested-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 2a7275a3d867b228216886aae35e1f64291180b1 upstream.
eb5767122feb ("PCI: altera: Simplify TLB_CFG_DW0 usage") used
TLP_FMTTYPE_CFGRD* (instead of TLP_FMTTYPE_CFGWR*) for TLP writes, which
causes writing to configuration space to fail. Fix it by using correct
FMTTYPE for write operation.
Fixes: eb5767122feb ("PCI: altera: Simplify TLB_CFG_DW0 usage")
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 60e2e2fbafdd1285ae1b4ad39ded41603e0c74d0 upstream.
The devfn of 00:02.0 is 0x10. devfn_to_wslot(0x10) == 0x2, and
wslot_to_devfn(0x2) should be 0x10, while it's 0x2 in the current code.
Due to this, hv_eject_device_work() -> pci_get_domain_bus_and_slot()
returns NULL and pci_stop_and_remove_bus_device() is not called.
Later when the real device driver's .remove() is invoked by
hv_pci_remove() -> pci_stop_root_bus(), some warnings can be noticed
because the VM has lost the access to the underlying device at that
time.
Signed-off-by: Jake Oshins <jakeo@microsoft.com>
Signed-off-by: Dexuan Cui <decui@microsoft.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Haiyang Zhang <haiyangz@microsoft.com>
CC: K. Y. Srinivasan <kys@microsoft.com>
CC: Stephen Hemminger <sthemmin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit a782b5f986c3fa1cfa7f2b57941200c6a5809242 upstream.
Previously we checked for iATU unroll support by reading PCIE_ATU_VIEWPORT
even on platforms, e.g., Keystone, that do not have ATU ports. This can
cause bad behavior such as asynchronous external aborts:
OF: PCI: MEM 0x60000000..0x6fffffff -> 0x60000000
Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
pgd = c0003000
[00000000] *pgd=80000800004003, *pmd=00000000
Internal error: : 1211 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.9.0-00009-g6ff59d2-dirty #7
Hardware name: Keystone
task: eb878000 task.stack: eb866000
PC is at dw_pcie_setup_rc+0x24/0x380
LR is at ks_pcie_host_init+0x10/0x170
Move the dw_pcie_iatu_unroll_enabled() check so we only call it on
platforms that do not use the ATU. These platforms supply their own
->rd_other_conf() and ->wr_other_conf() methods.
[bhelgaas: changelog]
Fixes: a0601a470537 ("PCI: designware: Add iATU Unroll feature")
Fixes: 416379f9ebde ("PCI: designware: Check for iATU unroll support after initializing host")
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-By: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit a45e2611b9bbd81288d97d02ce7e74a60a698d43 upstream.
We're trying to mask out bits[23:8] while retaining [32:24, 7:0], but we're
doing the inverse. That doesn't have too much effect, since we're setting
all the [23:8] bits to 1, and the other bits are only relevant for modes
we're currently not using. But we should get this right.
Fixes: ca1989084054 ("PCI: rockchip: Fix wrong transmitted FTS count")
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 45e9320f3a4ef9588ee50a2eb1891c4bfdbb07df upstream.
The calculation of negotiated lanes is wrong: it should be shifted by
PCIE_CORE_PL_CONF_LANE_SHIFT, but it is shifted by
PCIE_CORE_PL_CONF_LANE_MASK instead. Let's fix it.
Fixes: e77f847df54c ("PCI: rockchip: Add Rockchip PCIe controller support")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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I returned to Synopsys and so I am sending this patch to update the email
address of the pcie-designware-plat author.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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pm_rst, aclk_rst, pclk_rst was controlled by ROM code so the software
wasn't needed to control it again in theory. But it didn't work properly,
so we do need to do it again and add enough delay between the assert of
pm_rst and the deassert of pm_rst. The Soc intergrated with this
controller, rk3399, is still under MP test internally, so the backward
compatibility won't be a big deal.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
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dw_pcie_iatu_unroll_enabled() reads a dbi_base register. Reading any
dbi_base register before pp->ops->host_init has been called causes
"imprecise external abort" on platforms like ARTPEC-6, where the PCIe
module is disabled at boot and first enabled in pp->ops->host_init. Move
dw_pcie_iatu_unroll_enabled() to dw_pcie_setup_rc(), since it is after
pp->ops->host_init, but before pp->iatu_unroll_enabled is actually used.
Fixes: a0601a470537 ("PCI: designware: Add iATU Unroll feature")
Tested-by: James Le Cuirot <chewi@gentoo.org>
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
Acked-by: Olof Johansson <olof@lixom.net>
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Initialize pp->dev in qcom_pcie_probe() before calling get_resources(),
which uses it.
[bhelgaas: changelog]
Fixes: e6a087eeaf91 ("PCI: qcom: Remove redundant struct qcom_pcie.dev")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Although I am leaving Synopsys, I would like to keep working with the linux
kernel community and help in what you might find useful. For that I am
sending this patch to change my contact e-mail.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Commit fefe6733e516 ("PCI: layerscape: Move struct pcie_port setup
to probe function") changed the init ordering of the pcie structure,
but started to use the pcie->drvdata field before initializing it.
Mayhem follows.
Fix this by moving the drvdata assignment right before the first use.
Tested on LS2085a.
Fixes: efe6733e516 ("PCI: layerscape: Move struct pcie_port setup to probe function")
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
PCI changes for the v4.9 merge window:
"Here are some more changes I'd like to have in v4.9. There's one
small Tegra bug fix in the PHY poweroff path, which is only used in
failure paths.
The rest is all strictly cleanup that should make host bridge drivers
more readable, but shouldn't actually change any behavior.
Summary:
- use local struct device pointers in many host bridge drivers for
clarity
- remove unused platform data
- use generic DesignWare accessors
- misc cleanups: remove redundant structure entries and re-order
structure members to put comon generic fields first etc"
* tag 'pci-v4.9-changes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (108 commits)
MAINTAINERS: Add maintainer for the PCIe Marvell Armada 8K driver
MAINTAINERS: Add DT binding to the Aardvark PCIe driver maintainer
PCI: rockchip: Indent "if" statement body
PCI: hisi: Reorder struct hisi_pcie
PCI: hisi: Pass device-specific struct to internal functions
PCI: hisi: Include register block base in PCIE_SYS_STATE4 address
PCI: dra7xx: Reorder struct dra7xx_pcie
PCI: xilinx-nwl: Remove unused platform data
PCI: xilinx-nwl: Add local struct device pointers
PCI: xilinx: Removed unused xilinx_pcie_assign_msi() argument
PCI: xilinx: Remove unused platform data
PCI: xilinx: Add local struct device pointers
PCI: xgene: Add register accessors
PCI: xgene: Pass struct xgene_pcie_port to setup functions
PCI: xgene: Remove unused platform data
PCI: tegra: Remove unused platform data
PCI: tegra: Add local struct device pointers
PCI: tegra: Fix argument order in tegra_pcie_phy_disable()
PCI: rockchip: Remove unused platform data
PCI: rcar-gen2: Add local struct device pointers
...
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'pci/host-exynos', 'pci/host-hisi', 'pci/host-imx6', 'pci/host-keystone', 'pci/host-layerscape', 'pci/host-qcom' and 'pci/host-spear' into next
* pci/host-armada:
MAINTAINERS: Add maintainer for the PCIe Marvell Armada 8K driver
PCI: armada: Reorder struct armada8k_pcie
PCI: armada: Pass device-specific struct to internal functions
PCI: armada: Use generic DesignWare accessors
PCI: armada: Remove redundant struct armada8k_pcie.base
PCI: armada: Add local base pointer
PCI: armada: Remove unused platform data
* pci/host-artpec:
PCI: artpec6: Add resource name comments
PCI: artpec6: Pass device-specific struct to internal functions
PCI: artpec6: Remove unnecessary artpec6_pcie_link_up()
PCI: artpec6: Use generic DesignWare accessors
PCI: artpec6: Add register accessors
PCI: artpec6: Remove unused platform data
PCI: artpec6: Add local struct device pointers
* pci/host-dra7xx:
PCI: dra7xx: Reorder struct dra7xx_pcie
PCI: dra7xx: Move struct pcie_port setup to probe function
PCI: dra7xx: Pass device-specific struct to internal functions
PCI: dra7xx: Use generic DesignWare accessors
PCI: dra7xx: Set drvdata at end of probe function
PCI: dra7xx: Remove redundant struct device pointer from dra7xx_pcie
PCI: dra7xx: Add local struct device pointers
* pci/host-exynos:
PCI: exynos: Reorder struct exynos_pcie
PCI: exynos: Pass device-specific struct to internal functions
PCI: exynos: Name private struct pointer "exynos_pcie" consistently
PCI: exynos: Uninline register accessors
PCI: exynos: Add local struct device pointers
* pci/host-hisi:
PCI: hisi: Reorder struct hisi_pcie
PCI: hisi: Pass device-specific struct to internal functions
PCI: hisi: Include register block base in PCIE_SYS_STATE4 address
PCI: hisi: Use generic DesignWare accessors
PCI: hisi: Remove redundant struct hisi_pcie.reg_base
PCI: hisi: Name private struct pointer "hisi_pcie" consistently
PCI: hisi: Remove unused platform data
PCI: hisi: Add local struct device pointers
* pci/host-imx6:
PCI: imx6: Remove unused return values
PCI: imx6: Reorder struct imx6_pcie
PCI: imx6: Use generic DesignWare accessors
PCI: imx6: Pass device-specific struct to internal functions
PCI: imx6: Pass struct imx6_pcie to PHY accessors
PCI: imx6: Removed unused struct imx6_pcie.mem_base
PCI: imx6: Remove redundant of_node pointer
PCI: imx6: Add local struct device pointers
* pci/host-keystone:
PCI: keystone: Reorder struct keystone_pcie
PCI: keystone: Add app register accessors
PCI: keystone: Pass keystone_pcie, not va_app_base, to DBI functions
PCI: keystone: Pass keystone_pcie, not address, to IRQ functions
PCI: keystone: Use generic DesignWare accessors
PCI: keystone: Add local struct device pointers
* pci/host-layerscape:
PCI: layerscape: Reorder struct ls_pcie
PCI: layerscape: Remove unused ls_add_pcie_port() platform_device arg
PCI: layerscape: Move struct pcie_port setup to probe function
PCI: layerscape: Pass device-specific struct to internal functions
PCI: layerscape: Remove redundant struct ls_pcie.dbi
PCI: layerscape: Remove unused platform data
PCI: layerscape: Add local struct device pointers
* pci/host-qcom:
PCI: qcom: Reorder struct qcom_pcie
PCI: qcom: Remove redundant struct qcom_pcie.dev
PCI: qcom: Remove redundant struct qcom_pcie.dbi
PCI: qcom: Remove unused platform data
* pci/host-spear:
PCI: spear: Clean up struct device usage
PCI: spear: Reorder struct spear13xx_pcie
PCI: spear: Pass device-specific struct to internal functions
PCI: spear: Remove unused constants
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* pci/host-designware:
PCI: designware-plat: Remove unused platform data
PCI: designware-plat: Add local struct device pointers
PCI: designware-plat: Remove redundant dw_plat_pcie.mem_base
PCI: designware: Swap order of dw_pcie_writel_unroll() reg/val arguments
PCI: designware: Uninline register accessors
PCI: designware: Export dw_pcie_readl_rc(), dw_pcie_writel_rc()
PCI: designware: Swap order of dw_pcie_writel_rc() reg/val arguments
PCI: designware: Simplify pcie_host_ops.readl_rc() and .writel_rc() interfaces
PCI: designware: Simplify dw_pcie_readl_unroll(), dw_pcie_writel_unroll()
PCI: designware: Rename dw_pcie_valid_config() to dw_pcie_valid_device()
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'pci/host-mvebu', 'pci/host-rcar', 'pci/host-rockchip', 'pci/host-tegra', 'pci/host-xgene' and 'pci/host-xilinx' into next
* pci/host-aardvark:
MAINTAINERS: Add DT binding to the Aardvark PCIe driver maintainer
PCI: aardvark: Remove unused platform data
PCI: aardvark: Add local struct device pointers
* pci/host-altera:
PCI: altera: Simplify TLP_CFG_DW1 usage
PCI: altera: Simplify TLB_CFG_DW0 usage
PCI: altera: Rename altera_pcie_valid_config() to altera_pcie_valid_device()
PCI: altera: Remove redundant platform_get_resource() return value check
PCI: altera: Remove unused platform data
PCI: altera: Add local struct device pointers
* pci/host-iproc:
PCI: iproc: Hard-code PCIe capability offset instead of searching
PCI: iproc: Remove redundant null pointer checking
PCI: iproc: Validate CSR base in BCMA setup code
PCI: iproc: Set drvdata at end of probe function
PCI: iproc: Add local struct device pointers
* pci/host-mvebu:
PCI: mvebu: Use existing of_node pointer
PCI: mvebu: Add local struct device pointers
* pci/host-rcar:
PCI: rcar-gen2: Add local struct device pointers
PCI: rcar: Remove DRV_NAME macro
PCI: rcar: Remove unused rcar_pcie_get_resources() platform_device arg
PCI: rcar: Remove unused platform data
PCI: rcar: Add local struct device pointers
* pci/host-rockchip:
PCI: rockchip: Indent "if" statement body
PCI: rockchip: Remove unused platform data
* pci/host-tegra:
PCI: tegra: Remove unused platform data
PCI: tegra: Add local struct device pointers
PCI: tegra: Fix argument order in tegra_pcie_phy_disable()
* pci/host-xgene:
PCI: xgene: Add register accessors
PCI: xgene: Pass struct xgene_pcie_port to setup functions
PCI: xgene: Remove unused platform data
PCI: xgene: Add local struct device pointers
* pci/host-xilinx:
PCI: xilinx-nwl: Remove unused platform data
PCI: xilinx-nwl: Add local struct device pointers
PCI: xilinx: Removed unused xilinx_pcie_assign_msi() argument
PCI: xilinx: Remove unused platform data
PCI: xilinx: Add local struct device pointers
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Body of an "if" statement wasn't indented. Add a tab.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Reorder struct hisi_pcie to put generic fields first. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Only interfaces used from outside the driver, e.g., those called by the
DesignWare core, need to accept pointers to the generic struct pcie_port.
Internal interfaces can accept pointers to the device-specific struct,
which makes them more straightforward. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Include the PCIE_HIP06_CTRL_OFF block base in the PCIE_SYS_STATE4 register
address so reads of PCIE_SYS_STATE4 don't have to mention both. No
functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Reorder struct dra7xx_pcie to put generic fields first. No functional
change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The xilinx-nwl driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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xilinx_pcie_assign_msi() doesn't use the struct xilinx_pcie_port pointer
passed to it, so remove the argument completely. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The xilinx driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Add device-specific register accessors for consistency across host drivers.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Pass the struct xgene_pcie_port pointer, not addresses, to setup functions.
This enables future simplifications. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The xgene driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The tegra driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The tegra_pcie_phy_disable() path called pads_writel() with arguments in
the wrong order. Swap them to be the "value, offset" order expected by
pads_writel().
Fixes: 6fe7c187e026 ("PCI: tegra: Support per-lane PHYs")
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Thierry Reding <treding@nvidia.com>
CC: stable@vger.kernel.org # v4.7+
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The rockchip driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
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Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
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The DRV_NAME macro is only used once, so there's no real advantage to
having the macro at all. Remove it and use the "rcar-pcie" name directly
in the struct platform_driver. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
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rcar_pcie_get_resources() doesn't use the platform_device pointer passed to
it, so remove it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
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The rcar driver never uses the platform drvdata pointer, so don't bother
setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
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Reorder struct qcom_pcie to put generic fields first. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Remove the struct qcom_pcie.dev member, which is a duplicate of the generic
pp.dev member. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Remove the struct qcom_pcie.dbi member, which is a duplicate of the generic
pp.dbi_base member. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The qcom driver never uses the platform drvdata pointer, so don't bother
setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use the existing "np" pointer instead of looking up dev->of_node again. No
functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Reorder struct ls_pcie to put generic fields first. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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