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Core reworks to support stopping and re-starting the controller, lays the
groundwork for phy disable / re-enable and fixes other bugs around port/phy
setup/teardown.
Signed-off-by: Pawel Marek <pawel.marek@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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This removes scic_controller_get_handler_methods and its
associated unused code.
Signed-off-by: Edmund Nadolski <edmund.nadolski@intel.com>
[djbw: kill off the legacy handler, now that we have basic error isr support]
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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Signed-off-by: Edmund Nadolski <edmund.nadolski@intel.com>
[rebased after killing SCI_IO_REQUEST_DATA_DIRECTION]
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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Support for the up to 2x4-port 6Gb/s SAS controllers embedded in the
chipset.
This is a snapshot of the first publicly available version of the driver,
commit 4c1db2d0 in the 'historical' branch.
git://git.kernel.org/pub/scm/linux/kernel/git/djbw/isci.git historical
Signed-off-by: Maciej Trela <maciej.trela@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Edmund Nadolski <edmund.nadolski@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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