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Use the correct APIs for translating a DMA-mapped IOVA address
into a virtual one.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
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Add DPAA2 Ethernet debugfs statistics, displaying aggregated counters
pertaining to CPU, frame queue and channel.
It's a squashed commit containing contributions by the following
authors:
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@nxp.com>
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Introduce the DPAA2 Ethernet driver, which manages Datapath
Network Interface (DPNI) objects discovered on the MC bus.
In addition to DPNIs, the Ethernet driver uses several other
MC objects to build a network interface abstraction: buffer
pools (DPBPs), I/O Portals (DPIOs) and concentrators (DPCONs).
The starting point is the SDK 2.0 GA 1703 driver, plus the following
changes:
- removed busy poll code (integrated into netstack)
- minor signature change for dpaa2_eth_get_stats
- debugfs support removed (contained into different patch)
- Tx queues registered to XPS
- max MTU handling changed according to netdevice update
- dropped dpaa2_sg_{le_to_cpu/cpu_to_le} - no longer needed
(BIG_ENDIAN support not tested yet)
This is a squashed commit containing the contributions of the following
authors:
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@nxp.com>
Signed-off-by: Alexandru Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Haiying Wang <haiying.wang@nxp.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Itai Katz <itai.katz@freescale.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Implement the rest of the build/parse APIs in order to support full
DPAA2 Ethernet driver functionality.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Add the command build/parse APIs for operating on DPNI objects through
the DPAA2 Management Complex.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
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Add a README file describing the driver architecture, components
and I/O interface.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
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Current fsl-mc driver had been upgraded to support mc v10.2.0.
This patch is to update flib files of dpaa2-rtc to v10.2.0, otherwise
there would be compile issue.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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Update dprtc command ids in order to work with MC 10.0.0.
The binary interface compatibility is maintained with MC v9.x.
Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
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This patch is to add DPAA2 RTC driver which is PTP 1588 clock
driver for DPAA2. The driver registers itself with class driver
for using the PTP hardware clock infrastructure. Together with
the SO_TIMESTAMPING socket options, this presents a standardized
method for developing PTP user space programs, synchronizing
Linux with external clocks, and using the ancillary features of
PTP hardware clocks.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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This patch adds Layerscape MC and AIOP console support.
Squashed commits from SDK 2.0.x:
- Virtual MC console for Linux
- ls2-console: Improve LS2 console driver
- Fixes in LS2 console driver for AIOP log messages
- ls2-console: fixes for mc console access
- ls2-console: updates w.r.t MC version 9.0.3
- ls2-console: updates w.r.t MC version 9.0.4
- ls2-console: updates for AIOP console
- ls1088: MC console dump crashes in Linux
Initial patches by:
- Roy Pledge <Roy.Pledge@freescale.com>
- Stuart Yoder <stuart.yoder@freescale.com>
- Murali K <muralik@freescale.com>
- Catalin Horghidan <catalin.horghidan@nxp.com>
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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Port carrier synchronization should be performed when the switch ports are
enabled, not at probe, to avoid miss-configuration.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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Checks prevented link restoration when endpoint flipped link state.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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Improve ethtool support by adding ops for:
- driver info
- link status
- auto-negotiation setting and result
- speed setting and result
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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Fix compilation warnings triggered by '-Wsign-compare' flag.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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Introducing the DPAA2 L2 Switch driver from commits on sdk-v2.0.x
branch.
The switch and all ports are presented as network interfaces in Linux
(swX and swXpY). I/O functionality is not available on these interfaces,
they are exclusively for management.
This patch contains the following patches squashed together:
dpaa2-ethsw: Ethernet Switch driver
dpaa2-ethsw: Update dpsw binary interface to 7.0
dpaa2-ethsw: Add object version check
dpaa2-ethsw: Fix interrupt handling
staging: dpaa2-ethsw: update dpsw command ids set for MC v10.x
dpaa2-ethsw: replace uint32_t with u32 type
dpaa2-ethsw: replace uint16_t by u16 type
dpaa2-ethsw: replace uint8_t by u8 type
dpaa2-ethsw: replace uint64_t by u64 type
dpaa2-ethsw: uprev binary interface to v8.0
dpaa2-ethsw: move comments from declaration to definition
dpaa2-ethsw: misc whitespace cleanup
dpaa2-ethsw: align block comments properly
dpaa2-ethsw: convert mc command build/parse to use C structs
dpaa2-ethsw: properly align function comments
dpaa2-ethsw: Add jumbo frames support
These patches were initially submitted by:
Alex Marginean <alexandru.marginean@freescale.com>
J. German Rivera <German.Rivera@freescale.com>
Stuart Yoder <stuart.yoder@freescale.com>
Razvan Stefanescu <razvan.stefanescu@freescale.com>
Catalin Horghidan <catalin.horghidan@nxp.com>
Ioana Ciornei <ioana.ciornei@nxp.com>
Updated FLIBs to the latest available for MC 10.x and solved checkpatch
issues. Also removed DPAA2 Ethernet dependency and made changes required
by updating kernel to 4.11.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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Improve ethtool support by adding ops for:
- driver info
- link status
- auto-negotiation setting and result
- speed setting and result
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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Fix warnings triggered by '-Wsign-compare' flag.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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This contains the following patches migrated from sdk-v2.0.x branch:
dpaa2-evb: Added Edge Virtual Bridge driver
dpaa2-evb: Add VLAN_8021Q dependency
dpaa2-evb: Update dpdmux binary interface to 5.0
dpaa2-evb: Add support to set max frame length.
dpaa2-evb: Fix interrupt handling
dpaa2-evb: Add object version check
staging: dpaa2-evb: update dpdmux command ids set for MC v10.x
dpaa2-evb: replace uintX_t types by kernel preferred kernel uX types
dpaa2-evb: uprev binary interface to v6.0
dpaa2-evb: move comments from declaration to definition
dpaa2-evb: delete extraneous tabs
dpaa2-evb: align function parameters
dpaa2-evb: convert mc command build/parse to use C structs
Initial patches have been signed-off by:
Alex Marginean <alexandru.marginean@freescale.com>
J. German Rivera <German.Rivera@freescale.com>
Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
Mihaela Panescu <mihaela.panescu@freescale.com>
Catalin Horghidan <catalin.horghidan@nxp.com>
Ioana Ciornei <ioana.ciornei@nxp.com>
Stuart Yoder <stuart.yoder@freescale.com>
Updated FLIBs to the latest available for MC 10.x and fixed check-patch
warnings. Updated maintainer to myself and removed the DPAA2 Ethernet
dependency.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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Signed-off-by: Constantin Tudor <constantin.tudor@nxp.com>
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Introduce the DPAA2 mac driver, which manages Datapath
Media Access Control (DPMAC) objects discovered on the
MC bus.
This driver works as a proxy between phylib including phy
drivers and the Management Complex firmware. It receives
updates on link state changes from PHY lib and forwards
them to the Management Complex and receives interrupts
from the Management Complex whenever a request is made to
change the link state.
This is a squashed commit containing contributions of the
following owners:
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Itai Katz <itai.katz@freescale.com>
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Add the command build/parse APIs for operating on DPMAC
objects through the DPAA2 Management Complex.
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Add support for using the caam/jr backend on DPAA2-based SoCs.
These have some particularities we have to account for:
-HW S/G format is different
-Management Complex (MC) firmware initializes / manages (partially)
the CAAM block: MCFGR, QI enablement in QICTL, RNG
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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caam/qi driver fails to compile when CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y.
Fix it by making the offending local per_cpu variable global.
Fixes: 67c2315def06c ("crypto: caam - add Queue Interface (QI) backend support")
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Fix caam/qi2 driver compilation when DEBUG is enabled
(CRYPTO_DEV_FSL_CAAM_DEBUG=y):
drivers/crypto/caam/caamalg_qi2.c: In function 'aead_setkey':
drivers/crypto/caam/caamalg_qi2.c:528:38: error: 'key_in' undeclared
(first use in this function)
DUMP_PREFIX_ADDRESS, 16, 4, key_in, keylen, 1);
^
drivers/crypto/caam/caamalg_qi2.c:528:38: note: each undeclared
identifier is reported only once for each function it appears in
drivers/crypto/caam/caamalg_qi2.c: In function 'aead_encrypt_done':
drivers/crypto/caam/caamalg_qi2.c:1573:61: error: 'err' undeclared
(first use in this function)
dev_err(ctx->dev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
^
drivers/crypto/caam/caamalg_qi2.c: In function 'aead_decrypt_done':
drivers/crypto/caam/caamalg_qi2.c:1598:61: error: 'err' undeclared
(first use in this function)
dev_err(ctx->dev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
^
drivers/crypto/caam/caamalg_qi2.c: In function 'ablkcipher_done':
drivers/crypto/caam/caamalg_qi2.c:1704:61: error: 'err' undeclared
(first use in this function)
dev_err(ctx->dev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
^
Fixes: 21806c254f4a ("crypto: caam/qi2 - add DPAA2-CAAM driver")
Fixes: 3304cccd4732 ("crypto: caam/qi2 - add ablkcipher algorithms")
Reported-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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caam/qi driver does not compile when DEBUG is enabled
(CRYPTO_DEV_FSL_CAAM_DEBUG=y):
drivers/crypto/caam/caamalg_qi.c: In function 'ablkcipher_done':
drivers/crypto/caam/caamalg_qi.c:794:2: error: implicit declaration of function 'dbg_dump_sg' [-Werror=implicit-function-declaration]
dbg_dump_sg(KERN_ERR, "dst @" __stringify(__LINE__)": ",
Since dbg_dump_sg() is shared between caam/jr and caam/qi, move it
in a shared location and export it.
At the same time:
-reduce ifdeferry by providing a no-op implementation for !DEBUG case
-rename it to caam_dump_sg() to be consistent in terms of
exported symbols namespace (caam_*)
Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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SELF condition has no meaning for the SERIAL sharing since the jobs
are executed in the same DECO.
Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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CAAM platform backend has been updated to automatically detect
whether it is running on an i.MX platform or not.
Add a dummy caam_imx symbol in caam/qi2 such that I/O accessors
work correctly.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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When built using multi_v7_defconfig, driver does not work on LS1021A:
[...]
caam 1700000.crypto: can't identify CAAM ipg clk: -2
caam: probe of 1700000.crypto failed with error -2
[...]
It turns out we have to detect at runtime whether driver is running
on an i.MX platform or not.
Fixes: 6c3af9559352 ("crypto: caam - add support for LS1021A")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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CRYPTO_DEV_FSL_CAAM has been renamed to
CRYPTO_DEV_FSL_CAAM_PLAT_BACKEND to accommodate for caam/jr, caam/qi
and caam/qi2 drivers sharing error.{c,h}.
However, the change is incomplete, since CRYPTO_DEV_FSL_CAAM should have
been renamed also in defconfig files.
Fix this by reverting the rename of CRYPTO_DEV_FSL_CAAM (which avoids
defconfig files updates):
-s/CRYPTO_DEV_FSL_CAAM/CRYPTO_DEV_FSL_CAAM_COMMON
-s/CRYPTO_DEV_FSL_CAAM_PLAT_BACKEND/CRYPTO_DEV_FSL_CAAM
Fixes: 21806c254f4a ("crypto: caam/qi2 - add DPAA2-CAAM driver")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Add support to submit the following ablkcipher algorithms
via the DPSECI backend:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Add support to translate error codes returned by QI v2, i.e.
Queue Interface present on DataPath Acceleration Architecture
v2 (DPAA2).
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Add the low-level API that allows to manage DPSECI DPAA2 objects
that sit on the Management Complex (MC) fsl-mc bus.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Update gcm(aes) descriptors (generic, rfc4106 and rfc4543) such that
they would also work when submitted via the QI interface.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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CAAM RSA private key may have either of three representations.
1. The first representation consists of the pair (n, d), where the
components have the following meanings:
n the RSA modulus
d the RSA private exponent
2. The second representation consists of the triplet (p, q, d), where
the
components have the following meanings:
p the first prime factor of the RSA modulus n
q the second prime factor of the RSA modulus n
d the RSA private exponent
3. The third representation consists of the quintuple (p, q, dP, dQ,
qInv),
where the components have the following meanings:
p the first prime factor of the RSA modulus n
q the second prime factor of the RSA modulus n
dP the first factors's CRT exponent
dQ the second factors's CRT exponent
qInv the (first) CRT coefficient
The benefit of using the third or the second key form is lower
computational cost for the decryption and signature operations.
This patch adds support for the third RSA private key
representations and extends caampkc to use the fastest key when all
related components are present in the private key.
Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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CAAM RSA private key may have either of three representations.
1. The first representation consists of the pair (n, d), where the
components have the following meanings:
n the RSA modulus
d the RSA private exponent
2. The second representation consists of the triplet (p, q, d), where
the
components have the following meanings:
p the first prime factor of the RSA modulus n
q the second prime factor of the RSA modulus n
d the RSA private exponent
3. The third representation consists of the quintuple (p, q, dP, dQ,
qInv),
where the components have the following meanings:
p the first prime factor of the RSA modulus n
q the second prime factor of the RSA modulus n
dP the first factors's CRT exponent
dQ the second factors's CRT exponent
qInv the (first) CRT coefficient
The benefit of using the third or the second key form is lower
computational cost for the decryption and signature operations.
This patch adds support for the second RSA private key
representation.
Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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This function will be used into further patches.
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
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The function returns NULL if buf is composed only of zeros.
Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
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The way Job Ring platform devices are created and released does not
allow for multiple create-release cycles.
JR0 Platform device creation error
JR0 Platform device creation error
caam 2100000.caam: no queues configured, terminating
caam: probe of 2100000.caam failed with error -12
The reason is that platform devices are created for each job ring:
for_each_available_child_of_node(nprop, np)
if (of_device_is_compatible(np, "fsl,sec-v4.0-job-ring") ||
of_device_is_compatible(np, "fsl,sec4.0-job-ring")) {
ctrlpriv->jrpdev[ring] =
of_platform_device_create(np, NULL, dev);
which sets OF_POPULATED on the device node, but then it cleans these up:
/* Remove platform devices for JobRs */
for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
if (ctrlpriv->jrpdev[ring])
of_device_unregister(ctrlpriv->jrpdev[ring]);
}
which leaves OF_POPULATED set.
Use of_platform_populate / of_platform_depopulate instead.
This allows for a bit of driver clean-up, jrpdev is no longer needed.
Logic changes a bit too:
-exit in case of_platform_populate fails, since currently even QI backend
depends on JR; true, we no longer support the case when "some" of the JR
DT nodes are incorrect
-when cleaning up, caam_remove() would also depopulate RTIC in case
it would have been populated somewhere else - not the case for now
Cc: <stable@vger.kernel.org>
Fixes: 313ea293e9c4d ("crypto: caam - Add Platform driver for Job Ring")
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Suggested-by: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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CAAM engine supports two interfaces for crypto job submission:
-job ring interface - already existing caam/jr driver
-Queue Interface (QI) - caam/qi driver added in current patch
QI is present in CAAM engines found on DPAA platforms.
QI gets its I/O (frame descriptors) from QMan (Queue Manager) queues.
This patch adds a platform device for accessing CAAM's queue interface.
The requests are submitted to CAAM using one frame queue per
cryptographic context. Each crypto context has one shared descriptor.
This shared descriptor is attached to frame queue associated with
corresponding driver context using context_a.
The driver hides the mechanics of FQ creation, initialisation from its
applications. Each cryptographic context needs to be associated with
driver context which houses the FQ to be used to transport the job to
CAAM. The driver provides API for:
(a) Context creation
(b) Job submission
(c) Context deletion
(d) Congestion indication - whether path to/from CAAM is congested
The driver supports affining its context to a particular CPU.
This means that any responses from CAAM for the context in question
would arrive at the given CPU. This helps in implementing one CPU
per packet round trip in IPsec application.
The driver processes CAAM responses under NAPI contexts.
NAPI contexts are instantiated only on cores with affined portals since
only cores having their own portal can receive responses from DQRR.
The responses from CAAM for all cryptographic contexts ride on a fixed
set of FQs. We use one response FQ per portal owning core. The response
FQ is configured in each core's and thus portal's dedicated channel.
This gives the flexibility to direct CAAM's responses for a crypto
context on a given core.
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Fix typos and add the following to the scripts/spelling.txt:
deintializing||deinitializing
deintialize||deinitialize
deintialized||deinitialized
Link: http://lkml.kernel.org/r/1481573103-11329-28-git-send-email-yamada.masahiro@socionext.com
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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If we register the DMA API debug notification chain to
receive platform bus events:
dma_debug_add_bus(&platform_bus_type);
we start receiving warnings after a simple test like "modprobe caam_jr &&
modprobe caamhash && modprobe -r caamhash && modprobe -r caam_jr":
platform ffe301000.jr: DMA-API: device driver has pending DMA allocations while released from device [count=1938]
One of leaked entries details: [device address=0x0000000173fda090] [size=63 bytes] [mapped with DMA_TO_DEVICE] [mapped as single]
It turns out there are several issues with handling buf_dma (mapping of buffer
holding the previous chunk smaller than hash block size):
-detection of buf_dma mapping failure occurs too late, after a job descriptor
using that value has been submitted for execution
-dma mapping leak - unmapping is not performed in all places: for e.g.
in ahash_export or in most ahash_fin* callbacks (due to current back-to-back
implementation of buf_dma unmapping/mapping)
Fix these by:
-calling dma_mapping_error() on buf_dma right after the mapping and providing
an error code if needed
-unmapping buf_dma during the "job done" (ahash_done_*) callbacks
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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caamhash uses double buffering for holding previous/current
and next chunks (data smaller than block size) to be hashed.
Add (inline) functions to abstract this mechanism.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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setkey() callback may be invoked multiple times for the same tfm.
In this case, DMA API leaks are caused by shared descriptors
(and key for caamalg) being mapped several times and unmapped only once.
Fix this by performing mapping / unmapping only in crypto algorithm's
cra_init() / cra_exit() callbacks and sync_for_device in the setkey()
tfm callback.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Shared descriptors for hash algorithms are small enough
for (split) keys to be inlined in all cases.
Since driver already does this, all what's left is to remove
unused ctx->key_dma.
Fixes: 045e36780f115 ("crypto: caam - ahash hmac support")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Replace internal sg_count() function and the convoluted logic
around it with the standard sg_nents_for_len() function.
src_nents, dst_nents now hold the number of SW S/G entries,
instead of the HW S/G table entries.
With this change, null (zero length) input data for AEAD case
needs to be handled in a visible way. req->src is no longer
(un)mapped, pointer address is set to 0 in SEQ IN PTR command.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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sg_count() internally calls sg_nents_for_len(), which could fail
in case the required number of bytes is larger than the total
bytes in the S/G.
Thus, add checks to validate the input.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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HW S/G generation does not work properly when the following conditions
are met:
-src == dst
-src/dst is S/G
-IV is right before (contiguous with) the first src/dst S/G entry
since "iv_contig" is set to true (iv_contig is a misnomer here and
it actually refers to the whole output being contiguous)
Fix this by setting dst S/G nents equal to src S/G nents, instead of
leaving it set to init value (0).
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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