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2017-12-12Merge branch 'linux-4.9-nxp' into linux-4.9 on Dec. 12, 2017Xie Xiaobo
Signed-off-by: Xiaobo Xie <xiaobo.xie@nxp.com>
2017-12-12clk: qoriq: add more divider clocks supportYuantian Tang
More divider clocks are needed for IP use. So enlarge the PLL divider array to accommodate more divider clocks. Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
2017-12-12i2c: imx: implement bus recovery with gpio for LayerscapeZhang Ying-22455
Based on the I2C specification, if the data line (SDA) is stuck low, the master should send nine clock pulses. The I2C slave device that held the bus low should release it sometime within those nine clocks. Because pinctrl is not supported on Layerscape, current bus recovery is not avalible for Layerscape. This patch uses an open drain GPIO pin to connect to the IICx_SCL to drive nine clock pulses to unlock the I2C bus. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-12-12gianfar: Disable EEE autoneg by defaultClaudiu Manoil
This controller does not support EEE, but it may connect to a PHY which supports EEE and advertises EEE by default, while its link partner also advertises EEE. If this happens, the PHY enters low power mode when the traffic rate is low and causes packet loss. This patch disables EEE advertisement by default for any PHY that gianfar connects to, to prevent the above unwanted outcome. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Tested-by: Yangbo Lu <Yangbo.lu@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-12-12Merge branch 'linux-4.9-nxp' into linux-4.9 on Dec. 8, 2017Xie Xiaobo
Signed-off-by: Xiaobo Xie <xiaobo.xie@nxp.com>
2017-12-12Merge Linaro linux 4.9.62 into linux-4.9Xie Xiaobo
Signed-off-by: Xiaobo Xie <xiaobo.xie@nxp.com>
2017-12-12staging: fsl_ppfe/eth: Avoid packet drop at TMU queuesKavi Akhila-B46177
Added flow control between TMU queues and PFE Linux driver, based on TMU credits availability. Added tx_qos module parameter to control this behavior. Use queue-0 as default queue to transmit packets. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Akhila Kavi <akhila.kavi@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-12-12staging: fsl_ppfe/eth: add function to update tmu creditsCalvin Johnson
__hif_lib_update_credit function is used to update the tmu credits. If tx_qos is set, tmu credit is updated based on the number of packets transmitted by tmu. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-12-12staging: fsl_ppfe/eth: Disable autonegotiation for 2.5G SGMIIBhaskar Upadhaya
PCS initialization sequence for 2.5G SGMII interface governs auto negotiation to be in disabled mode Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
2017-12-12staging: fsl_ppfe/eth: Enable PFE in clause 45 modeBhaskar Upadhaya
when we opearate in clause 45 mode, we need to call the function get_phy_device() with its 3rd argument as "true" and then the resultant phy device needs to be register with phy layer via phy_device_register() Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
2017-12-12net: ethernet: Rename PHY_INTERFACE_MODE_SGMII_2500Bhaskar Upadhaya
Rename PHY_INTERFACE_MODE_SGMII_2500 to PHY_INTERFACE_MODE_2500SGMII Convention is to put the number(2500) first and then the interface mode(SGMII) Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
2017-12-12sdk_dpaa: ceetm: increment the interface's ern counters when neededCamelia Groza
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
2017-12-12sdk_dpaa: ceetm: coding style fixes and added commentsCamelia Groza
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
2017-12-12sdk_dpaa: ceetm: stop transmitting frames when the CQ is congestedCamelia Groza
When the egress CQ is congested, drop the frames instead of enqueueing them. This is more efficient than enqueueing and receiving them back on the ERN queue. We also can't stop the netdev queues because that would affect all the CQs and would hinder prioritization. Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
2017-12-12sdk_dpaa: ceetm: add independent CEETM congestion thresholdsCamelia Groza
Configure the CEETM egress congestion thresholds independently from the default Ethernet driver's Work Queues. Allow the user to edit the thresholds through menuconfig. Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
2017-12-12usb: ehci-fsl: Fix compilation error when enable EHCI for ls1012a.Ran Wang
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2017-12-12crypto: caam/qi - fix FD congestion weightHoria Geantă
When caam_qi_enqueue() is called, compound FD has already been swapped to CAAM endianness, thus accesing it ("length" field in this case) by CPU has to be done by first unswapping. Fixes: ca982fae08a2 ("crypto: caam/qi - use QBMan (NXP) SDK driver") Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12staging: fsl-dpaa2/mac: Free phydev on unbindBogdan Purcareata
Stop polling and unregister / disconnect the phydev structure on DPAA2 mac driver unbind. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/mac: Cleanup codeBogdan Purcareata
- move dpaa2_mac_open and dpaa2_mac_stop out of CONFIG_FSL_DPAA2_MAC_NETDEVS, since their implementation is necessary regardless of it - reorder ndo ops to match function implementation order - update comment to describe the phy connection mode that's to be used - it no longer depends on DPC, but on the device tree Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/mac: Remove redundant freeBogdan Purcareata
free_netdev (put_device) already handles freeing the private data structure, and KASAN will complain due to a free after free if we explicitly do the same afterwards. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Add DCB KconfigIoana Radulescu
Add a Kconfig option for enabling Data Center Bridging (DCB) support in the Ethernet driver. This is needed for priority flow control support. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
2017-12-12mmc: sdhci-of-esdhc: fix the mmc error after sleep on ls1046ardbyinbo.zhu
When system wakes up from sleep on ls1046ardb, the SD operation fails with mmc error messages since ESDHC_TB_EN bit couldn’t be cleaned by eSDHC_SYSCTL[RSTA]. It's proper to clean this bit in esdhc_reset() rather than in probe. Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-12-12crypto: caam/qi2 - fix descriptors, keys DMA mapping directionHoria Geantă
The replacement of MDHA split key generation with DKP has the side effect of the crypto engine writing the authentication key, and thus the DMA mapping direction for the buffer holding the key has to change from DMA_TO_DEVICE to DMA_BIDIRECTIONAL. There are two cases: -key is inlined in descriptor - descriptor buffer mapping changes -key is referenced - key buffer mapping changes Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam/qi2 - fix DMA API leaks for multiple setkey() callsHoria Geantă
setkey() callback may be invoked multiple times for the same tfm. In this case, DMA API leaks are caused by shared descriptors and keys being mapped several times and unmapped only once. Fix this by performing mapping / unmapping only in crypto algorithm's cra_init() / cra_exit() callbacks and sync_for_device in the setkey() tfm callback. This is similar to commit bbf2234494af "crypto: caam - fix DMA API leaks for multiple setkey() calls" and also to caam/qi2 ahash implementation. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam/qi2 - move flc_dma out of caam_flc structHoria Geantă
Move flc_dma member (which is accessed only by GPP) out of the caam_flc structure, which is DMA mapped and intended for crypto engine consumption. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam/qi2 - don't copy ablkcipher keysHoria Geantă
ablkcipher (xts included) algorithms have shared descriptors with immediate (inline) keys. Accordingly, there is no need to: -copy user-provided keys in ctx->key -DMA map the keys Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12crypto: caam - constify key dataHoria Geantă
Key data is not modified, it is copied in the shared descriptor. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2017-12-12dma: fsl-qdma: add qDMA big endian supportWen He
currently big endian was not supported on qdma,update the dma descriptor structure to support big endian mode. Signed-off-by: Wen He <wen.he_1@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: defer probe if no mc portal is foundNipun Gupta
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Remove unused FD fieldIoana Radulescu
According to the hardware ArchDef, the PTV1 field in FD[CTRL] is ignored by WRIOP, so setting it for Tx FDs is pointless. Remove all references to it from the code. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Use napi_consume_skb()Ioana Radulescu
While in NAPI context, free skbs by calling napi_consume_skb() instead of dev_kfree_skb(), to take advantage of the bulk freeing mechanism. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Don't yield the cpu unless necessaryIoana Radulescu
When releasing buffers to the hardware pool, don't call cpu_relax() unless we are actually waiting for the QBMan portal to finish the previous command. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Don't include HH_DATA_MOD in needed_headroomBogdan Purcareata
The network stack will take care to reserve space for HH_DATA_MOD when building the skb, so there's no need to account for it in the netdevice needed headroom. Based on that, decrease the frame buffer headroom for ingress frames. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Update Rx headroom computationBogdan Purcareata
Instead of the old opaque value, define the Rx buffer headroom size based on other frame buffer fields, in accordance to how we expect them to be configured by MC. Based on DPNI_BUF_LAYOUT_OPT_TIMESTAMP, MC will enable an additional field in the Tx hardware annotation area, increasing its size to 128. Update the driver value to reflect this. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Don't account SWA in tx_data_offsetBogdan Purcareata
When configuring the Tx buffer layout, the software annotation size is mentioned, and MC accounts for it when configuring the frame tx_data_offset. No need to handle it in the driver as well. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Add buffer count to channel statsBogdan Purcareata
Since adding support for multiple buffer thresholds (taildrop, flow control pause frames, PFC pause frames), it's useful to have the per-channel buffer count available in the debug stats. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Fix NAPI initializationIoana Radulescu
Make sure the NAPI instances are enabled only after all other device initialization is done, to avoid accessing uninit vars. Mirror that change on device remove routine. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Account for Rx FD buffers on error pathIoana Radulescu
On Rx path, if we fail to build an skb from the incoming FD, we still need to update the channel buffer count accordingly, otherwise we risk depleting the pool while the software counter still sees available buffers. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Fix potential endless loopIoana Radulescu
We incorrectly assumed that dpaa2_io_release() can only return -EBUSY as an error code, when in fact it can also fail in case some of its arguments don't have valid values. Make sure we only retry the operation while the portal is busy and abort for all other error cases, otherwise we risk entering an endless loop. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
2017-12-12usb: fsl: Fix compilation errorRamneek Mehresh
Commit 42a1431068088 in the LSDK 4.9 kernel("usb: host: Add support to add/remove usb host driver") introduced the compilation error. We fix it now. Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2017-12-12fsl/usb: Workarourd for USB erratum-A005697Ramneek Mehresh
As per USB specification, in the Suspend state, the status bit does not change until the port is suspended. However, there may be a delay in suspending a port if there is a transaction currently in progress on the bus. In the USBDR controller, the PORTSCx[SUSP] bit changes immediately when the application sets it and not when the port is actually suspended Workaround for this issue involves waiting for a minimum of 10ms to allow the controller to go into SUSPEND state before proceeding ahead Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Change-Id: I8d20619d7d62afc12981c2f913c3d3ec735f7e64 Reviewed-on: http://git.am.freescale.net:8181/3996 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Aggrwal Poonam-B10812 <Poonam.Aggrwal@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2017-12-12PCI: Do not disregard parent resources starting at 0x0Ard Biesheuvel
Commit f44116ae8818 ("PCI: Remove pci_find_parent_resource() use for allocation") updated the logic that iterates over all bus resources and compares them to a given resource, in order to decide whether one is the parent of the latter. This change inadvertently causes pci_find_parent_resource() to disregard resources starting at address 0x0, resulting in an error such as the one below on ARM systems whose I/O window starts at 0x0. pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff window] pci_bus 0000:00: root bus resource [io 0x0000-0xffff window] pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff window] pci_bus 0000:00: root bus resource [bus 00-0f] pci 0000:00:01.0: PCI bridge to [bus 01] pci 0000:00:02.0: PCI bridge to [bus 02] pci 0000:00:03.0: PCI bridge to [bus 03] pci 0000:00:03.0: can't claim BAR 13 [io 0x0000-0x0fff]: no compatible bridge window pci 0000:03:01.0: can't claim BAR 0 [io 0x0000-0x001f]: no compatible bridge window While this never happens on x86, it is perfectly legal in general for a PCI MMIO or IO window to start at address 0x0, and it was supported in the code before commit f44116ae8818. Drop the test for res->start != 0; resource_contains() already checks whether [start, end) completely covers the resource, and so it should be redundant. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-12-12staging: fsl-dpaa2/eth: Fix compiling errors for backporting dash-ltsGuanhua Gao
Fix compiling errors for backporting dash-lts. Signed-off-by: Guanhua Gao <guanhua.gao>
2017-12-12staging: fsl-dpaa2/eth: Get PFC config from HWBogdan Purcareata
The dpaa2-eth PFC configuration is kept in a private driver variable. When getting PFC configuration via ieee_getpfc, get it straight from the Management Complex based on the Rx congestion notification setup. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Add dpni_get_congestion_notif APIBogdan Purcareata
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Configure PFC in MCBogdan Purcareata
Implement the following: - Enable PFC in DPNI options. - Set queue taildrops for priorities (traffic classes) that are not PFC enabled (pause frames are not sent in case of congestion). Since the buffer pool is shared, we can't risk other traffic to consume all available buffers. - Configure Rx congestion notifications for PFC enabled priorities. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Refactor fq taildrop setupBogdan Purcareata
With the introduction of PFC support, there are multiple ways taildrop is configured, based on the DPNI pause frame configuration: - no pause frames - per-queue taildrop thresholds. - pause frames - no taildrop thresholds (pause frames sent based on buffer depletion). - PFC pause frames - per-group (traffic class) taildrop thresholds for non-PFC enabled priorities (pause frames sent based on Rx congestion notifications). Refactor the fq taildrop setup area. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Add ingress classificationBogdan Purcareata
Configure static ingress classification based on VLAN PCP, required by PFC. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Add DCB supportBogdan Purcareata
Add initial DCB ops in the DPAA2 Ethernet driver. Currently they are dummy calls. Tested integration with userspace lldpad: - lldpad daemon running - bring interface up - lldptool -L -i niX adminStatus=rxtx - lldptool -T -i niX -V PFC -c enabled={prio comma separated list} - lldptool -t -i niX -V PFC -c enabled Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-12-12staging: fsl-dpaa2/eth: Switch to v2 dpni_set_pools cmdBogdan Purcareata
The v2 dpni_set_pools command format allows sending an additional parameter, the priority mask for the buffer pool. This can be used to configure multiple buffer pools for the same dpni, to serve different priorities. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>