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2016-08-23drm/radeon: remove dead code, si_mc_load_microcode (v2)Heinrich Schuchardt
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23drm/radeon/cik: remove dead code (v2)Heinrich Schuchardt
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23drm/amd/powerplay: avoid NULL dereference, cz_hwmgr.cHeinrich Schuchardt
if (a == NULL || a->b == NULL) leads to a NULL pointer dereference if a == NULL. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23drm/amd/powerplay: avoid NULL pointer dereferenceHeinrich Schuchardt
if (a == NULL || a->b == NULL) leads to a NULL pointer dereference if a == NULL. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23drm/amdgpu/gmc8: remove dead code (v2)Heinrich Schuchardt
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23drm/amdgpu/gmc7: remove dead code (v2)Heinrich Schuchardt
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23drm/amdgpu: Fix indentation in dce_v8_0_audio_write_sad_regs()Alexandre Demers
Fixed indentation for readability. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: Use correct mask in dce_v8_0_afmt_setmode() and fix comment typos.Alexandre Demers
We were using the same mask twice. Looking at radeon, it seems we should be using HDMI_AVI_INFO_CONT instead as the second mask. Being there, fix typos in comments and improved readability. I haven't looked at other DCEs, the mask may also be wrong for them. Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: cleanup amdgpu_vm_bo_update paramsChristian König
Make it more obvious what we are doing here. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: stop adding dummy entry in amdgpu_ttm_placement_initChristian König
AMDGPU_GEM_CREATE_NO_CPU_ACCESS and AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED are obviously mutual exclusive. So stop adding a dummy entry without effect when both are specified. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: cleanup amdgpu_ttm_placement_initChristian König
Make it more clear what this function does. No intendet functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: fix lru size grouping v2Christian König
Adding a BO can make it the insertion point for larger sizes as well. v2: add a comment about the guard structure. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amd/powerplay: Tidy up cz_hwmgr.cTom St Denis
Clean up whitespace and formatting. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: add AMDGPU_INFO_NUM_EVICTIONSMarek Olšák
For profiling. v2: really bump the minor version Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: recover vram bo from shadow after gpu reset V2Chunming Zhou
V2: 1. don't directly submit to many jobs at the same time. 2. delete unrelated printk. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: link all shadow bo V2Chunming Zhou
V2: 1. use mutex instead of spinlock for shadow list, since its process could sleep. 2. move list_del to bo destroy phase. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: update pt shadow while updating pt V2Chunming Zhou
V2: move shadow parameter to amdgpu_pte_update_params. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: minutemaidpark@hotmail.com Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: update pd shadow while updating pd V2Chunming Zhou
V2: Checking if shadow is valid. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: sync bo and shadow V3Chunming Zhou
Use shadow flag to judge which direction to sync. V2: Don't need bo pin, so remove it. V3: 1. Split to two functions, one is backup_to_shadow, another is restore_from_shadow. 2. Clean up previous shadow direction difinitions. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22drm/amdgpu: add direct submision option for copy_bufferChunming Zhou
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19drm/amdgpu: add need backup function V2Chunming Zhou
V2: add checking if need backup in amdgpu_bo_create. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19drm/amd/amdgpu: S3 resumed failed after 4-5 times loopjimqu
Phenomenon: software hang when device resume back, read UVD fence is 0xffffffff and read pcie pid is 0xffff. The issue is caused by VCE reset when update cg setting. according to HW programming guide, adjust update VCE cg sequence. The patch apply to VCE2.0. Signed-off-by: JimQu <Jim.Qu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19drm/amdgpu: use domain's gpu_offset for start addrFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19drm/amdgpu: update gart_pin_size only if the bo is pined to GTTFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19drm/amdgpu: check domain sanity in amdgpu_bo_pin_restricted()Flora Cui
abort if the bo is pined to other domain already Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19amdgpu: move ttm stuff to amdgpu_ttm.hFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19drm/amd/powerplay: enable power containment features for tonga.Rex Zhu
v2: fix build error introduced when fix code style problems. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-17drm/amd/amdgpu: Add more debugfs config dataTom St Denis
Adds family and external_rev_id to config data Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-17drm/amdgpu: Hardcode virtual DCE vblank / scanout position return valuesEmily Deng
For virtual display feature, by hardcoding 0 for the vblank counter and -EINVAL for the scanout position return value, we signal to the core DRM code that there are no hardware counters we can use for these. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amd/amdgpu: Add more config data for debugfsTom St Denis
Adds rev_id as well as cg/pg flags to help debug runtime. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: fix coding style in amdgpu_object.cChristian König
Just a few 80 chars problems. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: add function pointer to the pte_update_paramsChristian König
Remember what function to call while planning the commands instead of figuring it our later on. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: stop splitting PTE commands into smaller onesChristian König
It doesn't make much sense to create bigger commands first which we then need to split into smaller one again. Just make sure the commands we create aren't to big in the first place. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: remove AMDGPU_VM_NO_FLUSH defineChristian König
Not used any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: cleanup the write_pte implementationsChristian König
We don't need the gart mapping handling here any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: remove pages_addr handling from the VM codeChristian König
Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: write PTEs directly into the IB.Christian König
Write the PTEs at the end of the IB instead of directly into the SDMA commands. This can save quite some CPU cycles building the entries. This doesn't change the DW estimation because PTEs where embedded into the IB before as well. It just moves them to the end of the IB. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: add shadow flag V2Chunming Zhou
Indicate if need to sync between bo and shadow, where sync to where. V2: Rename to backup_shadow Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: allocate shadow for pd/pt bo V2Chunming Zhou
The pd/pt shadow bo will be used to backup page table, when gpu reset happens, we can restore the page table by them. V2: Free shadow bo. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: validate shadow as well when validating boChunming Zhou
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amdgpu: add shadow bo support V2Chunming Zhou
shadow bo is the shadow of a bo, which is always in GTT, which can be used to backup the original bo. V2: reference shadow parent, shadow bo will be freed by who allocted him. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amd/amdgpu: UVD v6 register cleanupTom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amd/amdgpu: VCE v2 register cleanupTom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amd/amdgpu: add mutex in check_soft for VCE v3Tom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16drm/amd/amdgpu: Cleanup register access in VCE v3Tom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-10Fixing copy-paste errors and removing unneeded newlinesAlexandre Demers
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-10drm: Add DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags v2Michel Dänzer
These flags allow userspace to explicitly specify the target vertical blank period when a flip should take effect. v2: * Add new struct drm_mode_crtc_page_flip_target instead of modifying struct drm_mode_crtc_page_flip, to make sure all existing userspace code keeps compiling (Daniel Vetter) Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-10drm/radeon: Set MASTER_UPDATE_MODE to 0 againMichel Dänzer
With the previous change, it's safe to let page flips take effect anytime during a vertical blank period. This can avoid delaying a flip by a frame in some cases where we get to radeon_flip_work_func -> adev->mode_info.funcs->page_flip during a vertical blank period. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-10drm/radeon: Provide page_flip_target hookMichel Dänzer
Now we can program a flip during a vertical blank period, if it's the one targeted by the flip (or a later one). This allows simplifying radeon_flip_work_func considerably. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-10drm/amdgpu: Set MASTER_UPDATE_MODE to 0 againMichel Dänzer
With the previous change, it's safe to let page flips take effect anytime during a vertical blank period. This can avoid delaying a flip by a frame in some cases where we get to amdgpu_flip_work_func -> adev->mode_info.funcs->page_flip during a vertical blank period. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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