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mipsregs.h
Age
Commit message (
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Author
2007-10-11
[MIPS] checkfiles: Fix "need space after that ','" errors.
Ralf Baechle
2007-07-12
[MIPS] Change names of local variables to silence sparse (part 2)
Atsushi Nemoto
2007-07-10
[MIPS] PMC MSP71xx mips common
Marc St-Jean
2007-07-10
[MIPS] Enable support for the userlocal hardware register
Ralf Baechle
2007-07-06
[MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores
Ralf Baechle
2006-11-30
[MIPS] Remove unused R10000 performance counter definitions.
Ralf Baechle
2006-07-13
[MIPS] vr41xx: Replace magic number for P4K bit with symbol.
Yoichi Yuasa
2006-07-13
[MIPS] TRACE_IRQFLAGS_SUPPORT support.
Ralf Baechle
2006-07-13
[MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.
Yoichi Yuasa
2006-06-29
[MIPS] Fix use of ehb instruction for non-R2 configurations.
Ralf Baechle
2006-06-20
Merge git://git.infradead.org/hdrcleanup-2.6
Linus Torvalds
2006-06-19
[MIPS] Cleanup __emt() a bit.
Ralf Baechle
2006-05-31
[MIPS] DSP and MDMX share the same config flag bit.
Thiemo Seufer
2006-04-26
Don't include linux/config.h from anywhere else in include/
David Woodhouse
2006-04-19
[MIPS] MT: Improved multithreading support.
Ralf Baechle
2006-04-19
[MIPS] Provide access functions for c0_badvaddr.
Ralf Baechle
2006-01-10
MIPS: DSP: Put mask field into the right place.
Ralf Baechle
2005-10-29
Virtual SMP support for the 34K.
Ralf Baechle
2005-10-29
Fix parenthesis in macros.
Ralf Baechle
2005-10-29
Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.
Pete Popov
2005-10-29
Detect the MIPS R2 vectored interrupt, external interrupt controller
Ralf Baechle
2005-10-29
Macros to access the register of processors using the new MIPS
Ralf Baechle
2005-10-29
A few more macros to access MIPS R2 architecture registers.
Ralf Baechle
2005-10-29
Get the thing to compile again ...
Ralf Baechle
2005-10-29
Use macros for the RM7k cp0.config bits instead of magic numbers.
Maciej W. Rozycki
2005-10-29
Remove dead code which was causing warnings.
Ralf Baechle
2005-10-29
Support the MIPS32 / MIPS64 DSP ASE.
Ralf Baechle
2005-10-29
Cleanup decoding of MIPSxx config registers.
Ralf Baechle
2005-10-29
Better interface to run uncached cache setup code.
Thiemo Seufer
2005-10-29
Provide functions to access cop0 config4-7 registers
Ralf Baechle
2005-04-16
Linux-2.6.12-rc2
Linus Torvalds