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This patch adds the missing GSCL and MSCL block clocks
and corrects some wrong parent-child relationships.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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This patch adds minimum set of clocks to gate ISP block for
power saving.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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Adds IDs for the clocks needed by the ARM Mali GPU
in exynos5420.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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Export sclk_hdmiphy clock to be usable from DT.
Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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This patch adds the required clocks for ARM Mali IP
in Exynos5250.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
[t.figa: Changed clock ID to avoid conflict with CLK_SSS]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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Exynos4210 and Exynos4x12 SoCs have the PL330 MDMA IP block clock
defined exactly in same way in documentation. Using different
names for these clocks is a bit misleading. Since there is no users
of CLK_MDMA2 in existing dts files this patch drops CLK_MDMA2 and
replaces it with CLK_MDMA in the driver. This ensures PL330 MDMA
has correct clock assigned on Exynos4x12 SoCs.
Suggested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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This patch adds gating clock for SSS(Security SubSystem)
module on Exynos5250/5420.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
[t.figa: Fixed sort order and group name.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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Add macros which are used as Clock IDs in DT and clock file.
It also adds the documentation for the exynos5260 clocks.
Signed-off-by: Rahul Sharma <Rahul.Sharma@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Only essential clocks are added for now. Other clocks will be added when
needed.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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R-Car M2 has two MSTP bits for SYS-DMAC, not one.
Also bring the naming in sync with the documentation.
This issue was introduced in v3.14, in commit
4d8864c9e94ec727f1c675b9f6921525c360334b ("ARM: shmobile: r8a7791: Add
clock index macros for DT sources").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This driver can handle the clock controllers of the socs mentioned above,
as they share a common clock tree with only small differences.
The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure.
As pll-rate-tables only the 12mhz variants are currently included.
The original code was wrongly checking for 169mhz xti values [a 0 to much
at the end], so the original 16mhz pll table would have never been
included and its values are so obscure that I have no possibility to
at least check their sane-ness. When using the formula from the manual
the resulting frequency is near the table value but still slightly off.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Haifeng Yan <haifeng.yan@linaro.org>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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We've had deeper idle states working on omaps for few years now,
but only in the legacy mode. When booted with device tree, the
wake-up events did not have a chance to work until commit
3e6cee1786a1 (pinctrl: single: Add support for wake-up interrupts)
that recently got merged. In addition to that we also needed commit
79d9701559a9 (of/irq: create interrupts-extended property) and
9ec36cafe43b (of/irq: do irq resolution in platform_get_irq) that
are now also merged.
So let's fix the wake-up events for some selected omaps so devices
booted in device tree mode won't just hang if deeper power states
are enabled, and so systems can wake up from suspend to the serial
port event.
Note that there's no longer need to specify the wake-up bit in
the pinctrl settings, the request_irq on the wake-up pin takes
care of that.
Cc: devicetree@vger.kernel.org
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Kevin Hilman <khilman@linaro.org>
Cc: Nishanth Menon <nm@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
[tony@atomide.com: updated comments, added board LDP]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add the necessary #reset-cells property to the rst-mgr node and
provide a header-file with all possible resets specified.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v3.16" from Simon Horman:
r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs
* Add MSIOF nodes and aliases
* Correct I2C clock parents
r8a7791 (R-Car M2) SoC
* Add EHCI MSTP clock
r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards
* Add MSIOF nodes
* Add gpio-keys support for SW2
* Enable I2C
* Enable Quad SPI transfers for the SPI FLASH
* Rename and lable spi to qspi, add spi0 alias
* Set ethernet PHY LED mode
r8a7779 (R-Car H1) and r8a7778 (R-Car M2) SoCs
* Improve and correct HSPI nodes
r8a7778 (R-Car M2) based Bock-W board
* Add SPI FLASH
r8a7740 (R-Mobile A1) SoC
* Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings
r8a7740 (R-Mobile A1) based Armadillo800 EVA board
* Enable RTC
* Use KEY_* macros for gpio-keys
EMEV2 (Emma Mobile EV2) based kzm9g board
* Use KEY_* macros for gpio-keys
* tag 'renesas-dt-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits)
ARM: shmobile: armadillo-reference dts: Seiko Instruments, Inc is "sii"
ARM: shmobile: lager dts: Enable Quad SPI transfers for the SPI FLASH
ARM: shmobile: koelsch dts: Enable Quad SPI transfers for the SPI FLASH
ARM: shmobile: r8a7790: add IIC(B) cores to dtsi
ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi
ARM: shmobile: r8a7790: add IIC0-2 clock macros
ARM: shmobile: r8a7791: Fix the I2C clocks parents in DT
ARM: shmobile: r8a7790: Fix the I2C clocks parents in DT
ARM: shmobile: lager: Correct setting of ethernet PHY LED mode
ARM: shmobile: armadillo-reference dts: enable RTC
ARM: shmobile: r8a7791: Add EHCI MSTP clock
ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings
ARM: shmobile: koelsch: activate i2c6 bus
ARM: shmobile: koelsch: make i2c2-pfc node unique
ARM: shmobile: r8a7791: add IIC(B) cores to dtsi
ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi
ARM: shmobile: r8a7791: add IIC0/1 clock macros
ARM: shmobile: kzm9g-reference dts: Use KEY_* macros for gpio-keys
ARM: shmobile: armadillo-reference dts: Use KEY_* macros for gpio-keys
ARM: shmobile: koelsch: Set ethernet PHY LED mode
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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* renesas/clock:
ARM: shmobile: r8a7790: remove old style audio clock
ARM: shmobile: r8a7778: remove old style audio clock
ARM: shmobile: r8a7791: Rename VSP1_SY clocks to VSP1_S
ARM: shmobile: r8a7790: Rename VSP1_(SY|RT) clocks to VSP1_(S|R)
ARM: shmobile: r8a7791: Fix the I2C clocks parents in legacy code
ARM: shmobile: r8a7790: Fix the I2C clocks parents in legacy code
ARM: shmobile: Introduce shmobile_clk_workaround()
ARM: shmobile: r8a7791: Use rcar_gen2_read_mode_pins() helper
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Renesas ARM Based SoC Clock Updates for v3.16" from Simon Horman:
SH Mobile shared clock code
* Introduce shmobile_clk_workaround()
r8a7791 (R-Car M2) SoC
* Rename VSP1_SY clocks to VSP1_S
* Correct the I2C clocks parents
r8a7790 (R-Car H2) SoC
* Remove old style audio clock
* Rename VSP1_(SY|RT) clocks to VSP1_(S|R)
* Fix the I2C clocks parents
r8a7778 (R-Car M1) SoC
* Remove old style audio clock
* tag 'renesas-clock-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: remove old style audio clock
ARM: shmobile: r8a7778: remove old style audio clock
ARM: shmobile: r8a7791: Rename VSP1_SY clocks to VSP1_S
ARM: shmobile: r8a7790: Rename VSP1_(SY|RT) clocks to VSP1_(S|R)
ARM: shmobile: r8a7791: Fix the I2C clocks parents in legacy code
ARM: shmobile: r8a7790: Fix the I2C clocks parents in legacy code
ARM: shmobile: Introduce shmobile_clk_workaround()
ARM: shmobile: r8a7791: Use rcar_gen2_read_mode_pins() helper
Signed-off-by: Olof Johansson <olof@lixom.net>
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* Remove CE2_SLEEP_CLK, doesn't exist on 8960 family SoCs
* Fix incorrect offset for PMIC_SSBI2_RESET
* Fix typo:
SIC_TIC -> SPS_TIC_H
SFAB_ADM0_M2_A_CLK -> SFAB_ADM0_M2_H_CLK
* Fix naming convention:
SFAB_CFPB_S_HCLK -> SFAB_CFPB_S_H_CLK
SATA_SRC_CLK -> SATA_CLK_SRC
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Define the set of CCUs and provided clocks sufficient to satisfy the
needs of all the existing clock references for BCM21664. Replace
the "fake" fixed-rate clocks used previously with "real" ones.
Note that only the minimal set of these clocks and CCUs is defined
here. More clock definitions will need to be added as required by
the addition of additional drivers.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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The Broadcom 281xx clock code uses a #define for the compatible
string for it's clock control units (CCUs). Rather than defining
those in the C source file, define them in the header file that's
shared by both the code and the device tree source file (along with
all the clock ids).
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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3.15 fixes for AT91
- one little DT fix
- the use of proper directory for clock in include/dt-bindings
it allows to remove the now empty include/dt-bindings/clk
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
dt-bindings: clock: Move at91.h to dt-bindigs/clock
ARM: at91: fix spi cs on sama5d3 Xplained board
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The Tegra124 clock DT binding currently provides 3 clocks that don't
actually exist; 2 for NAND and one for UART5/UARTE. Delete these. While
this is technically an incompatible DT ABI change, nothing could have
used these clock IDs for anything practical, since the HW doesn't exist.
Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
CC: Rob Landley <rob@landley.net>
CC: Andrew Victor <linux@maxim.org.za>
CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Acked-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
[nicolas.ferre@atmel.com: add new at91sam9261 & at91sam9rl]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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This driver can handle the clock controller in the s3c2412 soc.
The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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The three SoCs share a common clock tree which only differs in the
existence of some special clocks.
As with all parts common to these three SoCs the driver is named
after the s3c2443, as it was the first SoC introducing this structure
and there exists no other label to describe this s3c24xx epoch.
The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure. As an example the sclk_uart gate was never handled previously
and the div_uart was made to be the clock used by the serial driver.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add support for EHCI clock gating via the MSTP703 bit on r8a7791.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The r8a7791 has three VSP1 instances, one of them being named VSPS (which
stands for "VSP Standard"). The clock section in the SoC datasheet
misunderstood the abbreviation as meaning VSP System, and named the
corresponding clock VSP1(SY). This mistake has been carried over to the
kernel code.
Fix this by renaming the VSP1_SY clock to VSP1_S.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The r8a7790 has four VSP1 instances, two of them being named VSPS (which
stands for "VSP Standard") and VSPR (which stands for "VSP for
Resizing"). The clock section in the SoC datasheet misunderstood the
abbreviations as meaning VSP System and VSP Realtime, and named the
corresponding clocks VSP1(SY) and VSP1(RT). This mistake has been
carried over to the kernel code.
Fix this by renaming the VSP1_SY and VSP1_RT clocks to VSP1_S and VSP1_R.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.linaro.org/people/mike.turquette/linux
Pull clock framework changes from Mike Turquette:
"The clock framework changes for 3.15 look similar to past pull
requests. Mostly clock driver updates, more Device Tree support in
the form of common functions useful across platforms and a handful of
features and fixes to the framework core"
* tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/linux: (86 commits)
clk: shmobile: fix setting paretn clock rate
clk: shmobile: rcar-gen2: fix lb/sd0/sd1/sdh clock parent to pll1
clk: Fix minor errors in of_clk_init() function comments
clk: reverse default clk provider initialization order in of_clk_init()
clk: sirf: update copyright years to 2014
clk: mmp: try to use closer one when do round rate
clk: mmp: fix the wrong calculation formula
clk: mmp: fix wrong mask when calculate denominator
clk: st: Adds quadfs clock binding
clk: st: Adds clockgen-vcc and clockgen-mux clock binding
clk: st: Adds clockgen clock binding
clk: st: Adds divmux and prediv clock binding
clk: st: Support for A9 MUX clocks
clk: st: Support for ClockGenA9/DDR/GPU
clk: st: Support for QUADFS inside ClockGenB/C/D/E/F
clk: st: Support for VCC-mux and MUX clocks
clk: st: Support for PLLs inside ClockGenA(s)
clk: st: Support for DIVMUX and PreDiv Clocks
clk: support hardware-specific debugfs entries
clk: s2mps11: Use of_get_child_by_name
...
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late cleanups from Arnd Bergmann:
"These could not be part of the first cleanup branch, because they
either came too late in the cycle, or they have dependencies on other
branches. Important changes are:
- The integrator platform is almost multiplatform capable after some
reorganization (Linus Walleij)
- Minor cleanups on Zynq (Michal Simek)
- Lots of changes for Exynos and other Samsung platforms, including
further preparations for multiplatform support and the clocks
bindings are rearranged"
* tag 'tags/cleanup2-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
devicetree: fix newly added exynos sata bindings
ARM: EXYNOS: Fix compilation error in cpuidle.c
ARM: S5P64X0: Explicitly include linux/serial_s3c.h in mach/pm-core.h
ARM: EXYNOS: Remove hardware.h file
ARM: SAMSUNG: Remove hardware.h inclusion
ARM: S3C24XX: Remove invalid code from hardware.h
dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock
ARM: dts: Keep some essential LDOs enabled for arndale-octa board
ARM: dts: Disable MDMA1 node for arndale-octa board
ARM: S3C64XX: Fix build for implicit serial_s3c.h inclusion
serial: s3c: Fix build of header without serial_core.h preinclusion
ARM: EXYNOS: Allow wake-up using GIC interrupts
ARM: EXYNOS: Stop using legacy Samsung PM code
ARM: EXYNOS: Remove PM initcalls and useless indirection
ARM: EXYNOS: Fix abuse of CONFIG_PM
ARM: SAMSUNG: Move s3c_pm_check_* prototypes to plat/pm-common.h
ARM: SAMSUNG: Move common save/restore helpers to separate file
ARM: SAMSUNG: Move Samsung PM debug code into separate file
ARM: SAMSUNG: Consolidate PM debug functions
ARM: SAMSUNG: Use debug_ll_addr() to get UART base address
...
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver changes from Arnd Bergmann:
"These changes are mostly for ARM specific device drivers that either
don't have an upstream maintainer, or that had the maintainer ask us
to pick up the changes to avoid conflicts.
A large chunk of this are clock drivers (bcm281xx, exynos, versatile,
shmobile), aside from that, reset controllers for STi as well as a
large rework of the Marvell Orion/EBU watchdog driver are notable"
* tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac."
Revert "net: stmmac: Add SOCFPGA glue driver"
ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks
ARM: STi: Add reset controller support to mach-sti Kconfig
drivers: reset: stih416: add softreset controller
drivers: reset: stih415: add softreset controller
drivers: reset: Reset controller driver for STiH416
drivers: reset: Reset controller driver for STiH415
drivers: reset: STi SoC system configuration reset controller support
dts: socfpga: Add sysmgr node so the gmac can use to reference
dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
reset: Add optional resets and stubs
ARM: shmobile: r7s72100: fix bus clock calculation
Power: Reset: Generalize qnap-poweroff to work on Synology devices.
dts: socfpga: Update clock entry to support multiple parents
ARM: socfpga: Update socfpga_defconfig
dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
net: stmmac: Add SOCFPGA glue driver
watchdog: orion_wdt: Use %pa to print 'phys_addr_t'
drivers: cci: Export CCI PMU revision
...
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Pull ARM SoC device tree changes from Arnd Bergmann:
"A large part of the arm-soc patches are nowadays DT changes, adding
support for new SoCs, boards and devices without changing kernel
source. The plan is still to move the devicetree files out of the
kernel tree and reduce the amount of churn going on here, but we keep
finding reasons to delay doing that.
Changes are really all over the place, with little sticking out
particularly. We have contributions from a total of 116 people in
this branch.
Unfortunately, the size of this branch also causes a significant
number of conflicts at the moment, typically when subsystem
maintainers merge patches that change the driver at the same time as
the dts files. In most cases this could be avoided because the dts
changes are supposed to be compatible in both ways, and we are asking
everyone to send ARM dts changes through our tree only"
* tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits)
dts: stmmac: Document the clocks property in the stmmac base document
dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
ARM: STi: stih41x: Add support for the FSM Serial Flash Controller
ARM: STi: stih416: Add support for the FSM Serial Flash Controller
ARM: tegra: fix Dalmore pinctrl configuration
ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm
ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND
ARM: dts: Build all keystone dt blobs
ARM: dts: keystone: Fix control register range for clktsip
ARM: dts: keystone: Fix domain register range for clkfftc1
ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot
ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap
ARM: dts: bcm21664: Add device tree files.
ARM: DT: bcm21664: Device tree bindings
ARM: efm32: properly namespace i2c location property
ARM: efm32: fix unit address part in USART2 device nodes' names
ARM: mvebu: Enable NAND controller in Armada 385-DB
ARM: mvebu: Add support for NAND controller in Armada 38x SoC
ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver patches from Greg KH:
"Here's the big char/misc driver updates for 3.15-rc1.
Lots of various things here, including the new mcb driver subsystem.
All of these have been in linux-next for a while"
* tag 'char-misc-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (118 commits)
extcon: Move OF helper function to extcon core and change function name
extcon: of: Remove unnecessary function call by using the name of device_node
extcon: gpio: Use SIMPLE_DEV_PM_OPS macro
extcon: palmas: Use SIMPLE_DEV_PM_OPS macro
mei: don't use deprecated DEFINE_PCI_DEVICE_TABLE macro
mei: amthif: fix checkpatch error
mei: client.h fix checkpatch errors
mei: use cl_dbg where appropriate
mei: fix Unnecessary space after function pointer name
mei: report consistently copy_from/to_user failures
mei: drop pr_fmt macros
mei: make me hw headers private to me hw.
mei: fix memory leak of pending write cb objects
mei: me: do not reset when less than expected data is received
drivers: mcb: Fix build error discovered by 0-day bot
cs5535-mfgpt: Simplify dependencies
spmi: pm: drop bus-level PM suspend/resume routines
spmi: pmic_arb: make selectable on ARCH_QCOM
Drivers: hv: vmbus: Increase the limit on the number of pfns we can handle
pch_phub: Report error writing MAC back to user
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Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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https://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux into clk-next-hisilcon
updating clock drivers for Hisilicon
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Now only fixed rate clocks are appended into the clock driver.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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This is apparently a dependency for the STi reset controller driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.stlinux.com/devel/kernel/linux-sti into next/dt
Merge "STi DT changes part 1 v2" from Srinivas Kandagatla:
Patches : 01-02 are DT patches, adding interrupt support to pin
controller driver, Driver changes are already going via Linus W's
pinctrl tree.
Patches: 03 - 06 are DT patches for reset/softreset controller. Reset
controller driver is Acked by Philipp Zabel.
Patches: 07, 08 are DT patches, adding Ethernet controller support
patches, actual driver changes are already in v3.14-rc4 via Dave Millers
net tree.
Patches: 09, 10 are DT patches for IR driver support, actual IR driver
is already available since v3.12. Reason for the delay is due to
dependency on reset controller driver/headers.
* tag 'DT-for-v3.15-part-1-v2' of git://git.stlinux.com/devel/kernel/linux-sti:
ARM: STi: STIH416: Add IR support.
ARM: STi: STIH415: Add IR support.
ARM: STi: STiH416: Add ethernet support.
ARM: STi: STiH415: Add ethernet support.
ARM: STi: STiH416: Add soft reset controller support.
ARM: STi: STiH416: Add reset controller support.
ARM: STi: STiH415: Add soft reset controller support.
ARM: STi: STiH415: Add reset controller support.
ARM: STi: STiH415: Add interrupt support for pin controller
ARM: STi: STiH416: Add interrupt support for pin controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Renesas ARM Based SoC Clock Updates for v3.15" from Simon Horman:
* r7s72100 SoC (RZ/A1H)
- Add clock for SH Ethernet
- Add RSPI clocks
* r8a7791 (R-Car M2)
- Add QSPI and SDHI clocks
* r8a7790 (R-Car H2)
- Add audio clock
- Remove legacy DT clocks
- Correct SYS DMAC clock defines
* tag 'renesas-clock-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Remove legacy r8a7790 DT clocks
ARM: shmobile: Add r8a7791 legacy SDHI clocks
ARM: shmobile: r8a7790: Correct SYS DMAC clock defines
ARM: shmobile: r7s72100: Add clock for r7s72100-ether
ARM: shmobile: r8a7791 clock: add QSPI clocks
ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
ARM: shmobile: r7s72100 clock: Add RSPI clocks
ARM: shmobile: r8a7790: add audio clock
ARM: shmobile: r8a7778: add audio clock in new style
Signed-off-by: Olof Johansson <olof@lixom.net>
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This commit adds a bare bones driver support for TLV320AIC31XX family
audio codecs. The driver adds basic stereo playback trough headphone
and speaker outputs and mono capture trough microphone inputs.
The driver is currently missing support at least for mini DSP features
and jack detection. I have tested the driver only on TLV320AIC3111,
but based on the data sheets TLV320AIC3100, TLV320AIC3110, and
TLV320AIC3120 should work Ok too.
The base for the implementation was taken from:
git@gitorious.org:ti-codecs/ti-codecs.git ajitk/topics/k3.10.1-aic31xx
-branch at commit 77504eba0294764e9e63b4a0c696b44db187cd13.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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This patch adds soft reset controller support for STiH415 and adds new
softreset lines required for other device tree nodes in the header file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
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This patch adds a reset controller node to the SOC device tree and also
adds new header files with reset lines required for other device tree
nodes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
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This patch adds soft reset controller support for STiH415 and adds new
softreset lines required for other device tree nodes in the header file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
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This patch adds a reset controller node to the SOC device tree and also
adds new header files with reset lines required for other device tree
nodes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
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AM43xx devices have an extra MUX_MODE for certain pins.
Updating dt include to have MUX_MODE8 which maps to 0x8.
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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