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/*
* Device Tree Source for the Henninger board
*
* Copyright (C) 2014 Renesas Solutions Corp.
* Copyright (C) 2014 Cogent Embedded, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r8a7791.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Henninger";
compatible = "renesas,henninger", "renesas,r8a7791";
aliases {
serial0 = &scif0;
};
chosen {
bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
memory@200000000 {
device_type = "memory";
reg = <2 0x00000000 0 0x40000000>;
};
vcc_sdhi0: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vccq_sdhi0: regulator@1 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1
1800000 0>;
};
vcc_sdhi2: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "SDHI2 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vccq_sdhi2: regulator@3 {
compatible = "regulator-gpio";
regulator-name = "SDHI2 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1
1800000 0>;
};
};
&extal_clk {
clock-frequency = <20000000>;
};
&pfc {
scif0_pins: serial0 {
renesas,groups = "scif0_data_d";
renesas,function = "scif0";
};
ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth";
};
phy1_pins: phy1 {
renesas,groups = "intc_irq0";
renesas,function = "intc";
};
sdhi0_pins: sd0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
renesas,function = "sdhi0";
};
sdhi2_pins: sd2 {
renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
renesas,function = "sdhi2";
};
i2c2_pins: i2c2 {
renesas,groups = "i2c2";
renesas,function = "i2c2";
};
qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
msiof0_pins: spi1 {
renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
"msiof0_tx";
renesas,function = "msiof0";
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay";
};
ðer {
pinctrl-0 = <ðer_pins &phy1_pins>;
pinctrl-names = "default";
phy-handle = <&phy1>;
renesas,ether-link-active-low;
status = "ok";
phy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <1>;
};
};
&sata0 {
status = "okay";
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
vmmc-supply = <&vcc_sdhi0>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&sdhi2 {
pinctrl-0 = <&sdhi2_pins>;
pinctrl-names = "default";
vmmc-supply = <&vcc_sdhi2>;
vqmmc-supply = <&vccq_sdhi2>;
cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
status = "okay";
};
&i2c2 {
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
};
&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spansion,s25fl512s";
reg = <0>;
spi-max-frequency = <30000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
m25p,fast-read;
partition@0 {
label = "loader_prg";
reg = <0x00000000 0x00040000>;
read-only;
};
partition@40000 {
label = "user_prg";
reg = <0x00040000 0x00400000>;
read-only;
};
partition@440000 {
label = "flash_fs";
reg = <0x00440000 0x03bc0000>;
};
};
};
&msiof0 {
pinctrl-0 = <&msiof0_pins>;
pinctrl-names = "default";
status = "okay";
pmic@0 {
compatible = "renesas,r2a11302ft";
reg = <0>;
spi-max-frequency = <6000000>;
spi-cpol;
spi-cpha;
};
};
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