summaryrefslogtreecommitdiff
path: root/drivers/staging/fsl-dpaa2/mac/dpmac-cmd.h
blob: abdc3c0d1b5d226411f712f601873c46192f2608 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
/* Copyright 2013-2016 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * * Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 * * Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 * * Neither the name of the above-listed copyright holders nor the
 * names of any contributors may be used to endorse or promote products
 * derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
#ifndef _FSL_DPMAC_CMD_H
#define _FSL_DPMAC_CMD_H

/* DPMAC Version */
#define DPMAC_VER_MAJOR				4
#define DPMAC_VER_MINOR				2
#define DPMAC_CMD_BASE_VERSION			1
#define DPMAC_CMD_ID_OFFSET			4

#define DPMAC_CMD(id)	(((id) << DPMAC_CMD_ID_OFFSET) | DPMAC_CMD_BASE_VERSION)

/* Command IDs */
#define DPMAC_CMDID_CLOSE		DPMAC_CMD(0x800)
#define DPMAC_CMDID_OPEN		DPMAC_CMD(0x80c)
#define DPMAC_CMDID_CREATE		DPMAC_CMD(0x90c)
#define DPMAC_CMDID_DESTROY		DPMAC_CMD(0x98c)
#define DPMAC_CMDID_GET_API_VERSION	DPMAC_CMD(0xa0c)

#define DPMAC_CMDID_GET_ATTR		DPMAC_CMD(0x004)
#define DPMAC_CMDID_RESET		DPMAC_CMD(0x005)

#define DPMAC_CMDID_SET_IRQ_ENABLE	DPMAC_CMD(0x012)
#define DPMAC_CMDID_GET_IRQ_ENABLE	DPMAC_CMD(0x013)
#define DPMAC_CMDID_SET_IRQ_MASK	DPMAC_CMD(0x014)
#define DPMAC_CMDID_GET_IRQ_MASK	DPMAC_CMD(0x015)
#define DPMAC_CMDID_GET_IRQ_STATUS	DPMAC_CMD(0x016)
#define DPMAC_CMDID_CLEAR_IRQ_STATUS	DPMAC_CMD(0x017)

#define DPMAC_CMDID_GET_LINK_CFG	DPMAC_CMD(0x0c2)
#define DPMAC_CMDID_SET_LINK_STATE	DPMAC_CMD(0x0c3)
#define DPMAC_CMDID_GET_COUNTER		DPMAC_CMD(0x0c4)

#define DPMAC_CMDID_SET_PORT_MAC_ADDR	DPMAC_CMD(0x0c5)

/* Macros for accessing command fields smaller than 1byte */
#define DPMAC_MASK(field)        \
	GENMASK(DPMAC_##field##_SHIFT + DPMAC_##field##_SIZE - 1, \
		DPMAC_##field##_SHIFT)
#define dpmac_set_field(var, field, val) \
	((var) |= (((val) << DPMAC_##field##_SHIFT) & DPMAC_MASK(field)))
#define dpmac_get_field(var, field)      \
	(((var) & DPMAC_MASK(field)) >> DPMAC_##field##_SHIFT)

struct dpmac_cmd_open {
	u32 dpmac_id;
};

struct dpmac_cmd_create {
	u32 mac_id;
};

struct dpmac_cmd_destroy {
	u32 dpmac_id;
};

struct dpmac_cmd_set_irq_enable {
	u8 enable;
	u8 pad[3];
	u8 irq_index;
};

struct dpmac_cmd_get_irq_enable {
	u32 pad;
	u8 irq_index;
};

struct dpmac_rsp_get_irq_enable {
	u8 enabled;
};

struct dpmac_cmd_set_irq_mask {
	u32 mask;
	u8 irq_index;
};

struct dpmac_cmd_get_irq_mask {
	u32 pad;
	u8 irq_index;
};

struct dpmac_rsp_get_irq_mask {
	u32 mask;
};

struct dpmac_cmd_get_irq_status {
	u32 status;
	u8 irq_index;
};

struct dpmac_rsp_get_irq_status {
	u32 status;
};

struct dpmac_cmd_clear_irq_status {
	u32 status;
	u8 irq_index;
};

struct dpmac_rsp_get_attributes {
	u8 eth_if;
	u8 link_type;
	u16 id;
	u32 max_rate;
};

struct dpmac_rsp_get_link_cfg {
	u64 options;
	u32 rate;
};

#define DPMAC_STATE_SIZE	1
#define DPMAC_STATE_SHIFT	0

struct dpmac_cmd_set_link_state {
	u64 options;
	u32 rate;
	u32 pad;
	/* only least significant bit is valid */
	u8 up;
};

struct dpmac_cmd_get_counter {
	u8 type;
};

struct dpmac_rsp_get_counter {
	u64 pad;
	u64 counter;
};

struct dpmac_rsp_get_api_version {
	u16 major;
	u16 minor;
};

struct dpmac_cmd_set_port_mac_addr {
	u8 pad[2];
	u8 addr[6];
};

#endif /* _FSL_DPMAC_CMD_H */