summaryrefslogtreecommitdiff
path: root/drivers/staging/fsl_ppfe/pfe_mod.c
blob: d5ba56a3c73fa208d954bf1324ffbdff7cb2b1e4 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
/*
 * Copyright 2015-2016 Freescale Semiconductor, Inc.
 * Copyright 2017 NXP
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/dma-mapping.h>
#include "pfe_mod.h"

struct pfe *pfe;

/*
 * pfe_probe -
 */
int pfe_probe(struct pfe *pfe)
{
	int rc;

	if (pfe->ddr_size < DDR_MAX_SIZE) {
		pr_err("%s: required DDR memory (%x) above platform ddr memory (%x)\n",
		       __func__, (unsigned int)DDR_MAX_SIZE, pfe->ddr_size);
		rc = -ENOMEM;
		goto err_hw;
	}

	if (((int)(pfe->ddr_phys_baseaddr + BMU2_DDR_BASEADDR) &
			(8 * SZ_1M - 1)) != 0) {
		pr_err("%s: BMU2 base address (0x%x) must be aligned on 8MB boundary\n",
		       __func__, (int)pfe->ddr_phys_baseaddr +
			BMU2_DDR_BASEADDR);
		rc = -ENOMEM;
		goto err_hw;
	}

	pr_info("cbus_baseaddr: %lx, ddr_baseaddr: %lx, ddr_phys_baseaddr: %lx, ddr_size: %x\n",
		(unsigned long)pfe->cbus_baseaddr,
		(unsigned long)pfe->ddr_baseaddr,
		pfe->ddr_phys_baseaddr, pfe->ddr_size);

	pfe_lib_init(pfe->cbus_baseaddr, pfe->ddr_baseaddr,
		     pfe->ddr_phys_baseaddr, pfe->ddr_size);

	rc = pfe_hw_init(pfe, 0);
	if (rc < 0)
		goto err_hw;

	rc = pfe_hif_lib_init(pfe);
	if (rc < 0)
		goto err_hif_lib;

	rc = pfe_hif_init(pfe);
	if (rc < 0)
		goto err_hif;

	rc = pfe_firmware_init(pfe);
	if (rc < 0)
		goto err_firmware;

	rc = pfe_ctrl_init(pfe);
	if (rc < 0)
		goto err_ctrl;

	rc = pfe_eth_init(pfe);
	if (rc < 0)
		goto err_eth;

	rc = pfe_sysfs_init(pfe);
	if (rc < 0)
		goto err_sysfs;

	rc = pfe_debugfs_init(pfe);
	if (rc < 0)
		goto err_debugfs;

	return 0;

err_debugfs:
	pfe_sysfs_exit(pfe);

err_sysfs:
	pfe_eth_exit(pfe);

err_eth:
	pfe_ctrl_exit(pfe);

err_ctrl:
	pfe_firmware_exit(pfe);

err_firmware:
	pfe_hif_exit(pfe);

err_hif:
	pfe_hif_lib_exit(pfe);

err_hif_lib:
	pfe_hw_exit(pfe);

err_hw:
	return rc;
}

/*
 * pfe_remove -
 */
int pfe_remove(struct pfe *pfe)
{
	pr_info("%s\n", __func__);

	pfe_debugfs_exit(pfe);

	pfe_sysfs_exit(pfe);

	pfe_eth_exit(pfe);

	pfe_ctrl_exit(pfe);

#if defined(LS1012A_PFE_RESET_WA)
	pfe_hif_rx_idle(&pfe->hif);
#endif
	pfe_firmware_exit(pfe);

	pfe_hif_exit(pfe);

	pfe_hif_lib_exit(pfe);

	pfe_hw_exit(pfe);

	return 0;
}