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author | Gary Jennejohn <garyj@denx.de> | 2008-11-20 10:37:26 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2009-01-23 23:42:04 (GMT) |
commit | 0c0ccf401ee03a5008fc2c19b05a662bce1a1086 (patch) | |
tree | 7499a6bbb0d01dd59448fbd67589079b8a75e162 | |
parent | 1e8f4e78ca393b3d8e86bd8055758dd465d9113f (diff) | |
download | u-boot-0c0ccf401ee03a5008fc2c19b05a662bce1a1086.tar.xz |
POWERPC 82xx: add the SCC as an HDLC controller
Right now this is only used by keymile.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
-rw-r--r-- | include/asm-ppc/cpm_8260.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/include/asm-ppc/cpm_8260.h b/include/asm-ppc/cpm_8260.h index 7e06940..8302404 100644 --- a/include/asm-ppc/cpm_8260.h +++ b/include/asm-ppc/cpm_8260.h @@ -546,6 +546,34 @@ typedef struct scc_trans { #define BD_SCC_TX_LAST ((ushort)0x0800) +/* SCC as HDLC controller - taken from commproc.h + */ +typedef struct scc_hdlc { + sccp_t sh_genscc; + /* + * HDLC specific parameter RAM + */ + uchar res[4]; /* reserved */ + ulong sh_cmask; /* CRC constant */ + ulong sh_cpres; /* CRC preset */ + ushort sh_disfc; /* discarded frame counter */ + ushort sh_crcec; /* CRC error counter */ + ushort sh_abtsc; /* abort sequence counter */ + ushort sh_nmarc; /* nonmatching address rx cnt */ + ushort sh_retrc; /* frame retransmission cnt */ + ushort sh_mflr; /* maximum frame length reg */ + ushort sh_maxcnt; /* maximum length counter */ + ushort sh_rfthr; /* received frames threshold */ + ushort sh_rfcnt; /* received frames count */ + ushort sh_hmask; /* user defined frm addr mask */ + ushort sh_haddr1; /* user defined frm address 1 */ + ushort sh_haddr2; /* user defined frm address 2 */ + ushort sh_haddr3; /* user defined frm address 3 */ + ushort sh_haddr4; /* user defined frm address 4 */ + ushort tmp; /* temp */ + ushort tmp_mb; /* temp */ +} scc_hdlc_t; + /* How about some FCCs..... */ #define FCC_GFMR_DIAG_NORM ((uint)0x00000000) |