diff options
| author | Bin Meng <bmeng.cn@gmail.com> | 2015-03-31 03:25:03 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-04-30 00:51:48 (GMT) |
| commit | 19268834fb208a7deb43f9a00b034e0c6abab3cd (patch) | |
| tree | 1261fe2f3fd113bfbdc13a0dd677edd7f77b3a06 | |
| parent | d21d05f19a7e4f3b27895a835d0e6de6d7951722 (diff) | |
| download | u-boot-19268834fb208a7deb43f9a00b034e0c6abab3cd.tar.xz | |
x86: Set serial port IRQ for SMSC LPC47M
For starting a Linux console on the superio serial port under
interrupt mode, the IRQ number must be configured.
Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/x86/include/asm/ibmpc.h | 3 | ||||
| -rw-r--r-- | board/intel/crownbay/crownbay.c | 2 | ||||
| -rw-r--r-- | board/intel/minnowmax/minnowmax.c | 2 | ||||
| -rw-r--r-- | drivers/misc/smsc_lpc47m.c | 3 | ||||
| -rw-r--r-- | include/smsc_lpc47m.h | 3 |
5 files changed, 9 insertions, 4 deletions
diff --git a/arch/x86/include/asm/ibmpc.h b/arch/x86/include/asm/ibmpc.h index c3b5187..678cde4 100644 --- a/arch/x86/include/asm/ibmpc.h +++ b/arch/x86/include/asm/ibmpc.h @@ -21,4 +21,7 @@ #define UART0_BASE 0x3f8 #define UART1_BASE 0x2f8 +#define UART0_IRQ 4 +#define UART1_IRQ 3 + #endif diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c index 2a254ef..31bb320 100644 --- a/board/intel/crownbay/crownbay.c +++ b/board/intel/crownbay/crownbay.c @@ -16,7 +16,7 @@ DECLARE_GLOBAL_DATA_PTR; int board_early_init_f(void) { - lpc47m_enable_serial(SERIAL_DEV, UART0_BASE); + lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); return 0; } diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c index 6e82b16..fd2070a 100644 --- a/board/intel/minnowmax/minnowmax.c +++ b/board/intel/minnowmax/minnowmax.c @@ -16,7 +16,7 @@ DECLARE_GLOBAL_DATA_PTR; int board_early_init_f(void) { - lpc47m_enable_serial(SERIAL_DEV, UART0_BASE); + lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); return 0; } diff --git a/drivers/misc/smsc_lpc47m.c b/drivers/misc/smsc_lpc47m.c index d51f8e3..1e50d5b 100644 --- a/drivers/misc/smsc_lpc47m.c +++ b/drivers/misc/smsc_lpc47m.c @@ -22,12 +22,13 @@ static void pnp_exit_conf_state(u16 dev) outb(0xaa, port); } -void lpc47m_enable_serial(u16 dev, u16 iobase) +void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); pnp_set_enable(dev, 0); pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_irq(dev, PNP_IDX_IRQ0, irq); pnp_set_enable(dev, 1); pnp_exit_conf_state(dev); } diff --git a/include/smsc_lpc47m.h b/include/smsc_lpc47m.h index bffd622..32b069d 100644 --- a/include/smsc_lpc47m.h +++ b/include/smsc_lpc47m.h @@ -13,7 +13,8 @@ * * @dev: High 8 bits = Super I/O port, low 8 bits = logical device number. * @iobase: Processor I/O port address to assign to this serial device. + * @irq: Processor IRQ number to assign to this serial device. */ -void lpc47m_enable_serial(u16 dev, u16 iobase); +void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq); #endif /* _SMSC_LPC47M_H_ */ |