diff options
| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2017-06-27 08:05:13 (GMT) |
|---|---|---|
| committer | Alison Wang <b18965@freescale.com> | 2017-09-11 01:09:46 (GMT) |
| commit | 26aaf131a720ebe363c92ccff3e9f8ac67a91e36 (patch) | |
| tree | c8c6a0d716b8c867513292e3b5e3cc3240f9a2d7 | |
| parent | a836f94778a304435326b043f4f64c900df8075b (diff) | |
| download | u-boot-26aaf131a720ebe363c92ccff3e9f8ac67a91e36.tar.xz | |
armv8/fsl-lsch2: correct QMAN clock
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 4 |
2 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 72e5079..290e566 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -419,6 +419,14 @@ config SYS_FSL_SDHC_CLK_DIV help This is the divider that is used to derive SDHC clock from Platform clock, in another word SDHC_clk = Platform_clk / this_divider. + +config SYS_FSL_QMAN_CLK_DIV + int "QMAN clock divider" + default 1 if ARCH_LS1043A + default 2 + help + This is the divider that is used to derive QMAN clock from Platform + clock, in another word QMAN_clk = Platform_clk / this_divider. endmenu config RESV_RAM diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index eaab948..8047dbe 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -156,7 +156,9 @@ void get_sys_info(struct sys_info *sys_info) CONFIG_SYS_FSL_IFC_CLK_DIV; #endif #ifdef CONFIG_SYS_DPAA_QBMAN - sys_info->freq_qman = sys_info->freq_systembus; + sys_info->freq_qman = (sys_info->freq_systembus / + CONFIG_SYS_FSL_PCLK_DIV)/ + CONFIG_SYS_FSL_QMAN_CLK_DIV; #endif } |