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| author | Stephen Warren <swarren@nvidia.com> | 2012-10-22 06:19:33 (GMT) |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2012-10-29 16:07:05 (GMT) |
| commit | 2b7818d49f00ec185eb97650fc1b306c0c6e4565 (patch) | |
| tree | 3ffa215535e35fe7d2d0cf9435c259b027bf57c4 | |
| parent | a833b95039a08cd52980f95564b567c8b3138cfe (diff) | |
| download | u-boot-2b7818d49f00ec185eb97650fc1b306c0c6e4565.tar.xz | |
ARM: enhance u-boot.lds to detect over-sized SPL
Add an ASSERT() to u-boot.lds to detect an SPL that doesn't fit within
SPL_TEXT_BASE..SPL_MAX_SIZE.
Different .lds files implement this check in two possible ways:
1) An ASSERT() like this
2) Defining a MEMORY region of size SPL_MAX_SIZE, and re-directing all
linker output into that region. Since u-boot.lds is used for both
SPL and main U-Boot, this would entail only sometimes defining a
MEMORY region, and only sometimes performing that redirection, and
hence option (1) was deemed much simpler, and hence implemented.
Note that this causes build failures at least for NVIDIA Tegra Seaboard
and Ventana. However, these are legitimate; the SPL doesn't fit within
the required space, and this does cause runtime issues.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
| -rw-r--r-- | arch/arm/cpu/u-boot.lds | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index 1996b97..e6b202b 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -94,3 +94,7 @@ SECTIONS /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } } + +#if defined(CONFIG_SPL_TEXT_BASE) && defined(CONFIG_SPL_MAX_SIZE) +ASSERT(__bss_end__ < (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), "SPL image too big"); +#endif |