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author | Bin Meng <bmeng.cn@gmail.com> | 2015-10-07 09:13:18 (GMT) |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2015-10-08 18:09:09 (GMT) |
commit | 7445435fb32824e0cfd05beb7013be8f84e9ee09 (patch) | |
tree | 04e98c75a8d4d3c7740241745c4ffdc84b697817 | |
parent | 996ec1dcc58a34b53891acde0ec5df9141b5fcc2 (diff) | |
download | u-boot-7445435fb32824e0cfd05beb7013be8f84e9ee09.tar.xz |
pci: Fix expansion ROM programming for multi-function devices
PCI_HEADER_TYPE register (offset 0x0e) bit 7 is an indicator
for multi-function devices. We should mask it off before using
it as the header type.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
-rw-r--r-- | drivers/pci/pci_auto.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 41d5447..79f27c7 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -185,6 +185,7 @@ void pciauto_setup_device(struct pci_controller *hose, #ifndef CONFIG_PCI_ENUM_ONLY /* Configure the expansion ROM address */ pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type); + header_type &= 0x7f; if (header_type != PCI_HEADER_TYPE_CARDBUS) { rom_addr = (header_type == PCI_HEADER_TYPE_NORMAL) ? PCI_ROM_ADDRESS : PCI_ROM_ADDRESS1; |