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authorStephen Warren <swarren@wwwdotorg.org>2012-08-05 16:07:20 (GMT)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-09-01 12:58:20 (GMT)
commit86c632651d317fbb9de92489b7a5febece3c4436 (patch)
tree349baa72128cee643770c4c73be2b9d6735ceb53
parentc6c621bdb50532a7a41c9de4922a774470cfe93d (diff)
downloadu-boot-86c632651d317fbb9de92489b7a5febece3c4436.tar.xz
ARM: arm1176: enable instruction cache in arch_cpu_init()
Note that this affects all users of the ARM1176 CPU that enable CONFIG_ARCH_CPU_INIT, not just the BCM2835 SoC, potentially such as tnetv107x. Cc: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
-rw-r--r--arch/arm/cpu/arm1176/cpu.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm1176/cpu.c b/arch/arm/cpu/arm1176/cpu.c
index c0fd114..532a90b 100644
--- a/arch/arm/cpu/arm1176/cpu.c
+++ b/arch/arm/cpu/arm1176/cpu.c
@@ -65,3 +65,10 @@ static void cache_flush (void)
/* mem barrier to sync things */
asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
}
+
+int arch_cpu_init(void)
+{
+ icache_enable();
+
+ return 0;
+}