diff options
| author | Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu> | 2010-01-20 07:00:11 (GMT) |
|---|---|---|
| committer | Tom Rix <Tom.Rix@windriver.com> | 2010-01-23 14:15:50 (GMT) |
| commit | a3f3897bfda9b4729785bdd328b3b7f30417a67f (patch) | |
| tree | ded9dced10adeea568982bf634b9dc7d3c00f537 | |
| parent | 7da692360414d07027c6cf564a15d79cd9dcf488 (diff) | |
| download | u-boot-a3f3897bfda9b4729785bdd328b3b7f30417a67f.tar.xz | |
at91: Enable slow master clock on meesc board
Normally the processor clock has a divisor of 2.
In some cases this this needs to be set to 4.
Check the user has set environment mdiv to 4 to change the divisor.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
| -rw-r--r-- | board/esd/meesc/meesc.c | 26 | ||||
| -rw-r--r-- | include/configs/meesc.h | 1 |
2 files changed, 27 insertions, 0 deletions
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index efba60d..a1b66cb 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c @@ -219,6 +219,32 @@ u32 get_board_rev(void) } #endif +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + char *str; + char buf[32]; + + /* + * Normally the processor clock has a divisor of 2. + * In some cases this this needs to be set to 4. + * Check the user has set environment mdiv to 4 to change the divisor. + */ + if ((str = getenv("mdiv")) && (strcmp(str, "4") == 0)) { + at91_sys_write(AT91_PMC_MCKR, + (at91_sys_read(AT91_PMC_MCKR) & ~AT91_PMC_MDIV) | + AT91SAM9_PMC_MDIV_4); + at91_clock_init(0); + serial_setbrg(); + /* Notify the user that the clock is not default */ + printf("Setting master clock to %s MHz\n", + strmhz(buf, get_mck_clk_rate())); + } + + return 0; +} +#endif /* CONFIG_MISC_INIT_R */ + int board_init(void) { /* Peripheral Clock Enable Register */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index ab5cbca..c3255fa 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -48,6 +48,7 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SKIP_RELOCATE_UBOOT +#define CONFIG_MISC_INIT_R /* Call misc_init_r */ #define CONFIG_ARCH_CPU_INIT |