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author | Simon Glass <sjg@chromium.org> | 2012-11-25 20:12:16 (GMT) |
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committer | Simon Glass <sjg@chromium.org> | 2012-11-28 19:40:05 (GMT) |
commit | d02a568e9aa3c3500d9b680f60782c192fd51691 (patch) | |
tree | 7733addce35241979797ad74afb3fe8a52405acf | |
parent | cd23e6923f371b16b9ee9f115d15c9dd46c2f558 (diff) | |
download | u-boot-d02a568e9aa3c3500d9b680f60782c192fd51691.tar.xz |
x86: coreboot: Enable LPC TPM
Coreboot boards have an LPC TPM connected, so enable this.
Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r-- | include/configs/coreboot.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 12d1016..5da006f 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -67,6 +67,10 @@ CONFIG_SYS_SCSI_MAX_LUN) #endif +/* Generic TPM interfaced through LPC bus */ +#define CONFIG_GENERIC_LPC_TPM +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 + /*----------------------------------------------------------------------- * Real Time Clock Configuration */ |