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author | Stefano Babic <sbabic@denx.de> | 2011-08-05 10:21:37 (GMT) |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-11-03 21:56:17 (GMT) |
commit | d330883f03270a6ff9560e270f8f7c3656bfb7e2 (patch) | |
tree | 1c8b5a53464fb4364c59912e310856e3f1ddaaec | |
parent | e0a83cc1f5052cd95ce036b5813e8c394731b3b2 (diff) | |
download | u-boot-d330883f03270a6ff9560e270f8f7c3656bfb7e2.tar.xz |
MX35: add reset cause as provided by other i.MX
Signed-off-by: Stefano Babic <sbabic@denx.de>
-rw-r--r-- | arch/arm/cpu/arm1136/mx35/generic.c | 31 |
1 files changed, 29 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c index 1b9809b..ac4838f 100644 --- a/arch/arm/cpu/arm1136/mx35/generic.c +++ b/arch/arm/cpu/arm1136/mx35/generic.c @@ -422,12 +422,39 @@ U_BOOT_CMD( "" ); +static char *get_reset_cause(void) +{ + /* read RCSR register from CCM module */ + struct ccm_regs *ccm = + (struct ccm_regs *)IMX_CCM_BASE; + + u32 cause = readl(&ccm->rcsr) & 0x0F; + + switch (cause) { + case 0x0000: + return "POR"; + case 0x0002: + return "JTAG"; + case 0x0004: + return "RST"; + case 0x0008: + return "WDOG"; + default: + return "unknown reset"; + } +} + #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo(void) { - printf("CPU: Freescale i.MX35 at %d MHz\n", + u32 srev = get_cpu_rev(); + + printf("CPU: Freescale i.MX35 rev %d.%d at %d MHz.\n", + (srev & 0xF0) >> 4, (srev & 0x0F), get_mcu_main_clk() / 1000000); - /* mxc_dump_clocks(); */ + + printf("Reset cause: %s\n", get_reset_cause()); + return 0; } #endif |