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| author | Bin Meng <bmeng.cn@gmail.com> | 2017-07-26 03:12:00 (GMT) |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2017-08-01 12:17:02 (GMT) |
| commit | d92e9c8d313134f2ebde14a393f820b2191f4011 (patch) | |
| tree | 2fbcd69bd34711643eae8e3360fd004d6524b419 | |
| parent | e719b6b0f8fa5c6f3f4aeaa319dcf17d735153f8 (diff) | |
| download | u-boot-d92e9c8d313134f2ebde14a393f820b2191f4011.tar.xz | |
x86: tsc: Read all ratio bits from MSR_PLATFORM_INFO
Currently we read the tsc radio like this:
ratio = (MSR_PLATFORM_INFO >> 8) & 0x1f;
Thus we get bit 8-12 of MSR_PLATFORM_INFO, however according to the
Intel manual, the ratio bits are bit 8-15.
Fix this problem by masking 0xff instead.
This keeps in sync with Linux kernel commit:
886123f: x86/tsc: Read all ratio bits from MSR_PLATFORM_INFO
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | drivers/timer/tsc_timer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index 5c4ec00..ffbc709 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -92,7 +92,7 @@ static unsigned long __maybe_unused try_msr_calibrate_tsc(void) if (freq_desc_tables[cpu_index].msr_plat) { rdmsr(MSR_PLATFORM_INFO, lo, hi); - ratio = (lo >> 8) & 0x1f; + ratio = (lo >> 8) & 0xff; } else { rdmsr(MSR_IA32_PERF_STATUS, lo, hi); ratio = (hi >> 8) & 0x1f; |