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authorHans de Goede <hdegoede@redhat.com>2014-11-14 08:34:30 (GMT)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-11-24 08:09:49 (GMT)
commitea624e1951f1208ae619888be4c03f058e65c572 (patch)
treedc47919092443b92a9161440e10050d6b2f042a0
parent1bf0979f5ff4c297149a705d129ab8db4bec7763 (diff)
downloadu-boot-ea624e1951f1208ae619888be4c03f058e65c572.tar.xz
ARM: Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options
Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options, this is a preparation patch for adding an env variable to choose between secure / non-secure boot on non-secure boot capable systems, specifically this prepares for adding CONFIG_ARMV7_BOOT_SEC_DEFAULT as a proper Kconfig option. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/cpu/armv7/Kconfig23
-rw-r--r--arch/arm/cpu/armv7/exynos/Kconfig2
-rw-r--r--board/sunxi/Kconfig2
-rw-r--r--include/configs/arndale.h2
-rw-r--r--include/configs/sun7i.h2
-rw-r--r--include/configs/vexpress_ca15_tc2.h2
7 files changed, 31 insertions, 6 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3955978..329c323 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -413,6 +413,8 @@ config TARGET_INTEGRATORCP_CM946ES
config TARGET_VEXPRESS_CA15_TC2
bool "Support vexpress_ca15_tc2"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
config TARGET_VEXPRESS_CA5X2
bool "Support vexpress_ca5x2"
@@ -812,6 +814,8 @@ source "arch/arm/cpu/arm926ejs/versatile/Kconfig"
source "arch/arm/cpu/armv7/zynq/Kconfig"
+source "arch/arm/cpu/armv7/Kconfig"
+
source "board/aristainetos/Kconfig"
source "board/BuR/kwb/Kconfig"
source "board/BuR/tseries/Kconfig"
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
new file mode 100644
index 0000000..15c5155
--- /dev/null
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -0,0 +1,23 @@
+if CPU_V7
+
+config CPU_V7_HAS_NONSEC
+ bool
+
+config CPU_V7_HAS_VIRT
+ bool
+
+config ARMV7_NONSEC
+ boolean "Enable support for booting in non-secure mode" if EXPERT
+ depends on CPU_V7_HAS_NONSEC
+ default y
+ ---help---
+ Say Y here to enable support for booting in non-secure / SVC mode.
+
+config ARMV7_VIRT
+ boolean "Enable support for hardware virtualization" if EXPERT
+ depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
+ default y
+ ---help---
+ Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
+
+endif
diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig
index 090be93..e9a102c 100644
--- a/arch/arm/cpu/armv7/exynos/Kconfig
+++ b/arch/arm/cpu/armv7/exynos/Kconfig
@@ -26,6 +26,8 @@ config TARGET_ODROID
config TARGET_ARNDALE
bool "Exynos5250 Arndale board"
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
select SUPPORT_SPL
select OF_CONTROL if !SPL_BUILD
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index c3f865d..7555896 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -21,6 +21,8 @@ config MACH_SUN6I
config MACH_SUN7I
bool "sun7i (Allwinner A20)"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
select SUPPORT_SPL
config MACH_SUN8I
diff --git a/include/configs/arndale.h b/include/configs/arndale.h
index f9ee40f..aa6b631 100644
--- a/include/configs/arndale.h
+++ b/include/configs/arndale.h
@@ -60,6 +60,4 @@
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
-#define CONFIG_ARMV7_VIRT
-
#endif /* __CONFIG_H */
diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index ea40790..3629587 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -22,8 +22,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
-#define CONFIG_ARMV7_VIRT 1
-#define CONFIG_ARMV7_NONSEC 1
#define CONFIG_ARMV7_PSCI 1
#define CONFIG_ARMV7_PSCI_NR_CPUS 2
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h
index 982f4a7..b43afa2 100644
--- a/include/configs/vexpress_ca15_tc2.h
+++ b/include/configs/vexpress_ca15_tc2.h
@@ -18,6 +18,4 @@
#define CONFIG_SYSFLAGS_ADDR 0x1c010030
#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
-#define CONFIG_ARMV7_VIRT
-
#endif