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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2017-05-08 14:33:03 (GMT) |
|---|---|---|
| committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2017-09-04 07:05:19 (GMT) |
| commit | ead5d46d818cdf29660b7939554201a49d5f5b4e (patch) | |
| tree | 863a3c5806a978169c4dd0fbcf9d4057e461fa39 | |
| parent | d854cd17834846334e9d8c3adbcac8337d83a75c (diff) | |
| download | u-boot-ead5d46d818cdf29660b7939554201a49d5f5b4e.tar.xz | |
armv8: ls1088a: fix the MMU table for pcie config space
The pcie config space of ls1088a is different from ls2080a.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index d48484a..0359b6c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -107,10 +107,16 @@ #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) #define CONFIG_SYS_PCIE4_ADDR (CONFIG_SYS_IMMR + 0x2700000) +#ifdef CONFIG_ARCH_LS1088A +#define CONFIG_SYS_PCIE1_PHYS_ADDR 0x2000000000ULL +#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x2800000000ULL +#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x3000000000ULL +#else #define CONFIG_SYS_PCIE1_PHYS_ADDR 0x1000000000ULL #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x1200000000ULL #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x1400000000ULL #define CONFIG_SYS_PCIE4_PHYS_ADDR 0x1600000000ULL +#endif /* Device Configuration */ #define DCFG_BASE 0x01e00000 |