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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-07-28 16:01:49 (GMT)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-08-13 15:12:36 (GMT)
commit3159a6fc39e60d7bfb99ee1ea5b65b2e8b43dab3 (patch)
tree71f4dcf9b50ef3ded2f212fdc6c37f6d0d455c3e
parentfe1c3cd3af220bf2522db726564661e5553b6767 (diff)
downloadu-boot-3159a6fc39e60d7bfb99ee1ea5b65b2e8b43dab3.tar.xz
rockchip: rk3368: remove setup of secure timer from TPL/SPL
When using DM timers w/ the timer0 block within the RK3368, we no longer depend on the ARMv8 generic timer counting. This allows us to drop the secure timer initialisation from the TPL and SPL stages. The secure timer will later be set up by ATF, which starts the ARMv8 generic timer. Thus, there will be a dependency from Linux to the ATF through the ARMv8 generic timer... this seems reasonable, as Linux will require the ATF (and PSCI) to start up the secondary cores anyway (in other words: we don't add any new dependencies). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/mach-rockchip/rk3368-board-spl.c20
-rw-r--r--arch/arm/mach-rockchip/rk3368-board-tpl.c19
2 files changed, 0 insertions, 39 deletions
diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
index 691db41..cabf344 100644
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-spl.c
@@ -19,23 +19,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/*
- * The ARMv8 generic timer uses the STIMER1 as its clock-source.
- * Set up the STIMER1 to free-running (i.e. auto-reload) to start
- * the generic timer counting (if we don't do this, udelay will not
- * work and block indefinitively).
- */
-static void secure_timer_init(void)
-{
- struct rk_timer * const stimer1 =
- (struct rk_timer * const)0xff830020;
- const u32 TIMER_EN = BIT(0);
-
- writel(~0u, &stimer1->timer_load_count0);
- writel(~0u, &stimer1->timer_load_count1);
- writel(TIMER_EN, &stimer1->timer_ctrl_reg);
-}
-
void board_debug_uart_init(void)
{
}
@@ -52,9 +35,6 @@ void board_init_f(ulong dummy)
hang();
}
- /* Make sure the ARMv8 generic timer counts */
- secure_timer_init();
-
/* Set up our preloader console */
ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
if (ret) {
diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
index 1a69da2..b3e6ffa 100644
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c
@@ -21,23 +21,6 @@
DECLARE_GLOBAL_DATA_PTR;
/*
- * The ARMv8 generic timer uses the STIMER1 as its clock-source.
- * Set up the STIMER1 to free-running (i.e. auto-reload) to start
- * the generic timer counting (if we don't do this, udelay will not
- * work and block indefinitively).
- */
-static void secure_timer_init(void)
-{
- struct rk_timer * const stimer1 =
- (struct rk_timer * const)0xff830020;
- const u32 TIMER_EN = BIT(0);
-
- writel(~0u, &stimer1->timer_load_count0);
- writel(~0u, &stimer1->timer_load_count1);
- writel(TIMER_EN, &stimer1->timer_ctrl_reg);
-}
-
-/*
* The SPL (and also the full U-Boot stage on the RK3368) will run in
* secure mode (i.e. EL3) and an ATF will eventually be booted before
* starting up the operating system... so we can initialize the SGRF
@@ -153,8 +136,6 @@ void board_init_f(ulong dummy)
hang();
}
- /* Make sure the ARMv8 generic timer counts */
- secure_timer_init();
/* Reset security, so we can use DMA in the MMC drivers */
sgrf_init();